无线高速MODEM的设计与实现

本文介绍了ＧＭＳＫ调制解调芯片ＦＸ９０９的特点及其在无线高速ＭＯＤＥＭ中的应用。该ＭＯＤＥＭ通过音频接口与调频话音电台相接,同时可与具有标准ＲＳ－２３２Ｃ接口的数据设备相接,从而通过传统话音电台实现数据信号的无线传输。     

Doppler-shift correction for a UQPSK satellite modem

The paper describes a novel development of a previously described technique for the measurement and correction of the Doppler shift (frequency offset) in a received UQPSK signal that has been transmitted over a satellite link. The satellite is here assumed to be in a non-geostationary orbit, so that it introduces a large and time-varying Doppler shift into the transmitted data signal. Correction of the Doppler shift must be achieved as soon as the satellite rises above the horizon and with no prior knowledge at the receiver of the transmitted data. Furthermore, under the given conditions, the signal/noise ratio can be very low and the Doppler shift very high. A non-data-aided technique has therefore been selected, capable of operating under seriously adverse conditions. Results of computer-simulation tests are presented to measure the time taken to correct an initial Doppler shift of 5 kHz in the received UQPSK signal, at low signal/noise ratios.     

A modem for IDR/IBS applications

This paper describes the features of the Hughes Network Systems' (HNS) Model 4100 digital modem and associated switch-over equipment developed in response to the latest IDR performance specifications.     

2400 bit/s DMSK modem for mobile satellite service

The letter describes the implementation of a differentially coherent receiver suitable for bursty signal transmission over fading channels. To meet the severe system phase response requirement, this implementation is conducted at baseband. Means of frequency correction (AFC) is also shown. This receiver is simple and can easily be fabricated using VLSI technology.     

Parallel scrambler for high-speed applications

In order to improve the speed limitation of serial scrambler, we propose a new parallel scrambler architecture and circuit to overcome the limitation of serial scrambler. A very systematic parallel scrambler design methodology is first proposed. The critical path delay is only one D-register and one xor gate of two inputs. Thus, it is superior to other proposed circuits in high-speed applications. A new DET D-register with embedded xor operation is used as a basic circuit block of the parallel scrambler. Measurement results show the proposed parallel scrambler can operate in 40 Gbps with 16 outputs in TSMC 0.18-/spl mu/m CMOS process.     

Communication satellite systems for high-speed Internet access

Communication satellites were originally conceived as a means of providing a voice telephone service over the entire globe, i.e., between countries, which up to that time had no direct links with one another. Subsequently, satellites were launched to provide service to mobile users (the military, ships, aircraft, etc.), and for distributing television programs domestically. In the US, this was initially restricted to feeding cable head-ends, but direct-to-the home TV has become widespread. Satellite service providers now see offering businesses and consumers high-speed access to the Internet and the World Wide Web as the newest opportunity to expand their offerings. This paper reviews efforts now underway by a number of companies to tap this market, some of whom plan to deploy new, special-purpose satellite systems     

Doppler-shift correction by the DFT,for a QPSK satellite modem

This paper describes a novel technique for the measurement and correction of the Doppler shift (frequency offset) in a received QPSK signal that has been transmitted over a satellite link. The satellite is here assumed to be in a non-geostationary orbit, and correction of the Doppler shift is required to be achieved as soon as the satellite rises above the horizon, when the Doppler shift may be very high and the signal/noise ratio very low. The receiver now has no prior knowledge of the transmitted data, so that a non-data-aided system must be used, capable of operating under seriously adverse conditions. The selected technique measures the DFTs of successive blocks of samples of the received and demodulated signal, and from the DFTs it derives a control signal for the VCO, which generates the in-phase and quadrature reference carriers for the coherent demodulator. The frequency of the latter is adjusted to reduce the residual Doppler shift in the demodulated signal to a sufficiently small value, so that correct phase synchronization of the VCO on to the received signal carrier can then be achieved by means of an appropriate conventional system (not considered here). The paper describes the new technique of Doppler shift correction, and presents the results of computer-simulation tests to measure the time taken to correct an initial Doppler shift of 5 kHz in the received QPSK signal, at very low signal/noise ratios.     

A channel state‐driven ACM algorithm for mobile satellite communications

The last decade has been characterized by an increasing demand of higher throughput and more reliable communication links for supporting multimedia applications. To this aim, the focus has been toward both broadband and broadcast solutions providing multimedia services to mobile users. In order to exploit such advanced services, ubiquitous and efficient mobile connections are required: satellite communications (SatCom), able to cover low density populated areas and to fill terrestrial coverage gaps, are a viable solution, as long as capacity is properly optimized. Waveform adaptation can be considered as one of the reference approaches for increasing the throughput and the reliability in wireless communication links. However, the large round trip time and user mobility in SatCom scenarios represent a serious challenge that limits the effectiveness of transmission parameters adaptation. In this paper, we focus on a novel state‐driven adaptive coding and modulation approach aiming to predict the most suitable modulation and coding scheme for each communication state, based on channel state estimation and a Markov propagation model. The paper introduces the concept of state estimation decision reliability and transmission reliability. Different from other approaches, the state‐driven algorithm allows to increase the system reliability by lowering the outage probability in the selected scenarios. The effectiveness of the proposed approach has been validated by resorting to numerical results after a careful parameter optimization. Copyright © 2015 John Wiley & Sons, Ltd.     

Performance study of 16-ary deqam modem for future satellite communication systems

This paper investigates the effects of additive white Gaussian noise (AWGN), adjacent-channel interference (ACI) and co-channel interference (CCI) combined with flat fading on the performance of bandlimited 16-ary differentially encoded quadrature amplitude modulation (16-ary DEQAM) signalling transmitted through a non-linear high-power amplifier (HPA). It is assumed that the HPA exhibits both AM-AM and AM–PM conversion distortions. This situation may be applied to the up-link or down-link of a regenerative satellite system where the HPA is the earth-station travelling-wave tube (TWT) or the on-board TWTA, respectively. The signal-to-noise ratio (SNR) degradations at a specific bit error rate (BER) are evaluated by means of a series of computer simulation tests for various values of channel roll-off factor α (channel bandwidth) and different degrees of output backoff (OBO) of the HPA in the presence of various combinations of the channel impairments. It is shown that by employing a baseband or RF predistortion technique for the HPA and selecting the best arrangement of channel roll-off factor, OBO value of the HPA and channel spacing, a good performance can be achieved regarding the most efficient use of bandwidth together with a minimum SNR degradation due to the presence of channel impairments. Thus, the use of 16-ary DEQAM for satellite communications is feasible in the near future.     

Frequency recovery techniques for TM/TC satellite modem in critical scenarios

Reliability and effectiveness are essential features of satellite transceivers for telemetry and telecommand applications. Modem performance has a strong impact on the success of a satellite mission, in particular, during critical scenarios as the early operation phase, the disposal of a satellite at the end of its life, or the deep‐space missions. In these specific mission critical scenarios, fast and correct data reception is even more important than high channel capacity. An unknown and fast variable channel condition, which can be caused by uncertain spacecraft attitude and large Doppler shift with respect to the data rate, requires efficient and innovative receiver architecture. This paper introduces a complete digital implementation of a transceiver for TM/TC application in low Earth orbit mission that is perfectly compliant with aforementioned requirements. Particular attention is dedicated to the definition and selection of the most appropriate frequency recovery technique; 2 open‐loop techniques that are derived from ML optimal estimator are presented and compared. Additionally, the performance of the proposed receiver is extensively studied and compared with an incoherent technique that is based on the double differential PSK modulation and is known to be suitable for sat‐com in critical scenarios.     

DFE architectures for high-speed backplane applications

Embedded and look-ahead decision feedback equalisation (DFE) architectures are proposed to overcome the speed bottleneck of DFE design for high-speed backplane applications. DFE design examples simulated in 0.18 /spl mu/m CMOS technology demonstrate the feasibility of 10Gbit/s operation over a 34-inch FR4 backplane.     

A flexible LEO satellite modem with Ka‐band RF frontend for a data relay satellite system

From a geostationary Earth orbit (GEO) satellite's perspective, a low Earth orbit (LEO) satellite is visible on more than half of its orbit. Albeit the free‐space loss of an inter‐satellite link is much higher than the one of a direct ground link, considerable data rates and download volumes can be achieved. In this paper, we describe the system architecture of an integrated approach for a data relay satellite system and the development of LEO satellite and ground station modems. The approach allows serving several small and inexpensive LEO satellites at the same time both with low rate telemetry/telecommand links and with high rate download of sensor data.     

Commercial satellite applications for heterojunctionmicroelectronics technology

Future commercial satellite-based communication systems will be supporting a variety of high data-rate consumer and business applications, including universal telephony access, computer networking, teleimaging, telecommuting, videoconferencing, and high-speed Internet. In response to the anticipated system-performance requirements, heterojunction technology for ultra-low noise amplifiers (LNAs), high-efficiency power amplifiers, and high-speed analog/digital circuits capable of operating at multigigabit per second rates are being developed. An overview of the status and issues related to this development effort is presented     

Matrix amplifiers for communication satellite applications

Matrix amplifier architectures are capable of providing channel-to-beam allocation flexibility for the next generation of multibeam satellite applications. The author considers the implementation aspects of such amplifiers. Network configurations which make the architecture possible are presented as well as measured results. Solid-state power amplifier characteristics for satisfactory operation of matrix amplifiers are considered and measured results on a unit are presented     

BiCMOS nonthreshold logic for high-speed low-power applications

New high-speed low-power BiCMOS nonthreshold logic (BNTL) circuits are presented. These circuits offers a built-in CMOS and bipolar level conversion and are suitable for reduced power supply voltage. A 4-b carry lookahead generator (CLG) circuit is designed in BNTL, ECL, and CMOS using 0.8-μm BiCMOS technology. Circuit simulations show that this new logic provides speed comparable to or better than that provided by emitter-coupled logic (ECL) for lower power dissipation     

Impedance-matched optical link for C-band satellite applications

Optical transmitter and receiver modules with passive impedance-matching circuits have been designed, constructed, and tested. A direct current modulated InGaAs DFB laser, operating at 1.3 micron, and an InGaAs PIN photodiode were matched to 50 ohms with passive, mixed lumped and distributed element, matching circuits. A link-insertion loss of 21 dB with a 3 dB bandwidth of 900 MHz has been demonstrated. Through the use of higher-order matching circuits, link-insertion loss variations across the satellite downlink frequency band (3.6-4.2 GHz) have been kept below ±0.5 dB     

QoS for multimedia applications in satellite systems

We present a policy for handling multimedia traffic over satellite air interfaces. It extends the advantages of ATM to satellite by the statistical multiplexing of variable-rate traffic sources. Effectiveness is assessed within a multimedia satellite platform called EuroSkyWay, based on Ka-band payload and on-board processing     

A code-division switch architecture for satellite applications

This paper introduces a code-division methodology into switching applications. The proposed method is applied in satellite-switched code-division multiple-access (SS/CDMA) systems for routing CDMA traffic channels on board the multibeam satellites. We present code-division switch (CDS) architectures, analyze the CDS performance, and assess its complexity. The CDS has been shown to route CDMA user channels without introducing interference. The proposed CDS architecture is nonblocking, and its hardware complexity and speed are proportional to the size of the switch. We also examine the amplitude distribution of the combined signal in the CDS bus and the interference evaluation of the end-to-end link in the proposed applications. Then we consider the problem of switch control under an optimum or a random algorithm and compare its complexity with the equivalent problem in time-multiplexed switching methods     

Power efficient high-speed DAC for wideband communication applications

This paper demonstrates a power efficient design of high-speed Digital-to-Analog Converters (DACs) for wideband communication systems. For Wireless personal area network applications with a 250 MHz signal bandwidth, a 6 bit DAC capable of two times the Nyquist rate sampling is implemented in a current steering segmented 2 + 4 architecture optimized for power efficiency. Along with a proposed master-slave deglitch circuit, several circuit techniques are investigated to improve dynamic performances such as linearity. Implemented in a 0.18 um CMOS process, our DAC achieved a superior conversion performance over the state-of-the-arts, exhibiting integral nonlinearity of less than 0.27 LSB and differential nonlinearity of less than 0.15 LSB. Measured spurious free dynamic range for 251 MHz output signal is 40.92 dB, with total power consumption at 1 GS/s of 6mW, yielding a figure-of-merits of 78.3 pJ/(conversion step*W).     

A low-jitter mixed-mode DLL for high-speed DRAM applications

This paper presents a salient clock deskewing method with a mixed-mode delay-locked loop (MDLL) for high-speed synchronous DRAM applications. The presented method not only solves the resolution problem of conventional digital deskewing circuits, but also improves the jitter performance to the level of well-designed analog deskewing circuits, while keeping the power consumption and locking speed of digital deskewing circuits. The whole deskewing circuit is fabricated in a 3.3-V 0.6-μm triple-metal CMOS process and occupies a die area of 0.45 mm². Measured rms jitter is 6.38 ps. The power consumption of the entire chip, including I/O peripherals, is 33 mW at 200 MHz with a 3.3-V supply