Improved SDR Frequency Tuning Algorithm for Frequency Hopping Systems

Frequency hopping (FH) is a common characteristic of a wide variety of communication systems. On the other hand, software‐defined radio (SDR) is an increasingly utilized technology for implementing modern communication systems. The main challenge when trying to realize an SDR FH system is the frequency tuning time, that is, the higher the hopping rate, the lower the required frequency tuning time. In this paper, significant universal hardware driver tuning options (within GNU Radio software) are investigated to discover the tuning option that gives the minimum frequency tuning time. This paper proposes an improved SDR frequency tuning algorithm for the generation of a target signal (with a given target frequency). The proposed algorithm aims to improve the frequency tuning time without any frequency deviation, thus allowing the realization of modern communication systems with higher FH rates. Moreover, it presents the design and implementation of an original GNU Radio Companion block that utilizes the proposed algorithm. The target SDR platform is that of the Universal Software Radio Peripheral USRP‐N210 paired with the RFX2400 daughter board. Our results show that the proposed algorithm achieves higher hopping rates of up to 5,000 hops/second.     

Implementation of Reconfigurable Transceiver using GNU Radio and HackRF One

Relying on the past technology radio reception through hardware needs front end tuning which in turn internally changes the frequency of the capacitor. Thus the conventional radio can capture the required frequency by tuning manually. As the technology advances the wireless technology shown the light of cognition through which real time data transmission and reception are implemented using reconfigurable radio i.e., Software Defined Radio (SDR) whose physical layer functions are mainly or fully defined by software. In this paper, HackRFOne (Software defined Radio SDR) is tuned to the required radio frequency by employing GNU Radio Companion and Gqrx (spectrum viewer), where both GNU Radio and Gqrx are an open ended software. Cognitive Radio have revealed that by varying the software, the hardware adjustment is possible only within a fraction of the time. However, this requires more knowledge on signal processing blocks so that adjusting certain parameters like gain and frequency of filter can be made in the receiver side. The goal of this paper is to focus on the signal processing blocks which plays vital role in implementing the transmitter / receiver for reconfigurable wireless communication system.

     

Design and rapid prototyping of SCA-compliant public safety P25 waveform and P25?CFM3TR?CVoIP bridge

Establishing radio communication between military commanders, soldiers and law enforcement officers is an important enabling capability to facilitate interoperability. The Joint Tactical Radio System (JTRS) program is enabling communications within the military by implementing different military radio waveforms on software defined radio (SDR) platforms. It is logical to include a Project 25 (P25) public safety waveform in the JTRS waveform portfolio. This paper describes the rapid development of a P25 waveform on a surrogate JTRS SDR platform. The development process and methodology, which starts from a platform agnostic executable waveform model in Matlab, through an intermediate implementation using open tools on generic platforms, to the final platform-specific implementation, is introduced and discussed. This paper shows that adopting this methodology can speed up waveform development and porting. Furthermore, this paper presents the design and implementation of a three way voice bridge among P25, the future multiband multiwaveform modular tactical radio (FM3TR), and voice over Internet Protocol (VoIP), with software communication architecture (SCA) compliant implementation for both the P25 and FM3TR waveforms. This paper shows that critical issues such as interoperability can be tackled efficiently by leveraging SDR and SCA.     

Code Parallelization for Multi-Core Software Defined Radio Platforms with OpenMP

Since the number of processing cores in a General Purpose Processor (GPP) increases steadily, parallelization of algorithms is a well known topic in computer science. Algorithms have to be adapted to this new processor architecture to fully exploit the available processing power. This development equally affects the Software Defined Radio (SDR) technology because the GPP has become an important processor for SDR platforms. To make use of the entire processing power of a multi-core GPP and hence to avoid system inefficiency, this work provides an approach to parallelize C/C+ + code using OpenMP. This application programming interface provides a rapid way to parallelize code using compiler directives inserted at appropriate positions in the code. The processing load can be shared between all available cores. We use Matlab Simulink as a framework for a model-based design and evaluate the processing gain of embedded handwritten C-code blocks with OpenMP support.We will show that with OpenMP the core utilization is increased. Compared to a single-core GPP, we will present the increase of the processing speed depending on the number of cores. We will also highlight the limitations of code parallelization. In our results, we will show that a straightforward implementation of algorithms without multi-core consideration will cause an underutilized system.     

Exploration of Soft-Output MIMO Detector Implementations on Massive Parallel Processors

Emerging Software Defined Radio (SDR) baseband platforms are based on multiple processors with massive parallelism. Although the computational power of these platforms would theoretically enable SDR solutions with advanced wireless signal processing, existing work implements still rather basic algorithms. For instance, current Multiple-Input Multiple-Output (MIMO) detector implementations are typically based on simple linear hard-output and not on advanced near-Maximum Likelihood (ML) soft-output detection. However, only the latter enables to exploit the full potential of MIMO technology. In this work, we explore the feasibility of advanced soft-output near-ML MIMO detectors on massive parallel processors. Although such detectors are considered to be very challenging due to their high computational complexity, we combine architecture-friendly algorithm design, application specific instructions and instruction-level/data-level parallelism explorations to make SDR solutions feasible. We show that, by applying the proposed combination of techniques, it is possible to obtain SDR implementations which can deliver data rates that are sufficient for future wireless systems. For example, a 2 × 4 Coarse Grain Array (CGA) processor with 16-way Single Instruction Multiple Data (SIMD) can deliver 192/368 Mbps throughput for 2 × 2 64/16-QAM transmissions. Finally, we estimate the area and power consumption of the programmable solution and compare it against a traditional Application Specific Integrated Circuit (ASIC) approach. This enables us to draw conclusions from the cost perspective.     

Effective autocorrelation-based spectrum sensing technique for cognitive radio network applications

Spectrum sensing based on detection techniques enables cognitive radio networks to detect vacant frequency bands. The spectrum sensing gives the opportunity to increase the radio spectrum channels re-utilization. However, the main challenge in spectrum sensing is the simplicity of the considered detection approach and the amount of prior information needed to make an accurate decision. This paper proposes a novel sensing technique based on the autocorrelation function. This novel approach is based on the speed of convergence to zero of all autocorrelation coefficients. This technique shows the highest probability of detection for the same probability of false alarm target at low signal-to-noise ratio (SNR) compared with many standard detection techniques. The proposed method has been implemented using GNU Radio software and SDR (software-defined radio) platforms. The experimental results show the effectiveness of the proposed method under real scenarios.     

一种低功耗软件无线电信号处理平台

介绍一种应用于软件无线电的数字信号处理平台,通过对平台设计架构、硬件实现方案及软件可配置功能的阐述,提出了GMSK和CPM两种无线通信波形软件实现方案。该平台采用OMAP+FPGA的架构,具有通用性好、扩展性强等特点,适合于高性能、低功耗的应用场合,可广泛应用于在无线通信、导航定位、图像处理等数字信号处理领域。     

OFDM系统中ICI自消除算法研究

OFDM系统对频率偏移极为敏感,频率偏移将导致子载波之间失去正交性,于是产生子载波干扰（ICI）,从而降低系统性能。通过对有效抑制ICI的方法—ICI自消除算法进行研究,分析了ICI自消除算法对OFDM系统的影响。在软件无线电（GNU Radio）平台上搭建该系统,并在实际环境中运行。研究结果表明：与传统OFDM系统相比,ICI自消除算法使OFDM系统的误码率得到改善。     

Power consumption benchmarking for reconfigurable platforms

Software defined radios (SDR) wideband mobile terminals must be capable of data processing while consuming low power and keeping the design and manufacturing costs as low as possible. SDR can combine high performance signal processing and flexibility, but power efficiency of SDR nodes is an issue that needs to be addressed. Analysis of power consumption for various target technologies is challenging, since each technology typically contains its own benchmarking tools and thus, results are not comparable. In this paper, we illustrate how the GroundHog2009 benchmark suite, designed to be platform independent, can be used to evaluate power dissipation of four modern FPGAs and one microcontroller. We also introduce a generic RTL library for the GroundHog2009 design cases and test bench infra-structure to make the toolset usage easy. In addition, we show that power can be saved by using clock management, available on one of the FGPA-boards. The power savings range from 38 to 1,150?%.     

DFC++ Processing Framework Concept

Development of modern Software Defined Radio (SDR) based communication systems can be accelerated significantly by the use of processing frameworks. The evolution of SDR and the involved departure from digital representations of classical radio architecture towards more abstract software systems raises new requirements of increased flexibility and versatility. The proposed Data Flow Control for C++ (DFC++) processing framework concept addresses those requirements by employing modern programming techniques and flow control mechanisms to allow for variable data rates, dynamic paths, and flexible component designs. Another important trend is the integration of various embedded platforms in the software radio domain. The rapidly increasing performance and efficiency of embedded processors enables the deployment of SDR systems in more space and power constrained environments. Therefore covering a heterogeneous hardware selection becomes increasingly important for processing frameworks. By relying exclusively on C++ and minimizing external dependencies, DFC++ is specifically aiming for excellent portability and adaptability to support a wide range of current and future software radio projects while maintaining high performance and ease of use. This paper introduces the key aspects of the DFC++ concept and implementation with focus on the reference pointer based data transport mechanisms responsible for the propagation of user data between different processing components.     

A distributed polling service‐based MAC protocol testbed

Medium access control (MAC) protocols play a vital role in wireless networking. It is well‐known that the high control overhead of IEEE 802.11 MAC is the limiting factor on the throughput and delay performance of wireless networks. In our prior work, three polling service‐based medium access control protocols (PSMACs) are developed to amortize the high control overhead over multiple frame transmissions, thus achieving higher efficiency. Both analysis and simulations are conducted to validate the efficacy of the proposed protocols. In this paper, we extend this work by implementing the distributed version of PSMAC, i.e., PSMAC 2, on the GNU Radio and universal software radio peripheral (GNU Radio/USRP) platform. We discuss various design considerations and challenges of prototyping PSMAC 2 and carry out extensive experimental studies with the GNU Radio/USRP PSMAC testbed. Our experimental results are found to be consistent with the theoretical study reported in our prior work and validate the advantages of PSMAC under a realistic wireless channels. Copyright © 2013 John Wiley & Sons, Ltd.     

软件无线电信道处理的DSP实现

本文重点研究了软件无线电(Software Defined Radio,SDR)中不同信道的处理技术,其技术关键在于构建不同频段的数字滤波器进行不同信道信息的接收处理.在建立软件无线电信道模型的基础上,利用MATLAB实现了多阶FIR滤波器的设计,并将算法移植到DSP软件设计当中,在DSP的集成开发环境CCS下对FIR滤波进行了仿真,仿真结果达到了SDR的信道处理要求.     

Implementation of an SDR system using an MPI-based GPU cluster for WiMAX and LTE

This paper presents an implementation of a 2?×?2 Multi-Input Multi-Output Software Defined Radio (SDR) Base Station system using a Message Passing Interface (MPI)-based Graphic Processing Unit (GPU) cluster as its modem processor for a high-speed data processing. Recently, GPUs have been widely researched especially for SDR systems because of their capability for exploiting parallel processing using a large number of Arithmetic Logic Units. MPI-based GPU clusters have been adopted in order to further increase performance capability. From our experimental results, it has been found that the implemented system consisting of three GPU nodes can enhance the modem speed by more than 2.5 times compared to a single GPU system. A dual-mode Mobile Device (MD) prototype supporting Worldwide Interoperability for Microwave Access and Long Term Evolution communications systems is implemented. In our design, one of the two waveforms can automatically be selected by the MD itself using a dual-mode controller that determines the reconfiguration of the MD modem depending on the received signal quality.     

Energy Aware Signal Processing for Software Defined Radio Baseband Implementation

The fast pacing diversity and evolution of wireless communications require a wide variety of baseband implementations within a short time-to-market. Besides, the exponentially increased design complexity and design cost of deep sub-micron silicon highly desire the designs to be reused as much as possible. This yields an increasing demand for reconfigurable/ programmable baseband solutions. Implementing all baseband functionalities on programmable architectures, as foreseen in the tier-2 SDR, will become necessary in the future. However, the energy efficiency of SDR baseband platforms is a major concern. This brings a challenging gap that is continuously broadened by the exploding baseband complexity. We advocate a system level approach to bridge the gap. Specifically, we fully leverage the advantages (programmability) of SDR platforms to compensate its disadvantages (energy efficiency). Highly flexible and dynamic baseband signal processing algorithms are designed and implemented to exploit the abundant dynamics in the environment and the user requirement. Instead of always performing the best effort, the baseband can dynamically and autonomously adjust its work load to optimize the average energy consumption. In this paper, we will introduce such baseband signal processing techniques optimized for SDR implementations. The methodology and design steps will be presented together with 3 representative case studies in HSDPA, WiMAX and 3GPP LTE.     

基于GNU Radio和USRP的路测仪设计

提出了一种采用GNU Radio技术及与其配套的硬件前端USRP设计和实现GSM900M路测仪的设计方法,配合使用全球定位系统GPS就能够实现采集信号电平、获得信令数据等功能。该系统设备成本低,使用纯软件的信号处理,具有很大的灵活性;采用高级语言进行系统开发,扩展性和可移植性强,开发周期短,降低了系统的维护和升级成本。最后通过实测验证了该系统在实际环境中的可行性和有效性。     

Effective GPS Jamming Techniques for UAVs Using Low-Cost SDR Platforms

Lately, a rising number of incidents between unmanned aerial vehicles (UAVs) and airplanes have been reported in airports and airfields. In order to help cope with the problem of unauthorized UAV operations, in this paper we evaluate the use of low cost SDR platforms (software defined radio) for the implementation of a jammer able to generate an effective interfering signal aimed at the GPS navigation system. Using a programmable BladeRF x40 platform from Nuand and the GNU radio software development toolkit, several interference techniques were studied and evaluated, considering the spectral efficiency, energy efficiency and complexity. It was shown that the tested approaches are capable of stopping the reliable reception of the radionavigation signal in real-life scenarios, neutralizing the capacity for autonomous operation of the vehicle.

     

Instruction Set Extensions for Matrix Decompositions on Software Defined Radio Architectures

Emerging wireless applications consistently demand higher data rates. Unfortunately, it is challenging to achieve high data rates within the limited amount of available frequency spectrum. Hence, enhanced spectral efficiency and link reliability within the available frequency spectrum are of the utmost importance in current and next generation wireless protocols. To attain high spectral efficiency and link reliability, wireless protocols employ increasingly complex 2-dimensional techniques that involve computationally-intensive matrix operations. Multiple-Input Multiple-Output (MIMO) communication is an example of a promising technique employed by wireless protocols to deliver higher data rates at the cost of increased algorithmic complexity. Application Specific Integrated Circuits (ASICs) have traditionally been used to implement compute-intensive wireless protocols. The wireless industry has been gradually moving towards an alternative programmable platform called Software Defined Radio (SDR) due to its significant benefits, such as reduced development costs, and accelerated time-to-market. The computationally-intensive matrix operations used in current and next generation wireless protocols are extremely expensive to implement in SDR platforms with conventional Digital Signal Processor (DSP) instruction sets. Hence there is a need for novel instructions, hardware designs and algorithm enhancements to enable higher spectral efficiency on SDR platforms. In this paper, we propose Single Instruction Multiple Data (SIMD) CoOrdinate Rotation DIgital Computer (CORDIC) instruction set extensions with CORDIC hardware support to speedup computationally-intensive matrix decomposition algorithms. The CORDIC instruction set extensions have been implemented on the Sandbridge Sandblaster SB3000 SDR platform and evaluated on conventional algorithms used for decomposing a closed loop 4-by-4 Worldwide Interoperability for Microwave Access (WiMAX) MIMO channel into independent Single-Input Single-Output (SISO) channels. Our experimental results on the closed-loop MIMO channel decomposition using CORDIC instructions demonstrate more than 6x speedup over a Sandblaster baseline implementation that uses state-of-the-art SIMD DSP instructions. The CORDIC instructions also provide similar numerical accuracy when compared to the baseline implementation. The techniques we propose in this paper are also applicable to other SDR and embedded processor architectures.     

Implementation of LTE system on an SDR platform using CUDA and UHD

In this paper, we present an implementation of a long term evolution (LTE) system on a software defined radio (SDR) platform using a conventional personal computer that adopts a graphic processing unit (GPU) and a universal software radio peripheral2 (USRP2) with a URSP hardware driver (UHD) to implement an SDR software modem and a radio frequency transceiver, respectively. The central processing unit executes C++ control code that can access the USRP2 via the UHD. We have adopted the Ettus Research UHD due to its high degree of flexibility in the design of the transceiver chain. By taking advantage of this benefit, a simple cognitive radio engine has been implemented using libraries provided by the UHD. We have implemented the software modem on a GPU that is suitable for parallel computing due to its powerful arithmetic and logic units. A parallel programming method is proposed that exploits the single instruction multiple data architecture of the GPU. We focus on the implementation of the Turbo decoder due to its high computational requirements and difficulty in parallelizing the algorithm. The implemented system is analyzed primarily in terms of computation time using the compute unified device architecture profiler. From our experimental tests using the implemented system, we have measured the total processing time for a single frame of both transmit and receive LTE data. We find that it takes 5.00 and 8.58 ms for transmit and receive, respectively. This confirms that the implemented system is capable of real-time processing of all the baseband signal processing algorithms required for LTE systems.     

基于AD6624的CDMA反向基带滤波器的设计

本文在分析软件无线电的宽带数字中频和数字下变频的基本模型基础上,结合ADI公司推出的接收信号处理器芯片AD6624的工作原理,提出CDMA基站反向链路中基带信号处理的设计方案,并详细讨论了基带滤波器的设计方法,同时给出了仿真结果。     

RF Band‐Pass Sampling Frontend for Multiband Access CR/SDR Receiver

Radio frequency (RF) subsampling can be used by radio receivers to directly down‐convert and digitize RF signals. A goal of a cognitive radio/software defined ratio (CR/SDR) receiver design is to place the analog‐to‐digital converter (ADC) as near the antenna as possible. Based on this, a band‐pass sampling (BPS) frontend for CR/SDR is proposed and verified. We present a receiver architecture based second‐order BPS and signal processing techniques for a digital RF frontend. This paper is focused on the benefits of the second‐order BPS architecture in spectrum sensing over a wide frequency band range and in multiband receiving without modification of the RF hardware. Methods to manipulate the spectra are described, and reconstruction filter designs are provided. On the basis of this concept, second‐order BPS frontends for CR/SDR systems are designed and verified using a hardware platform.