H.264解码器帧内预测模块的优化

提出一种H.264帧内预测的优化实现结构.该结构对帧内预测模块做了两方面的优化:一是结合环路滤波,去除了目前帧内预测模块中片上空间(SRAM)的冗余存储;二是针对4×4亮度块的预测模式获取过程相对复杂的特点,采取了预先判断并存储相邻块预测模式的措施.提出的帧内预测结构在减少片上存储空间需求的同时,减少了处理器和片外存储空间(SDRAM)的数据交互次数.由实验结果可知,相对于优化前,帧内预测模块的性能提高了10％以上.     

一种H.264/AVC帧内4x4预测算法的高效流水线结构

H.264编码器中的帧内4x4预测部分具有严重的数据依赖性,它的硬件化设计很难采用流水线实现,从而导致关键路径很长,硬件利用率很低,成为H.264编码器设计中的一个瓶颈。针对这个问题, 在不减少预测模式和不增加系统资源的的前提下,本文提出了一种新的结构,它通过利用原始像素进行模式判决和利用重构像素进行帧内预测的方法,可以使帧内预测与重构循环完全流水线实现,基本上达到了100%的硬件利用率,而且没有明显的PSNR的损失。本文所提出的硬件结构可在215个时钟周期内完成一个宏块的帧内4x4预测。用SMIC 0.13um工艺库综合,结果显示该结构最高可运行在250M,面积约为116K门,可支持4096x2160@30fps视频序列的实时编码。     

General Architecture for MPEG-2/H.263/H.264/AVC to H.264/AVC Intra Frame Transcoding

The latest international video-coding standard H.264/AVC significantly achieves better coding performance compared to prior video coding standards such as MPEG-2 and H.263, which have been widely used in today’s digital video applications. To provide the interoperability between different coding standards, this paper proposes an efficient architecture for MPEG-2/H.263/H.264/AVC to H.264/AVC intra frame transcoding, using the original information such as discrete cosine transform (DCT) coefficients and coded mode type. Low-frequency components of DCT coefficients and a novel rate distortion cost function are used to select a set of candidate modes for rate distortion optimization (RDO) decision. For H.263 and H.264/AVC, a mode refinement scheme is utilized to eliminate unlikely modes before RDO mode decision, based on coded mode information. The experimental results, conducted on JM12.2 with fast C8MB mode decision, reveal that average 58%, 59% and 60% of computation (re-encoding) time can be saved for MPEG-2, H.263, H.264/AVC to H.264/AVC intra frame transcodings respectively, while preserving good coding performance when compared with complex cascaded pixel domain transcoding (CCPDT); or average 88% (a speed up factor of 8) when compared with CCPDT without considering fast C8MB. The proposed algorithm for H.264/AVC homogeneous transcoding is also compared to the simple cascaded pixel domain transcoding (with original mode reuse). The results of this comparison indicate that the proposed algorithm significantly outperforms the mode reuse algorithm in coding performance, with only slightly higher computation.     

利用高效带宽结构设计H.264/AVC解码器的动态补偿模块

在本文,我们提出了一个基于分块聚类的方法来减少H.264/AVC解码器里面的动态补偿模块存储器存取的次数。利用将在一个宏区块内可能重用的4x4单元块分组来分享载入的参考数据,而存储器存取的次数能被有效地减少到平均70%。此外,在访问外部SDRAM时采用指令重新排序减少预充电(Precharge)/激活(active)的次数可以达到原来的60%。从我们的仿真结果可以看到,处理一个宏区块总的存储器存取的次数低于400次。这个方法对动态补偿模块硬件设计的不同面积大小的内部存储器是可调整的。     

H.264/AVC帧内预测模式的快速选择算法

H.264/AVC帧内预测技术采用率失真优化策略进行最优化编码模式选择,提高了I帧的编码效率,但同时也提高了计算复杂度。提出了一种帧内预测模式的快速选择算法,基于亮度块的方向特性,通过一些复杂度不大的计算,选择少数几个可能性较大的预测模式进行率失真代价计算,得到最佳亮度预测模式,并以SATD计算代替率失真代价计算选择最佳色度预测模式,降低了计算复杂度,提高了编码速度。实验结果表明,提出的算法在保证图像质量的同时,编码时间平均降低了48%,而码率增加很小。     

适用于H.264/AVC的快速帧内预测算法

帧内预测算法极大地提高了I帧的压缩比率,但极高的计算复杂度与视频系统中计算资源有限、应用环境实时性要求高形成矛盾.本文提出了帧内预测快速算法,根据图像复杂程度进行块尺寸的选择,对于4×4块,利用环形滑动窗口动态缩小预测模式选择范围,定义简化的块匹配准则并采用计算及时终止策略.实验证明,在保持恢复图像质量几乎不降的同时,速度能提高到两倍多.快速算法具有额外计算量小,提速效果明显等特点.     

A Two-Result-per-Cycle Deblocking Filter Architecture for QFHD H.264/AVC Decoder

We propose a high-performance hardwired deblocking filter for H.264/AVC decoding. To decode QFHD (3840 $times$ 2160, i.e., four times full HD) ultra high definition video, we minimize number of processing cycles, working frequency and amount of external memory traffic. We propose a novel filtering order and employ a 5-stage pipelined and resource-shared dual-edge filter to generate two filtering results every cycle. Taking advantage of skip modes, our filter takes only 48 cycles to filter a macroblock in the best case and 100 in the worst case. Furthermore, it eliminates most unnecessary off-chip memory traffic with a novel on-chip memory scheme. Our design can support QFHD at 30 fps application by running only at 98 MHz.      

A Segmentation-Based Chroma Intra Prediction Coding Scheme for H.264/AVC

In this paper, we propose a novel segmentation-based intra prediction coding scheme for low-bitrate video coding. Different coding schemes are separately designed for the luma and chroma components in our proposed method. The traditional block-based coding scheme is still used for the luma components, and the segmentation-based coding scheme is developed for the chroma components. The segmentation operation is used for the reconstructed luma components, which groups similar pixels together and produces a set of homogenous regions. Here, these local and homogenous regions are referred to superpixels. By utilizing the spatial correlation between the luma and chroma planes, we transfer the segmentation result of the luma components to the chroma components, which will not induce any side information in the chroma intra prediction coding. Instead of using the macroblock (MB) as the coding unit, the proposed method implements the chroma intra prediction in each superpixel, and the original pixels in each superpixel are employed to substitute the neighboring reconstructed samples in the prediction process. The experimental results show that the proposed method can achieve an average 0.20 dB and up to 0.63 dB coding gains in comparison to the directional intra prediction scheme for H.264/AVC low-bitrate video coding.     

Intra Prediction for the Hardware H.264/AVC High Profile Encoder

The hardware implementation of the intra prediction described in this paper allows the H.264/AVC encoder to achieve optimal compression efficiency in real-time conditions. The architecture has some features that distinguish it from other solutions described in literature. Firstly, the architecture supports all intra prediction modes defined in High Profile of the H.264/AVC standard for all chroma formats. Secondly, the architecture can generate predictions for several quantization parameters. Thirdly, the hardware cost is reduced as the same resources are used to compute prediction samples for all the modes. Fourthly, the high sample-generation rate enables the encoder to achieve high throughputs. Fifthly, 4?×?4 block reordering and interleaving with other modes minimize the impact of the long-delay reconstruction loop on the encoder throughput. The architecture is verified against the JM.12 reference model and within the real-time FPGA hardware encoder. The synthesis results show that the design can operate at 100 MHz and 200 MHz for FPGA Aria II and 0.13 μm TSMC technology, respectively. These frequencies allow the encoder to support 720p and 1080p video at 30 fps.     

一种H.264/AVC帧内预测模式的快速选择算法

H.264/AVC帧内预测技术采用率失真优化策略进行最优化编码模式选择,提高了I帧的编码效率,但同时也提高了计算复杂度。本文提出了一种帧内预测模式的快速选择算法,基于亮度块的方向特性,通过一些复杂度不大的计算,选择少数几个可能性较大的预测模式进行率失真代价计算,得到最佳亮度预测模式,并以 计算代替率失真代价计算选择最佳色度预测模式,降低了计算复杂度,提高了编码速度。实验结果表明,本文提出的算法在保证图像质量的同时,编码时间平均降低了48%,而码率增加很小。     

一种新的H.264/AVC帧内模式快速选择算法

利用改进的模糊积分准则提前对宏块的类型进行判定,实现Intra_4×4和Intra_16×16模式的快速选择,对于Intra_4×4模式,采用改进的平方梯度法估计块的纹理方向,从而排除可能性小的预测模式,提高帧内编码速度.试验表明该算法在基本保持编码性能的同时,可显著降低帧内预测的复杂度.     

基于H.264/AVC和AVS的视频解码芯片系统结构设计

对H.264/AVC和AVS的宏观算法和局部异同点进行了分析,提出了基于H.264/AVC和AVS的视频解码器芯片系统结构,以满足高处理能力和高吞吐量的要求.在此结构中,将混合视频编码框架分为5个处理核,各处理核通过不同参数的设置来实现相应标准的处理过程,实现硬件的可重用.采用多级混合的流水线结构,充分利用视频处理任务级的并行性,提高处理的吞吐量.采用3级的存储器系统结构,并对存储器结构的3个层次分别进行优化,有效提高了数据访问的效率核并行度.     

Adaptive Scanning for H.264/AVC Intra Coding

In this letter, an adaptive scanning that improves intra coding efficiency in the H.264/AVC standard is proposed. The proposed adaptive scanning utilizes the prediction directions (modes) that include the horizontal and vertical edge information in a block. Depending on the prediction directions, the proposed method uses three scanning methods: zigzag scanning, horizontal scanning, and vertical scanning. In the proposed method, horizontal and vertical scanning are used in vertical and horizontal prediction modes, respectively, and the normal zigzag scanning in the H.264 standard is used in all other intra prediction modes. The proposed method reduces the bit rate by approximately 2.5% compared with H.264/AVC, without the degradation of video quality.     

基于帧内预测模式的H.264/AVC视频信息嵌入算法

提出了一种基于帧内预测模式的H.264/AVC视频信息嵌入算法.在秘密信息进行嵌入时,根据人类视觉特性的掩蔽效应,筛选出I帧中纹理密集区域的4×4亮度块,确定为嵌入块.通过秘密信息调制4×4亮度块的预测模式最低有效位,完成秘密信息的嵌入.通过对算法进行仿真实验,证明本算法计算量小,能够实时处理.对视频载体影响小,有一定的嵌入容量,能够保证秘密信息的有效传输.     

H.264/AVC自适应算术解码器结构设计

限制基于上下文的二进制算术解码(CABAD)速度的几个主要环节入手,提出了优化的上下文存储模式,改进的重归一化单元,并使用流水线提高解码速度.在Synopsys公司的CoCentric System Studio平台进行了二进制算术解码器体系结构设计,仿真结果表明,本结构能够满足主要档次(main profile)CIF 30fps的实时解码的要求.     

一种高效可编程H.264/AVC比特流解析结构设计

在分析H.264/AVC比特流结构和位级处理需求的基础上,本文提出了一种用于H.264/AVC带有指令集的可编程比特流解析结构.由于它是基于硬件的结构,与通用RISC结构相比效率更高.实验表明,在以4 Mbit/s的比特率传输H.264/AVC主类720×576@25 f/s时,整个比特流解析仅需要14.3 MI/s.它还能灵活地应用到MPEG-2或其他不同的视频标准比特流解析中.     

Efficient Level and Zero Coding Methods for H.264/AVC Lossless Intra Coding

Since H.264/AVC was designed mainly for lossy video coding, the entropy coding methods in H.264/AVC are not appropriate for lossless video coding. Based on statistical differences of residual data in lossy and lossless coding, we develop efficient level and zero coding methods. Therefore, we design an improved context-based adaptive variable length coding (CAVLC) scheme for lossless intra coding by modifying the relative entropy coding parts in H.264/AVC. Experimental results show that the proposed method provides approximately 6.8% bit saving, compared with the H.264/AVC FRExt high profile.      

Design of High‐Speed CAVLC Decoder Architecture for H.264/AVC

In this paper, we propose hardware architecture for a high‐speed context‐adaptive variable length coding (CAVLC) decoder in H.264. In the CAVLC decoder, the codeword length of the current decoding block is used to determine the next input bitstreams (valid bits). Since the computation of valid bits increases the total processing time of CAVLC, we propose two techniques to reduce processing time: one is to reduce the number of decoding steps by introducing a lookup table, and the other is to reduce cycles for calculating the valid bits. The proposed CAVLC decoder can decode 1920×1088 30 fps video in real time at a 30.8 MHz clock.     

一种基于块纹理特性的H.264/AVC帧内预测算法

H.264/AVC视频编码在空域上从多个方向进行多种模式的帧内预测,并使用率失真优化(RDO)算法选择最佳模式,使其算法复杂度很高,无法满足实时视频的需求.为此,提出一种快速预测算法,利用宏块在一定方向上的像素差分和对宏块是否有明显纹理及纹理方向进行有效预判,并根据预判结果对块类型和预测模式进行选择,避免对各块进行所有模式的计算,从而有效地降低了复杂度.实验结果表明本算法在峰值信噪比(PSNR)和码率变化极小的情况下,编码速度有显著提高.