Formation of 0.05-μm p+-n and n+-pjunctions by very low (<500 eV) ion implantation

The current-voltage (I-V) characteristics of ultrashallow p⁺ -n and n⁺-p diodes, obtained using very-low-energy (<500-eV) implantation of B and As, are presented. the p⁺-n junctions were formed by implanting B⁺ ions into n-type Si (100) at 200 eV and at a dose of 6×10¹⁴ cm^-2, and n⁺-p junctions were obtained by implanting As⁺ ions into p-type (100) Si at 500 eV and at a dose 4×10¹² cm^-2. A rapid thermal annealing (RTA) of 800°C/10 s was performed before I-V measurements. Using secondary ion mass spectrometry (SIMS) on samples in-situ capped with a 20-nm ²⁸Si isotopic layer grown by a low-energy (40 eV) ion-beam deposition (IBD) technique, the depth profiles of these junctions were estimated to be 40 and 20 nm for p⁺-n and n⁺-p junctions, respectively. These are the shallowest junctions reported in the literature. The results show that these diodes exhibit excellent I-V characteristics, with ideality factor of 1.1 and a reverse bias leakage current at -6 V of 8×10^-12 and 2×10^-11 A for p⁺-n and n⁺-p diodes, respectively, using a junction area of 1.96×10^-3 cm²     

Yttrium oxide/silicon dioxide: a new dielectric structure forVLSI/ULSI circuits

Electrical characteristics of Al/yttrium oxide (~260 Å)/silicon dioxide (~40 Å)/Si and Al/yttrium oxide (~260 Å)/Si structures are described. The Al/Y₂O₃/SiO₂/Si (MYOS) and Al/Y₂ O₃/Si (MYS) capacitors show very well-behaved I-V characteristics with leakage current density <10^-10 A/cm² at 5 V. High-frequency C- V and quasistatic C-V characteristics show very little hysteresis for bias ramp rate ranging from 10 to 100 mV/s. The average interface charge density (Q_f+Q _it) is ~6×10¹¹/cm² and interface state density D_it is ~10¹¹ cm^-2-eV^-1 near the middle of the bandgap of silicon. The accumulation capacitance of this dielectric does not show an appreciable frequency dependence for frequencies varying from 10 kHz to 10 MHz. These electrical characteristics and dielectric constant of ~17-20 for yttrium oxide on SiO₂/Si make it a variable dielectric for DRAM storage capacitors and for decoupling capacitors for on-chip and off-chip applications     

InP/InGaAs heterojunction bipolar transistors grown by gas-sourcemolecular beam epitaxy with carbon-doped base

The first N-p-n InP/InGaAs heterojunction bipolar transistors (HBTs) with p-type carbon doping in InGaAs are reported. P-type carbon doping in the InGaAs base has been achieved by gas-source molecular beam epitaxy (GSMBE) using carbon tetrachloride (CCl₄) as the dopant source. The resulting hole concentration in the base was 1×10¹⁹ cm^-3. HBTs fabricated using material from this growth method display good I-V characteristics with DC current gain above 500. This verifies the ability to use carbon doping to make a heavily p-type InGaAs base of an N-p-n HBT     

Reduction of oxide charge and interface-trap density in MOScapacitors with ITO gates

The electrical properties of MOS capacitors with an indium tin oxide (ITO) gate are studied in terms of the number density of the fixed oxide charge and of the interface traps N_f and N _it, respectively. Both depend on the deposition conditions of ITO and the subsequent annealing procedures. The fixed oxide charge and the interface-trap density are minimized by depositing at a substrate temperature of 240°C at low power conditions and in an oxygen-rich ambient. Under these conditions, as-deposited ITO films are electrically conductive. The most effective annealing procedure consists of a two-step anneal: a 45-s rapid thermal anneal at 950°C in N₂, followed by a 30 min anneal in N₂/20% H₂ at 450°C. Typical values obtained for N_it and N_f are 4.2×10¹⁰ cm^-2 and 2.8×10¹⁰ cm^-2, respectively. These values are further reduced to 1.9×10¹⁰ cm^-2 and ≲5×10⁹ cm^-2, respectively, by depositing approximately 25 nm polycrystalline silicon on the gate insulation prior to the deposition of ITO     

Temperature dependence of common-emitter I-V andcollector breakdown voltage characteristics in AlGaAs/GaAs andAlInAs/GaInAs HBT's grown by MBE

Temperature-dependent measurements from 25 to 125°C have been made of the DC I-V characteristics of HBTs with GaAs and In_0.53Ga_0.47As collector regions. It was found that the GaAs HBTs have very low output conductance and high collector breakdown voltage BV_CEO>10 V at 25°C, which increases with temperature. In striking contrast, the In_0.53Ga_0.47As HBTs have very high output conductance and low BV_CEO~2.5 V at 25°C, which actually decreases with temperature. This different behavior is explained by the >10⁴ higher collector leakage current, I_CO, in In_0.53Ga_0.47As compared to GaAs due to bandgap differences. It is also shown that device self-heating plays a role in the I-V characteristics     

Electrical transport properties of crystalline siliconcarbide/silicon heterojunctions

The electrical transport properties of β-SiC/Si heterojunctions were investigated using current-voltage (I-V) and capacitance-voltage (C-V) characteristics. The heterojunctions were fabricated by growing n-type crystalline β-SiC films on p-type Si substrates by chemical vapor deposition (CVD). The I-V data measured at various temperatures indicate that at relatively high current, the heterojunction forward current is dominated by thermionic emission of carriers and can be expressed as exp(-qV_bi/kT ) exp(V/ηkT), where V_bi is the built-in voltage of the heterojunction and η(=1.3) is a constant independent of voltage and temperature. At lower current, defect-assisted multitunneling current dominates. The effective density of states and the density-of-states effective mass of electrons in the conduction band of SiC are estimated to be 1.7×10²¹ cm ^-3 and 0.78m₀, respectively. This study indicates that the β-SiC/Si heterojunction is a promising system for heterojunction (HJ) devices such as SiC-emitter heterojunction bipolar transistors (HBTs)     

GaAs MESFET device dependences on ion-implant tilt and rotationangles

Lightly Cr-doped liquid-encapsulated Czochralski (LEC) GaAs wafers were implanted with 5×10¹² 100-keV Si²⁹ ions/cm² at tilt angles between 0 and 13° and at rotation angles between 0 and 45°C. Capacitance-voltage measurements were then made to determine electron profiles. It was found that cross-wafer device uniformity can be improved using implant tilt angles greater than 9°. For microwave MESFET devices, the maximum transconductances at low I_DS are achieved using tilt angles greater than 6° and rotation angles greater than 30°     

Electrical characterisation of Si-dopedGaAs0.5Sb0.5 on InP grown by molecular beamepitaxy

Between the growth temperatures of 490-520°C Si-doped GaAs_0.5Sb_0.5 changes from 1×10¹⁷ cm^-3 n-type to 2×10¹⁷ cm^-3 p-type. The scattering mechanisms of the n and p-type epilayers are investigated. The reproducibility and potential applications of the observed conduction type change are demonstrated by the fabrication of a pn diode     

High-temperature Schottky diodes with thin-film diamond base

High-temperature (500-580°C) current-voltage (I-V ) characteristics of gold contacts to boron-doped homoepitaxial diamond films prepared using a plasma-enhanced chemical vapor deposition (CVD) method are described. Schottky diodes were formed using gold contacts to chemically cleaned boron-doped homoepitaxial diamond films. These devices incorporate ohmic contacts formed by annealing Au(70 nm)/Ti(10 nm) layers in air at 580°C. The experiments with homoepitaxial diamond films show that the leakage current density increases with the contact area. This implies that a nonuniform current distribution exists across the diode, presumably due to crystallographic defects in the diamond film. As a result, Au contacts with an area >1 mm² are essentially ohmic and can be used to form back contacts to Schottky diodes. Schottky diodes fabricated in this matter also show rectifying I-V characteristics in the 25-580°C temperature range     

Formation of cobalt silicided shallow junction using implantinto/through silicide technology and low temperature furnace annealing

This work investigates the shallow CoSi₂ contacted junctions formed by BF₂⁺ and As⁺ implantation, respectively, into/through cobalt silicide followed by low temperature furnace annealing. For p⁺n junctions fabricated by 20 keV BF₂⁺ implantation to a dose of 5×10¹⁵ cm^-2, diodes with a leakage current density less than 2 nA/cm² at 5 V reverse bias can be achieved by a 700°C/60 min annealing. This diode has a junction depth less than 0.08 μm measured from the original silicon surface. For n⁺p junctions fabricated by 40 keV As⁺ implantation to a dose of 5×10¹⁵ cm^-2, diodes with a leakage current density less than 5 nA/cm² at 5 V reverse bias can be achieved by a 700°C/90 min annealing; the junction depth is about 0.1 μm measured from the original silicon surface. Since the As⁺ implanted silicide film exhibited degraded characteristics, an additional fluorine implantation was conducted to improve the stability of the thin silicide film. The fluorine implantation can improve the silicide/silicon interface morphology, but it also introduces extra defects. Thus, one should determine a tradeoff between junction characteristics, silicide film resistivity, and annealing temperature     

Polysilicon emitter p-n-p transistors

In-situ boron-doped polysilicon has been used to form the emitter in p-n-p transistors. Various polysilicon deposition conditions, interface preparation treatments prior to deposition, and post-deposition anneals were investigated. Unannealed devices lacking a deliberately grown interfacial oxide gave effective emitter Gummel numbers G_E of 7-9×10^-12s cm^-4 combined with emitter resistances R_E of approximately 8 μΩcm². Introduction of a chemically grown interfacial oxide increased G_E to 2×10 ¹⁴s cm^-4, but also raised R_E by a factor of three. Annealing at 900°C following polysilicon deposition raised G_E values for transistors lacking deliberate interfacial oxide to approximately 6×10¹³s cm^-4, but had little effect of G_E for devices with interfacial oxide. Both types of annealed devices gave R_E values in the range 1-2 μΩcm²     

Rapid isothermal annealing of high- and low-energy ion-implantedInP and In0.53Ga0.47As

Rapid isothermal annealing (RIA) was performed on 0.5-16-MeV Si ⁺, 1-MeV Be⁺, and 150-keV Ge⁺ implanted InP:Fe and 380-keV Fe⁺ implanted InGaAs. Annealings were performed in the temperature range 800-925°C using an InP proximity wafer in addition to the Si₃N₄ dielectric cap. Dopant activations close to 100% were obtained for 3×10¹⁴ cm^-2 Si⁺ and 2×10¹⁴ cm^-2 Be⁺ implants in InP:Fe. For the elevated temperature (200°C) 1×10¹⁴ cm^-2 Ge⁺ implant, a maximum of 50% activation was obtained. No redistribution of dopant was observed for Si and Ge implants due to annealing. However, redistribution of dopant was seen for Be and Fe implants due to annealing. Phosphorous coimplantation has helped to eliminate the Be in-diffusion problem in InP, but did not help to reduce Fe in-diffusion and redistribution in InGaAs. Using an RIA cycle with low temperature and short duration is the only solution to minimize Fe redistribution in InGaAs     

Modeling hot-carrier effects in polysilicon emitter bipolartransistors

In self-aligned polysilicon emitter transistors a large electric field existing at the periphery of the emitter-base junction under reverse bias can create hot-carrier-induced degradation. The degradation of polysilicon emitter transistor gain under DC stress conditions can be modelled by ΔI_B∝I_R ^m+ntⁿ where n≈0.5 and m ≈0.5. The more complex relationships of Δβ(I _C, I_R, t) and β(I _C, I_R, t) result naturally from the simple ΔI_B model. Using these relationships the device lifetime can be extrapolated over a wide range of reverse stress currents for a given technology     

Thermal shifts of the spectral lines in the 4F3/2 to 4I11/2 manifold of anNd:YAG Laser

A report is presented of the thermal shifts of eleven of the twelve lines from the ⁴F_3/2 Stark energy levels to the ⁴I_11/2 energy levels in an Nd:YAG laser for a temperature change from 20-200°C. The thermal shift difference between the Stark sublevels R₁, R₂ in ⁴F_3/2 is found to be about -0.6±0.6 cm^-1/100°C. Within experimental uncertainty, all of the lasing lines either moved to longer wavelength or remained unchanged with increasing temperature     

Minority-carrier transport parameters in heavily doped p-typesilicon at 296 and 77 K

Minority-carrier electron lifetime, mobility and diffusion length in heavily doped p-type Si were measured at 296 and 77 K. It was found that a 296 K μ_n (pSi)≈μ_n (nSi) for N _AA≲5×10¹⁸ cm^-3, while μ_n (pSi)/μ_n (nSi)≈1 to 2.7 for higher dopings. The results also show that for N_AA≲3×10¹⁹ cm^-3, D (pSi) at 77 K is smaller than that at 296 K, while for higher dopings D_n (pSi) is larger at 77 K than at 296 K. μ_n (pSi) at 77 K increases with the increasing doping above N_AA>3×10¹⁸ cm^-3, in contrast to the opposite dependence for μ_n (nSi) in n⁺ Si     

A semi-empirical model for the field-effect mobility ofhydrogenated polycrystalline-silicon MOSFETs

The quantitative relationship between field-effect mobility (μ _FE) and grain-boundary trap-state density (N_t ) in hydrogenated polycrystalline-silicon (poly-Si) MOSFETs is investigated. The focus is on the field-effect mobility in MOSFETs with N_t 1×10² cm^-2. It is found that reducing N_t to as low as 5×10¹¹ cm^-2 has a great impact on μ_FE. MOSFETs with the N_t of 4.2×10¹¹ cm^-2 show an electron mobility of 185 cm²/V-s, despite a mean grain size of 0.5 μm. The three principal factors that determine μ_FE, namely, the low-field mobility, the mobility degradation factor, and the trap-state density N_t are clarified     

Molecular-beam growth of homoepitaxial InSb photovoltaic detectors

Molecular-beam epitaxy has been used for the first time to fabricate np junctions in InSb grown onto p-type InSb (100) substrates. Diodes formed by the epitaxial growth of a silicon-doped layer on undoped homoepitaxial material exhibited a bulk generation-recombination-limited R₀A value of 10⁵ Ω cm² and D_λpk * of 3×10¹² cm Hz^1/2 W^-1 at liquid nitrogen temperature     

Rapid isothermal processing of strained GeSi layers

A cold-wall rapid thermal processor was used to study the oxidation and annealing properties of Ge_xSi_1-x strained layers. The dry oxidation rate of Ge_xSi_1-x was found to be the same as that of Si, while the wet oxidation rate was found to be higher than that of Si, and the oxidation rate increases with the Ge concentration (up to 20% in this study). A high fixed oxide charge density (>5×10¹¹ /cm²) and interface trap level density (>10¹² /cm²-eV) at the oxide interface have been determined from capacitance-voltage measurements. Using techniques such as X-ray rocking curve analysis and I-V and C-V measurements of the p-n heterojunction it was found that the degradation of electronic properties of metastable Ge_xSi_1-x strained layers during rapid thermal annealing are related to the formation of structural defects at the heterointerfaces     

Nitrogen-implanted SiC diodes using high-temperature implantation

6H-SiC diodes fabricated using high-temperature nitrogen implantation up to 1000°C are reported. Diodes were formed by RIE etching a 0.8-μm-deep mesa across the N⁺/P junction using NF₃/O₂ with an aluminum transfer mask. The junction was passivated with a deposited SiO₂ layer 0.6 μm thick. Contacts were made to N⁺ and P regions with thin nickel and aluminum layers, respectively, followed by a short anneal between 900 and 1000°C. These diodes have reverse-bias leakage at 25°C as low as 5×10^-11 A/cm² at 10 V     

Optimization of the germanium preamorphization conditions forshallow-junction formation

Shallow p⁺-n and n⁺-p junctions were formed in germanium preamorphized Si substrates. Germanium implantation was carried out over the energy range of 50-125 keV and at doses from 3×10¹⁴ to 1×10¹⁵ cm^-2. p ⁺-n junctions were formed by 10-keV boron implantation at a dose of 1×10¹⁵ cm^-2. Arsenic was implanted at 50 keV at a dose of 5×10¹⁵ cm^-2 to form the n⁺-p junctions. Rapid thermal annealing was used for dopant activation and damage removal. Ge, B, and As distribution profiles were measured by secondary ion mass spectroscopy. Rutherford backscattering spectrometry was used to study the dependence of the amorphous layer formation on the energy and dose of germanium ion implantation. Cross-sectional transmission electron microscopy was used to study the residual defects formed due to preamorphization. Complete elimination of the residual end-of-range damage was achieved in samples preamorphized by 50-keV/1×10¹⁵ cm^-2 germanium implantation. Areal and peripheral leakage current densities of the junctions were studied as a function of germanium implantation parameters. The results show that high-quality p⁺-n and n⁺-p junctions can be formed in germanium preamorphized substrates if the preamorphization conditions are optimized