Analogue signal processing applications using a new circuit topology

New circuit topology for realising simple voltage-mode analogue functions, using one differential voltage current conveyor with positive output and a maximum of three passive elements, is proposed. The new topology can realise nine circuits including amplifier, integrator, differentiator and first-order all-pass filters. All the circuits show wide linearity, low total harmonic distortion (THD) and a simple realisation. Non-ideal and parasitic study is also given. As application examples, the new analogue blocks are used in realising biquad filter and third order quadrature oscillator. The proposed theory is validated by PSPICE simulation results as well as experimental results using AD844s. The catalogue of simple circuits along with their applications makes the work a future prospect for adoption to IC implementation by analogue IC producers.     

High output impedance current-mode all-pass sections with two grounded passive components

Two new first-order, current-mode all-pass sections, each with high output impedance and requiring only two grounded passive components along with a differential voltage current conveyor, are presented. The new circuits require no matching conditions for the realisation of current transfer functions and are simpler than most of the recently available circuits. The effect of parasitics and non-idealities is also considered. PSPICE simulations using 0.5 mu CMOS parameters confirm the validity and practical utility of the proposed circuits. A typical application in realising a new current-mode quadrature oscillator is given. A four-phase quadrature oscillator with high impedance outputs is also given.     

Quotient circuits employing VVR

The addition of two fixed resistors to a recently proposed, inexpensive quotient circuit based on the voltage variable resistance (VVR) property of an FET is shown to improve the dynamic range of operation. A model for both the original and final circuits is provided which shows that the circuits can have an all-pass behavior when operated in the neighborhood of certain denominator voltages. The new circuit is derived in steps from the original circuit, and laboratory data and error measurements are provided for all the circuits     

The Utility of the All-Pass Filter

The all-pass filter has seen limited application as a phase-correction circuit for many years. This network can also be applied to many other important areas of electronic design. Applications ranging from inductorless bandpass filters to frequencymodulation circuits are discussed to demonstrate the broad utility of the all-pass network.     

A translinear RMS detector for embedded test of RF ICs

This paper presents a wide-bandwidth, high dynamic range, BiCMOS RF rms detector based on the dynamic translinear principle. A current-domain circuit carries out the main computation, and a circuit compensates for errors due to finite transistor gain. Wide-bandwidth input and output circuits allow connecting voltage-mode signals to the internal current-mode circuitry. Measurements on a prototype chip demonstrate that the circuit is suitable for embedded on-chip testing, particularly for "alternative test" of RF circuits.     

A Testing Approach for MOS Circuit Using Single-Photon Detectors Under High Magnetic Fields

The MOS circuits must be tested thoroughly for insuring the reliability. A new testing approach for MOS circuits is presented in this paper, which makes use of single-photon detectors and high magnetic fields. If there are faults in the circuit under test, the photon emission from the circuit components is detected by a single-photon detector, the faults are located by the amount of the emitted photons. The following two techniques are proposed in this paper. First, the high magnetic field is applied to the circuit under test, i.e., the circuit is put in high magnetic field environment. To some extent this technique can solve the problem that some faults have poor strengths of emitted photons under general environment. Second, the special circuit input vectors are designed by using binary decision diagrams. The input vectors can make the positions of circuit components to produce signal transitions or switching behaviors, therefore the photon emission strengths of circuit components are enhanced. A lot of experimental results show that the faults in MOS circuits can be tested accurately by the approach proposed in this paper.     

Multi-input differential current conveyor, CMOS realisation and application

The adjoint circuit of a multiple output second-generation current conveyor (MOCCII) is investigated. It is found that the adjoint circuit of MOCCII is an multi-input differential current conveyor (MIDCC). A CMOS realisation of the MIDCC with three plus-type input terminals and two minus-type input terminals is described. As an example of applying the MIDCC, the transforming of a current-mode filter using MOCCIIs to its adjoint voltage-mode filter using MIDCCs is discussed.     

Enhancing the transfer of inductive energy to imploding plasma loads with a single-step meatgrinder circuit

The transfer of magnetic energy to an uncoupled load inductor using a novel inductive storage and transfer circuit (single-step meatgrinder) is compared with two classical inductive circuits. The first is the inductor-inductor transfer via an opening switch. The second is a transformer circuit where the primary circuit is opened and energy is transfered to the secondary and the uncoupled load. For identical loads the new circuit is shown to provide a 90-percent improvement over the two conventional circuits in energy transferred to the uncoupled load. A low-current low-voltage experiment, where 35.4 percent of the initial inductive energy is transferred to an uncoupled load using the new circuit, is discussed. A physical design for the Air Force Weapons Laboratory Shiva bank, which accounts for voltage holding, coupling, and parasitic inductance in the switches, is also described.     

Renovating the excitation circuit of a conventional welding converter

This paper presents two different new excitation current supplies based on power electronics for an existing conventional welding converter. The proposed circuits are simulated using Lab-VIEW 1200 AI and a PC based system. In the expressions for winding currents the dynamic inductances are used to take into account the saturation in the core of the winding. The experimental circuits are implemented and tested. The percentage peak-to-peak ripple currents are calculated for both simulation and experimental results and for both circuit configurations. The results are summarized in two tables for comparison.     

Unconditionally stable Crank?Nicolson finite-different time-domain method for simulation of three-dimensional microwave circuits

An unconditionally stable Crank-Nicolson finite-difference time-domain (CN-FDTD) algorithm is presented for three-dimensional microwave circuit analysis. First, Mur's first-order absorbing boundary condition is applied this CN-FDTD algorithm. A symmetric successive over relaxation-preconditioned biconjugate-gradient algorithm is also proposed to solve the large sparse matrix equation obtained in the CN-FDTD method. Resonant cavity and several planar microstrip circuits are presented to illustrate the versatility of this technique. Numerical results indicate that with a time-step size excessively larger than the Courant-Friedrich-Levy limit, the accuracy of CN-FDTD is still much higher than that of the alternating-direction implicit FDTD.     

基于动态电路的高速发送端设计

为了降低高速串行接口中发送端的延迟,在研究、分析现有发送端结构的基础上,提出了新的数据跨时钟域传输方法并在实际电路中得到实现。此方法可以大幅降低数据跨时钟域传输时用于异步FIFO的延迟。而且,使用动态电路对高速发送端并串转换电路进行了晶体管级的改进,放松了关键路径的时序要求,使发送端整体电路能运行在更高的频率下。发送端电路使用40nm CMOS工艺实现,实际芯片测试数据表明,使用该电路的发送端可以稳定工作在13Gb/s的速率下。     

Using genetic programing and multiplexers for the synthesis of logic circuits

This article introduces the circuit design problem as a synthesis procedure. An evolutionary technique denominated Genetic Programing (GP) is proposed as the main engine for the synthesis of logic circuits. This article argues that the synthesis of circuits using bottom–up procedures (such as GP) is at least as powerful as any top–down method, and that this is possible by means of the replication of a single element: the binary multiplexer. The properties of this device are described as a sound basis for the synthesis of logic circuits using GP. Several circuits are synthesized and contrasted against two design methods: the standard implementation of logic functions using multiplexers, and ordered binary decision diagrams.     

相位均衡器技术在水声接收机的应用

滤波器相位的非线性引起的信号失真是超短基线接收机系统中必须要解决的问题之一。采用常规滤波器与全通网络级联的方法设计了一种相位均衡器,解决了仅使用常规滤波器带来的非线性相位问题,使超短基线接收机在带宽内保持线性相位。给出了全通网络的原理、电路结构推导,分析了该网络中各参量对相位的影响。在设计实例中,相位均衡技术应用到实际硬件电路中进行测试,并结合试验数据及仿真结果对系统的性能进行评估。测试结果证明了相位均衡器可以实现相位的均衡校正功能,在水声接收机领域中有良好的应用前景。     

Quantum flux type logic circuits utilizing Josephson junctiontransmission lines

A quantum-flux-type logic circuit is proposed which is composed of Josephson junction transmission lines, along which localized magnetic flux can propagate. By choosing bias current properly, the duplication of magnetic flux and a variety of logical functions can be obtained without changing the circuit topology. Computer simulation results are presented on AND and OR operations with two and three inputs for the same circuit topology, confirming that these circuits can be used as logic circuits. The simulations demonstrate the high-speed operation and low power consumption of this circuit     

Approximation methods of measuring the parameters of linear electric circuits

An approximation approach to the development of methods of determining the parameters of electric circuits from the instantaneous values of the transients is considered. In the methods developed the measurement time is independent of the time constant of the measuring circuit. The proposed methods provide a further reduction in the time taken to determine the parameters of circuits using instantaneous values of two transients.     

电流模精密整流电路

由电压型运算放大器组成的精密整流电路要严格地匹配电阻才能获得精密全波整流波形．本文给出一种具有CCⅡ电路特性由运算放大器AD844所构成的电流模精密整流电路．无需匹配电阻就可输出良好的精密全波整流波形．且具有输入电压范围大，频带宽等特点．     

Design and Optimization of Fully Digital SQUID Based on Bi-Directional RSFQ

Bi-directional RSFQ benefits from using both positive and negative SFQ pulses to manipulate and transfer digital data. This allows more flexibility in the design of simpler circuits with enhanced performance. On the other hand, using the AC bias current, one can replace on-chip resistive current distributors with inductors. This resembles RQL logic, but in contrast to RQL, it is possible to use the well-established standard RSFQ cells in bi-directional RSFQ. These two advantages (energy-efficient computation and flexibility in design) make bi-directional RSFQ a powerful tool in next-generation supercomputers and also compatible with ultra-low-temperature quantum computers. In this work, to show the power and simplicity of circuits in bi-directional RSFQ, a fully digital SQUID based on bi-directional RSFQ is designed and optimized. The circuit we show here is a delta modulating ADC with digital integrator. The circuit has fewer Josephson junctions than other reported circuits, which makes the proposed circuit more easily realizable in available LTc and HTc technologies.     

Cascadable adiabatic logic circuits for low-power applications

There have been several strategies proposed to realise adiabatic circuits. Most of them require a clock signal and also its complement form. In this investigation, the authors we propose a family of adiabatic circuits, which consist of two branches and which enable control of charging and discharging of the capacitive load only by the input signal, work with single time varying supply and with no need of complementary inputs. A mathematical expression has been developed to explain the energy dissipation in our adiabatic inverter circuit. Measurements of energy drawn, recovered and dissipated have been carried out through simulation and, they are the same as obtained from the theoretical expression. In the proposed circuit, the input and output logic levels are approximately the same and can be used for building cascaded logic circuits. The energy saving in this family is to the tune of 50% compared with CMOS circuits constructed with similar circuit parameters, up to 250 MHZ. The authors have described the proposed inverter, NAND gates, NOR gates, adder circuits and JK flip-flop along with their simulation results.     

新型8管一位全加器电路设计

通过对已有全加器电路的研究与分析,提出了仅需8个晶体管的新型全加器单元.新电路包括2个3管同或门模块和1个选择器模块.在台积电(TSMC)0.18μm互补氧化物半导体(CMOS)工艺器件参数下经电路模拟程序(HSPICE)进行性能测试,与现有典型的全加器相比,新电路在晶体管数目、功耗和功耗延迟积有较大的优势.     

Sparse convolutional autoencoder-based fault location for drive circuits in nuclear reactors

Drive circuit is a critical part of instrumentation and control systems in nuclear reactors, and its performance directly influences the operation of nuclear reactors. However, comparing with the open circuit IGBT faults, soft faults caused by the degradation of electronic components present much slighter fluctuations to the performance of drive circuits. If the two fault modes co-exist, traditional fault diagnosis models are prone to misclassify soft faults as the normal condition. To improve the accuracy of fault diagnosis of drive circuits, it necessitates to accurately locate the faults of drive circuits, while effectively extracting the distinguishable fault features is one of the critical factors for fault location. In this article, a fault location method combining the empirical modal decomposition (EMD) algorithm and sparse convolutional autoencoder (SCAE) is proposed. The EMD algorithm is applied to decompose the three-phase current signals of drive circuits. An SCAE-based feature extractor is constructed to capture high-dimensional and sparse fault feature data with the aid of the powerful feature autonomic extraction capability of deep learning. A deep classifier is designed to locate faults in the driver circuit. A fault simulation model of the drive circuit is developed and the monitor data is collected. The effectiveness of the proposed method is validated via a real case of drive circuit in nuclear reactors.