The doped Si/SiO2 interface

A study is reported of the influence of dopant atoms on the SiSiO₂ interface states of thermally oxidized silicon. It was found that acceptor or donor atoms induce interface states and oxide charges. The effect is largest in the case of acceptor dopants and is independent of the doping process. The influence of the dopant atoms on oxide charge is probably related to the different segregation coefficients of acceptors and donors.     

The influence of mobile ions on the Si/SiO2 interface traps

An investigation of the relation between mobile ions and interface traps was carried out, using an appropriate technique to determine the number and type of mobile ions. It was found that mobile ions do not cause interface traps in the middle 0.8 eV of the bandgap. It appears that interface traps are rather caused by some stress effect. The results are considered in light of previously reported work.     

SiSiO2 interface state spectroscopy using MOS tunneling structures

This paper provides a critical review and classification of the studies of SiSiO₂ interface state parameters and energy distributions by means of MOS tunneling in structures with ultrathin SiO₂ layers (10–100 Å). Suggestions are made of experiments that will help to elucidate the importance of materials and processing conditions on these states, and to separate the various mechanisms involving charge exchange with the metal, the conduction band, and the valence band of the semiconductor.     

An experimental determination of the carrier lifetime near the SiSiO2 interface

Leakage currents in phosphorus-gettered (111) silicon have been studied at room temperature using a MOS gate-controlled diode structure. The leakage current and the gate-substrate capacitance have each been measured as a function of gate voltage for different values of reverse bias. From these measurements the carrier lifetime in the depletion region near the SiSiO₂ interface has been deduced. It is found that the lifetime decreases with distance from the interface; an explanation for this is suggested.     

Novel low-temperature C-V technique for MOS doping profiledetermination near the Si/SiO2 interface

An inverse modeling technique for doping profile extraction from MOS C-V measurements is presented. The method exploits the “kink” effect observed near flat bands in low-temperature C-V curves to accurately estimate the dopant concentration at the oxide-silicon surface. The inverse modeling approach, based on a self-consistent Schrodinger-Poisson solver, overcomes the limitations of previous analytical methods. The accuracy of the doping extraction is demonstrated by successfully reconstructing doping profiles from simulated C-V curves, including abrupt variations of doping in the vicinity of the oxide interface. When applied to experimental data from boron- and phosphorus-doped samples, the technique is shown to provide a substantial improvement in resolution with respect to room-temperature C-V measurements     

Determination of Si/SiO2 interface roughness using weaklocalization

The interface roughness of intentionally textured Si/SiO₂ interfaces was measured using the quantum weak localization (WL) correction to the electrical conductivity at low temperatures. The deduced roughness was confirmed by observation of the Si surface replicas by atomic force microscopy (AFM). Quantitative agreement between the two methods was found (Δ=1.2 to 1.4 Å from WL and 1.35 Å from AFM). For a surface with artificially induced texture, it is found that WL can easily distinguish a significant increase in roughness relative to the smooth surfaces. AFM confirms this qualitative conclusion     

Laser-induced self-organization of nano-wires on SiO2/Si interface

Original observation of new graded band gap structures formed on the surface of elementary Si semiconductor at studying the optical properties of Si nano-hills formed at the SiO₂/Si interface by pulsed Nd:YAG laser irradiation is reported. The self-organized nano-hills on Si surface are characterized by a strong photoluminescence in the visible range of spectrum with a shoulder extended to the long-wave part of the spectrum. The feature is explained by the quantum confinement effect in nano-hills-nano-wires of gradually changing diameter.     

Effect of SiO2/Si interface roughness on gate current

In many theoretical investigations of the electric-tunnel effect through an ultrathin oxide in metal-oxide-semiconductor (MOS) structure, it is commonly assumed that the oxide is of uniform thickness. One example of nonuniformity in oxides is interface roughness. Interface roughness effects on direct tunneling current in ultrathin MOS structures are investigated theoretically in this article. The roughness at SiO₂/Si interface is described in terms of Gauss distribution. It is shown that the transmission coefficient increases with root-mean-square (rms) roughness increasing, and the effect of rms roughness on the direct tunneling current decreases with the applied voltage increasing and increases with rms roughness increasing.     

Capacitance voltage characterization of poly SiSiO2Si structures

The high frequency C-V characteristics of poly SiSiO₂Si capacitors have been studied. It is shown that the poly SiSiO₂Si capacitor C-V characteristics are significantly different from the corresponding metal-SiO₂Si capacitor due to field penetration into the poly Si layer. A comparison of the theoretical and measured C-V characteristics gives an estimate of the surface state charge density at the poly SiSiO₂ interface and indicates that the surface potential behavior of this interface is trap and surface state dominated up to poly silicon impurity concentrations of approximately 10¹⁷ cm^?3.     

Definition of curve fitting parameter to study tunneling and trapping of electrons in Si/ultra-thin SiO2/metal structures

The tunneling of electrons through metal–oxide–silicon (MOS) structures with ultra-thin oxide is modeled using a linear model for the electron potential energy, an approach which simplifies the computation of both the interface potential and the field penetration distance in the substrate. The one-particle quantum problem is split into finding the metastable states induced by the internal field penetration in the substrate and the running states in the gate region. The two states are assumed to be connected by the condition for the continuity of the probability density at the substrate–dielectric interface. The electron probability current and the total gate current density are obtained for different gate voltages. As the model yields excellent fittings with experimental current–voltage (I–V) data for MOS structures, it was further applied to constant current stressing analysis in order to obtain values for important electron trapping parameters in the oxide. The resultant estimates of the electron trapping cross-section fall in the range of other independent determinations in the literature.     

Charge-pumping characterization of SiO2/Si interface invirgin and irradiated power VDMOSFETs

The applicability of charge-pumping technique to characterize the oxide/silicon interface in standard power Vertical Double-diffused (VD)MOS transistors is studied. Qualitative analysis of the charge-pumping threshold and flat-band voltage distributions in the VDMOS structure, supported with rigorous transient numerical modeling of the charge-pumping effect, shows that the measurements can be carried out in the subthreshold region. This conclusion is confirmed by various experimental results. The characteristics, i.e. charge-pumping current versus gate top level, is studied in detail. The changes in the characteristics after γ-ray irradiation are analyzed. A charge-pumping-based method for separate extraction of interface state density and density of charge trapped in the oxide after irradiation of VDMOSFETs is proposed. The validity and limitations of the method are studied by experiments and modeling     

Flat-field spectrograph in SiO2/Si

The operation of a flat-field spectrograph in silica glass on silicon (SiO₂/Si) as a demultiplexer with 4-nm channel spacing in the 1.5-μm waveguide length region is demonstrated. The concept allows fabrication tolerances to be compensated simultaneously with the adjustment of fan-out. Fiber-to-fiber insertion loss of 10.1 dB and crosstalk attenuation >15 dB have been achieved     

Dispersive subband-resonant nonlinearity in amorphous Si/SiO2 quantum well structures

Dispersive nonlinearity in amorphous Si/SiO₂ quantum well structures (QW's) has been investigated. The refractive index changes obtained from the intensity-dependent reflection spectra are nonlinearly dependent on the excitation intensity and can be described by the model of the saturating nonlinearity at low pump intensities. The nonlinear refractive index reveals resonant behavior associated with the subband structure of the QW's. The saturated nonlinear index and the saturation intensity have been obtained as Δn_s=-0.11 and I_s=1.9 MW/cm² at the transitions between the lowest subbands, and Δn_s~0.3 and I_s~0.5 MW/cm² at the transitions between the second subbands of the valence and conduction bands. The nonlinearity for the second subband transitions has been found high enough to provide potentially bistable operation, but the bistability is not expected at the transitions between the ground subbands. Carrier lifetime less than 1 ps restricting the switching time of the nonlinearity has been estimated from the saturation intensity     

Study on Nitridation-Induced Residual Stress near Si/SiO2 Interface in n-MOSFETs

本文借助氩离子(Ar     

Effects of nitrogen annealing on electron scatterings in SiSiO2 interface

The effective mobility of electrons at Si (100) surfaces was measured as a function of electron density N_s = 5 × 10¹¹?1 × 10¹³ cm^?2 at 4.2K for samples with and without annealing (10 min–2 hr) in nitrogen gas at 1000°C after wet thermal oxidation. A great part of the scattering by Coulomb and short-range potentials was reduced by a short (～10 min) anneal time, although the subsequent annealing resulted in a slight increase in the number of the scatterers. On the other hand, scattering by a surface roughness potential was reduced with increase in the anneal time. These scattering effects associated with N₂ annealing are discussed.     

Evaluation of Qbd for electrons tunneling fromthe Si/SiO2 interface compared to electron tunneling from thepoly-Si/SiO2 interface

Electrical time-to-breakdown (TTB) measurements have shown the charge to breakdown Q_bd of gate oxide capacitors fabricated on n-type well (n-well) substrates always to be higher than that of capacitors on p-type well (p-well) substrates on the same wafer when both are biased into accumulation under normal test conditions. Here the authors correlate the higher n-well Q_bd to smooth capacitor oxide/substrate interfaces and minimized grain boundary cusps at the poly-Si gate/oxide interfaces, confirming that Fowler-Nordheim tunneling is the dominant current conduction mechanisms through the oxide. They correlate higher Q_bd to higher barrier height for a given substrate type and observe that the slope of the barrier height versus temperature plot is lower for both p-well and n-well cases with electrons tunneling from the silicon substrate. This is attributed to surface roughness at the poly-Si gate/SiO₂ interface. A poly-Si gate deposition and annealing process with clean, smooth oxide/substrate interfaces will improve the p-well breakdown characteristics and allow higher Q_bd to be achieved     

SiO_2上InP薄膜的连续Ar~+激光再结晶

在SiO_2绝缘层上用高频溅射法淀积一层InP薄膜。经过连续Ar~+激光再结晶以后,晶粒尺寸明显增大。利用离子背散射分析了激光再结晶前后InP化学计量比的变化,结果表明:采用SiO_2保护膜后较好地抑制了InP组分的分解。对A~+激光辐照引起的InP再结晶的机制进行了分析。     

SiSiO2 interface states based on optically activated conductance technique

Experimental technique recently developed by Poon and Card has been used to determine the energy distribution of the interface states at the SiSiO₂ interface using AlSiO₂nSi structure with an oxide thickness $\text{?38}\text{A}\text{?}$. The distribution obtained in the band gap of silicon was distorted U-shaped. The distortion in the lower half of the band gap was more pronounced. Surface state density in the structure studied was of the order of 10¹²/cm² eV.     

The effect of high temperature annealing on the spatial variation of bulk lifetime near the SiSiO2 interface

In this paper, the effect of high temperature N₂ annealing at 1100°C on the minority carrier lifetime in the bulk of the silicon close to the SiSiO₂ interface has been investigated for dry thermal oxides and TCE oxides. This annealing results in substantial reduction of lifetime for dry thermal oxides and the same annealing process enhances the lifetime for TCE oxides. The annealing-affected region in silicon near the interface was scanned by computing lifetime as a function of distance from the SiSiO₂ interface, using the Zerbst method with a suitable modification. The smaller values of lifetime observed near the SiSiO₂ interface have been correlated with stacking faults whose electrical activity seems to be significantly controlled by metallic impurities. A mechanism (supported by the experimental results) is suggested for the lifetime change due to annealing. The influx of metallic impurities coming from the annealing ambient seems to be decreasing the lifetime of carriers in silicon under dry thermal oxides, whereas, for the TCE oxides, we postulate that chlorine incorporated in the oxides prevents this influx and further also helps in the deactivation of existing metallic impurities in the silicon.     

Charge trapping and interface states in hydrogen annealed HfO2–Si structures

Metal–oxide–semiconductor (MOS) capacitors based on HfO₂ gate stacks with Al and TiN gates are compared to study the effect of the gate electrode material to the properties of insulator–semiconductor interface. The structures under study were shown to contain interface trap densities of around 2 × 10¹¹ cm⁻² eV⁻¹ for Al gate and up to 5.5 × 10¹² cm⁻² eV⁻¹ for TiN gate. The peak in the surface state distribution was found at 0.19 eV above the valence band edge for Al electrode. The respective capture cross-section is 6 × 10⁻¹⁷ cm² at 200 K.The charge injection experiments have revealed the presence of hole traps inside the dielectric layer. The Al-gate structure contains traps with effective capture cross-section of 1 × 10⁻²⁰ cm², and there are two types of traps in the TiN-gate structure with cross-sections of 3.5 × 10⁻¹⁹ and 1 × 10⁻²⁰ cm². Trap concentration in the structure with Al electrode was considerably lower than in the structure with TiN electrode.