A tetracene-based single-electron transistor as a chlorine sensor

An organic molecular single-electron transistor (SET) based on a tetracene quantum dot has been modeled and employed for sensing of chlorine gas, within the framework of density functional theory. The sensing behavior of the SET is estimated through a charge-stability diagram and total energy as a function of gate potential (TE vs. V_g) for varying distances of chlorine from the SET quantum dot, which could be used as an electronic fingerprint for detection. The better sensing ability, high power efficiency and large operational temperature range of tetracene SET, in comparison to conventional sensors, makes it a very powerful candidate for a chlorine gas sensor.     

Four-state model for the Schottky transistor

Static operation of the Schottky-clamped transistor is described in terms of four simple models, cutoff, active, clamp, and reverse clamp; where the clamp model closely resembles the saturation model for an unclamped transistor. With these models one can describe details of circuits containing Schottky transistors using simple equivalent circuits     

多元件功率谐振变换器的小信号模型

本文介绍了一种基于基频分量近似法的小信号建模方法,目的是解决谐振变换器的控制模型问题。文章以一种多元件级联式谐振变换器为例,运用该方法建立其小信号模型,并且在简化分析的基础上得出相应的等效电路和频率响应图。     

采用直接电流控制策略的MMC-UPFC小信号模型

基于模块化多电平换流器(MMC)的统一潮流控制器(UPFC)大多采用直接电流控制策略,为分析采用该控制时UPFC接入后系统的小干扰稳定特性,针对一般的3节点拓扑UPFC,推导了其外环控制器、内环控制器、MMC和直流系统的小信号模型,并给出了UPFC输出电流的线性化方程。进一步地推导了传统2节点拓扑UPFC的小信号模型,同时给出了UPFC模型与系统其余部分的组合方法,建立了系统整体的线性化模型。最后,通过对一个2机测试系统进行时域仿真和模态分析,验证了所提小信号模型的正确性。     

An interface charge model for ferroelectric field effect transistor

An interface charge model for ferroelectric-gate field-effect transistor (FeFET) is developed by combining the basic device equations of metal-oxide-semiconductor field-effect transistors with the polarization characteristics of ferroelectric thin films. This model presents the characteristics of FeFET considering interface charge between the ferroelectric thin film and the insulator layer. Simulations demonstrate that the interface charge will cause the surface potential of the semiconductor and the drain current left shift, and the memory windows are narrowed down, which are resulted from the space charge of the surface of the semiconductor. Meanwhile, the value of polarization almost does not change in FeFET. Furthermore, the simulation of FeCMOS indicates that the output voltage will left shift as the interface charge increases.     

不对称半桥变换器的小信号建模与仿真研究

不对称半桥变换器利用自身的寄生器件实现了开关管的零电压操作，在不影响电路整体结构，以及不增加成本的前提下达到了很好的输入、输出特性。本文建立了该类变换器的小信号模型，进行了动态分析、仿真研究及补偿回路设计，并对整体的电路稳定性和几个关键的频率特性进行了研究。     

基于三质量块模型的失速型风机小信号建模和模态分析

风电场大规模接入电网可能增加区域电网低频振荡和风电机组轴系扭振的风险,研究风机建模及扭振特性是保证电力系统安全稳定的重要课题。以失速型风电机组为例,建立基于三质量块轴系模型的单机对无穷大母线系统小信号模型,并采用模态分析法探讨系统电气参数对失速型风电机组轴系扭振特性的影响。为方便不同机型及多机风电机组的扭振特性的拓展研究,系统各部分模型相对独立。在单机对无穷大母线系统模型的基础上建立简化失速型风电场多机小扰动仿真模型,研究风电场扭振模态的变化,MATLAB仿真验证了该模型用于风电机组轴系扭振问题研究的有效性和准确性。     

Realistic model for the multiple‐input floating‐gate transistor

Multiple‐input floating‐gate transistor (FGMOS) circuit designers face a serious problem along the design process: the lack of a realistic simulation model. For this reason, a solution that properly predicts the initial voltage at the floating gates is presented in this paper. In order to assess the performance of the proposal, a comparison is made against a test circuit fabricated in a 0.5‐µm On‐Semiconductor CMOS process. Based on this comparison, the proposed model is shown to be a fundamental tool in the design of FGMOS circuits. © 2014 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

Integrating transmission into IRP part I: analytical approach

This is Part I of a two paper set dealing with transmission and integrated resource planning. The primary objective of this paper is to report a framework to bring transmission and selected other resources into the sphere of integrated resource planning. Transmission lines and related equipment are indeed a resource, and may constitute either a substitute for other resources (e.g., a strengthened transmission network may reduce the need for remote generation) or a complement to other resources (e.g., additional transmission investment may be needed to facilitate power purchases from a neighboring system or an independent power producer). Moreover, growing competitive pressures make it necessary to plan transmission systems to facilitate competition among alternative generation and demand-side resources. A combined transmission and integrated resource planning model, called the Comprehensive Electrical Systems Planning Model (CESPLAN), is described in this paper     

Electronic model of a Ferroelectric Field Effect transistor

Abstract

A pair of electronic models has been developed of a Ferroelectric Field Effect transistor. These models can be used in standard electrical circuit simulation programs to simulate the main characteristics of the FFET. The models use the Schmitt trigger circuit as a basis for their design. One model uses bipolar junction transistors and one uses MOSFET's. Each model has the main characteristics of the FFET, which are the current hysterisis with different gate voltages and decay of the drain current when the gate voltage is off. The drain current from each model has similar values to an actual FFET that was measured experimentally. The input and output resistance in the models are also similar to that of the FFET. The models are valid for all frequencies below RF levels. Each model can be used to design circuits using FFET's with standard electrical simulation packages. These circuits can be used in designing non-volatile memory circuits and logic circuits and are compatible with all SPICE based circuit analysis programs. The models consist of only standard electrical components, such as BJT's, MOSFET's, diodes, resistors, and capacitors. Each model is compared to the experimental data measured from an actual FFET.     

A surface-potential based drain current model for short-channel symmetric double-gate junctionless transistor

Junctionless transistors, which do not have any pn junction in the source-channel-drain path have become an attractive candidate in sub-20 nm regime. They have homogeneous and uniform doping in source-channel-drain region. Despite some similarities with conventional MOSFETs, the charge-potential relationship is quite different in a junctionless transistor, due to its different operational principle. In this report, models for potential and drain current are formulated for shorter channel symmetric double-gate junctionless transistor (DGJLT). The potential model is derived from two dimensional Poisson’s equation using “variable separation technique”. The developed model captures the physics in all regions of device operation i.e., depletion to accumulation region without any fitting parameter. The model is valid for a range of channel doping concentrations, channel thickness and channel length. Threshold voltage and drain-induced barrier lowering values are extracted from the potential model. The model is in good agreement with professional TCAD simulation results.     

考虑DFIG桨距角参数优化的小干扰稳定约束最优潮流模型

现有小干扰稳定约束最优潮流(SC-OPF)一般选择同步发电机(SG)有功出力作为控制参数,当某些危险特征值受SG出力影响较小时,电网稳定水平改善效果有限。基于双馈感应发电机(DFIG)详细模型,推导风电系统危险特征值对控制参数灵敏度的解析表达,利用特征值灵敏度调节控制参数,从而改进现有SCOPF算法;同时优化SG有功出力和DFIG桨距角参数,以调整各自主导特征值。仿真结果表明,所提优化模型能够同时改善电网阻尼比和稳定裕度,并且减小经济损失。     

Inhomogeneous ladder networks,part I

In this paper the theory of orthogonal polynomials is taken as the starting point for developing the theory of semi-infinite inhomogeneous ladder networks of two element kinds. It is shown that the transfer impedance of the ladder network, suitably normalized, is just the Green's function of a self-adjoint difference operator of ‘Sturm–Liouville’ type. An integral representation for this Green's function is given, and is evaluated in product form. The theory is illustrated with a number of examples based on classical orthogonal polynomials, the use of which enables all the calculations to be carried through explicitly.     

A global delay model for domino cmos circuits with application to transistor sizing

Domino CMOS circuits have played important roles in the design of high-speed VLSI chips such as 32-bit microprocessors and their family chips. Many researchers have worked on the characterization of the delay time and optimal design of domino CMOS circuits using circuit simulators as the main CAD tools. This paper presents a global analytical delay model for an important class of domino CMOS circuits wherein a multitude of n-channel transistors form a series connection. the new model is shown to predict the delay time from the precharging clock edge to the 0.5 V_DD output level with less than 10% error as compared to that from SPICE simulation over the entire design space. the delay model has been applied efficiently to the design automation of domino CMOS circuits modules.     

A modified macro model approach for SPICE based simulation of single electron transistor

A new macro model of single electron transistor (SET) for SPICE based simulation of SET circuits is proposed. Two voltage controlled current sources and some scaling factors are incorporated in the existing model to derive our model. The V–I characteristics of the proposed SET is promising enough to be used as the basic element for designing circuits based on SETs. A comparison with the previous models establishes the fact that our model efficiently removes the drawbacks of the existing models. Our model also agrees well with the results obtained from popular SIMON simulator. To verify the accuracy, we have designed a SET inverter cell and investigated its characteristics. The work includes the effect of the parameters on the noise margin and voltage transfer characteristics of the inverter circuit. Further, to verify the applicability, a multi peak negative differential resistance circuit based on the proposed model is designed and simulated.     

Analysis of the floating‐gate transistor using the charge sheet model

The multiple‐input floating‐gate transistor is a semiconductor device that has found wide application in digital and analog electronic integrated circuits. Simulating an electronic circuit is an essential step in the design flow, prior to manufacturing. Therefore, an advanced model for the multiple‐input floating‐gate transistor is needed for analog design. This paper shows a method for adapting the charge sheet model for advanced models of the device. In addition, the problem of obtaining the drain to source current numerically as a function of external voltages is addressed. Furthermore, important plots are presented in order to clarify the behavior of the concerned device. The small signal analysis of the device is included. This summary may be interesting to those seeking to model the multiple‐input floating‐gate transistor, looking for alternatives to analog electronic design, needing low operating voltage, generating new design strategies, or wishing to understand of the operation of the device or the use of alternatives to implement analog circuits. Copyright © 2015 John Wiley & Sons, Ltd.     

Small-signal stability for parallel-connected inverters instand-alone AC supply systems

This paper presents a small-signal analysis for parallel-connected inverters in stand-alone AC supply systems. The control technique of the inverters is based on frequency and voltage droops, which depends on the local variable measurements and does not need control interconnections. Simulation and experimental results show that the system is well represented by the small-signal model. Some root locus plots for the system are provided, which make the stability studies and design easier     

Overview and comparison of long-term forecasting techniques for a fast developing utility: part I

The intrinsic uncertainties associated with demand forecasting become more acute when it is required to provide an invaluable dimension to the decision-making process in a period characterized by fast and dynamic changes. In this paper, estimates of the peak demand, pertaining to a typical fast growing system with inherit dynamic load characteristics, and also a normal developing system, is derived from the classical long-term forecasting methods. These demand estimates are compared with corresponding actual values. Then, a proposed model based on demand characteristics of fast developing utility is obtained to yield best fit. Afterwards, improved modeling of the system load characteristics using a knowledge-based expert system, described in a companion paper (Part II), will demonstrate better forecasts compared with forecasts obtained by direct applications of classical techniques.     

Multimode oscillator analysis via integral manifolds part I: Non-resonant case

This article represents Part I of a two-part paper which provides a rigorous mathematical foundation of the modeanalysis method for analysing the periodic and quasi-periodic oscillations observed in various types of coupled oscillators. Although the results predicted by this method had been confirmed by experiments to some extent, the crucial assumptions used to derive the averaged equations are based on engineering intuition. Moreover, while it is intuitively reasonable to associate an equilibrium solution of the averaged equations whose eigenvalues have negative real parts with that of a stable periodic or quasi-periodic solution of the original equation, the relationship between the solution of the averaged equations and that of the original equations as t tends to infinity, is not clear in a mathematical sense. This paper resolves the theoretical ambiguities of the mode analysis method by using the theory of integral manifolds. In particular, we recalculate the averaged equations in a rigorous way, and show that they coincide with those obtained before. Therefore, the theory of integral manifolds guarantees the existence of an integral manifold in the original system which corresponds to a steady-state periodic or quasi-periodic solution, provided the equilibrium point of the averaged equation has no eigenvalues with a zero real part (i.e. hyberbolic). This rigorous analysis proved that all our previous results obtained from the mode analysis method, i.e. averaged equations and stability analysis were correct.     

Network theorems for transistor circuits

A method for simplifying transistor amplifier circuits by means of diagram transformations is presented. It is based on several network theorems that are not well known. These are: the source splitting theorem, which facilitates subsequent circuit simplification; the controlled-source substitution theorem, which eliminates controlled sources in a one-port; and the controlled-source reduction theorem, which eliminates controlled sources in a two-port. All of these theorems come in dual pairs. The technique permits the analysis of the circuits covered in introductory courses with minimum mathematics and without the need for prior insight