Single electron charging and single electron tunneling in sub-micron AlGaAs/GaAs double barrier transistor structures

Transport phenomena in a specially optimized vertical asymmetric sub-micron Al_0.28Ga_0.72As/GaAs double barrier structure with modulation-doped barriers is investigated by applying a bias to a special Schottky side gate, which allows the effective area of the conducting channel to be finely “tuned”. For a sufficiently small device, the electrical properties of the controllable quantum dot bounded by well defined heterostructure barriers and an adjustable side wall potential are expected to be governed by single electron charging, and single electron resonant tunneling. Single electron transistor (SET) operation is possible because the number of electrons in the dot, n, can be varied one-by-one with the side gate. The drain current flowing through the conducting channel in response to a small drain voltage is strongly modulated by the gate voltage close to “pinch-off” as n approaches zero, and oscillations in the drain current persist up to about 25 K. A gate modulated zero current region of Coulomb blockade, step-like features, and resonances exhibiting negative differential resistance are clearly observed at low bias. Although this technology is very promising for the realization of SET operation at temperatures well above 4.2 K, the temperature dependence of the Coulomb blockade is an important limitation. We describe the evolution of the conductance oscillations and the degradation of Coulomb blockade with temperature from 0.3 K up to 25 K, and propose that co-tunneling in a small system containing just a “few” electrons in which the zero-dimensional energy level spacing is significant and comparable to the Coulomb charging energy is important, and is likely to be more complex than that documented for large planar dot structures containing “many” electrons.     

MICROCOMPUTERIZED MEASUREMENT AND ANALYSIS OF ELECTRON EMISSION PROPERTIES OF THERMIONIC CATHODES

A microcomputerized measurement system is developed.This system automatically acquiresan I-V characteristic curve in 5 seconds with the accuracy of 0.05％ FSR(full scale range).The Schottkyextrapolation field-free emission,the inflection-point emission,the flection-point emission,the average effec-tive work function.the Richardson work function,the work function distribution at the operation tempera-ture and other important information that reflects properties of cathodes are obtained by this system.The re-sults of analysing four types of cathodes demonstrate that this system is very suitable for measuring the activi-ty changes of the cathode in the processes of activation,ageing,poisoning and life test.It is proved that thissystem can also be used to monitor the actlvity of the cathode in the assembled tube by measuring a gridcontrolled travelling-wave tube.     

On modelling and characterization of single electron transistor

As the nanotechnology rose to the surface, single electron transistor (SET) was invented. In contrast to the well-known response of MOS current, SET current has peaks at certain gate voltages, which disappears at other gate voltages. The SET has promised to be valuable in many applications for its high speed and low power consumption. First, a comparison was drawn between different models of SET based on the orthodox theory. Such theory explains electron transport from source to drain, employing free energies, tunnel rates and coulomb blockade phenomenon, in addition to quantizing electron tunnelling. Afterwards, a simplified model was proposed to account for unnecessary lengthy calculation processes, resulting from the large number of states assumed for simulation. The proposed PSPICE simplified model was confirmed by comparing its results to the results of the available models, and it was found to agree well with them. Taking much less runtime than the available models, the proposed model can easily be used to simulate SET-based integrated circuits on PSPICE.     

Field-effect transistor self-electrooptic effect device: integrated photodiode, quantum well modulator and transistor

The authors propose and demonstrate the integration of a photodiode, a quantum-confined Stark-effect quantum-well optical modulator, and a metal-semiconductor field-effect transistor (MESFET) to make a field-effect transistor self-electrooptic effect device. This integration allows optical inputs and outputs on the surface of a GaAs-integrated circuit chip, compatible with standard MESFET processing. To provide an illustration of feasibility, the authors demonstrate signal amplification with a single MESFET.<>     

NEW METHOD FOR MEASURING SECONDARY ELECTRON EMISSION OF THERMIONIC CATHODE AND ITS APPLICATION

By using correlation-detection technique and improving structure of the test tube,the background noise of thermionic-electrons and space charge effect are restrained.The sec-ondary emission coefficient δ of thermionic cathode at high temperature has been studied.Theδ of impregnated scandate cathodes increases exponentially with increasing temperature at lowenergy and current of the bombardment electrons;at high energy or current of the bombardmentelectrons the temperature has little effect on δ.The research shows that an enhanced thermionicemission occurred when the cathode works at high temperature and under electron bombardment.These phenomena are discussed in terms of “internal field model”.     

纳米结构制备及硅单电子晶体管的研究

介绍了用电子束光刻、反应离子刻蚀方法制备硅量子线和用电子束光刻、电子束蒸发以及剥离技术制备纳米金属栅的工艺方法;用这种工艺在p型SIMOX硅片上成功制造了一种单电子晶体管;在器件的电流电压特性上观测到明显的库仑阻塞效应和单电子隧穿效应以及在固定的Vds电压下,源漏电流(Ids)随栅极电压(Vgs)变化的一系列周期变化的电流振荡特性.     

Mobility degradation and transistor asymmetry impact on field effect transistor access resistances extraction

With the downscaling of MOSFETs the relative importance of access resistances on transistor behavior and thus on integrated circuits performance significantly increases. Several DC and Radio Frequency characterization techniques have been proposed in the literature to extract the access resistances. It has been demonstrated that the mobility degradation with the vertical electric field in advanced MOSFETs and the transistor asymmetry might strongly degrade the accuracy of the extracted resistance values. Based on simulation and experimental results, correction factors are proposed and guidelines are drawn to help the user for choosing the right extrinsic resistance extraction methodology depending on a few figures of merit associated to the measured data of the FET device. Based on our conclusions, a robust characterization method for deep-submicron devices is proposed and successfully applied to FinFETs.     

Single transistor primitive for timing and power modelling of CMOS gates

An accurate and efficient method for modelling CMOS gates by a single equivalent transistor is introduced in this paper. The output waveform of a CMOS inverter is obtained by solving the circuit differential equation considering only the conducting transistor of the inverter. The effect of the short-circuiting transistor is incorporated as a differentiation of the width of the conducting transistor. The proposed model is the simplest primitive that can be used in order to obtain the propagation delay and short-circuit power dissipation of CMOS gates. Consequently, it can offer significant speed improvement to existing dynamic timing and power simulators while maintaining a sufficient level of accuracy.     

The GaAs heterojunction bipolar transistor: an electron device with optical device reliability

GaAs-based heterojunction bipolar transistors (HBTs) are of interest for a wide variety of applications. However, concerns about the long-term stability of the device have recently arisen. This paper describes the physics of HBT degradation under bias stress as similar to GaAs light-emitting diode (LED) and laser diode (LD) degradation. TEM, electroluminescence, and electrical measurements support this model. Additionally, the model also indicates the factors in epitaxial growth and device processing that are critical to device reliability.     

Channel length influenced contribution of hole and electron trapping effect to threshold voltage stability in organic field effect transistors

Effect of channel length on hysteresis and threshold voltage shift in copper phthalocyanine (CuPc) based organic field effect transistors was studied. Contrary to expectation, longer channel length devices exhibited minimum threshold voltage shift. Influence of channel length on the contribution of hole and electron trapping to threshold voltage stability was determined. Shortest channel length devices exhibited highest electron trapping effect while longest channel devices exhibited minimum hole as well as electron trapping. Lower hole trap effect for longer channel length devices was suggested to be due to reduced longitudinal field between source and drain electrodes while minimum electron trapping was attributed to suppression of drain current by increased hole trap centres.     

Design, fabrication and operation of a hot electron resonant tunneling transistor

Transistors employing resonant tunneling injection of hot electrons into a thin quantum well base region have been fabricated. The base region in these transistors is formed by a narrow bandgap material like InGaAs so that the first level is a confined one lying below the Fermi level in the contact regions. This results in charge transfer into the bound state in the quantum well thus allowing independent control of the base electrostatic potential. Theoretical calculations showing the importance of various device parameters in the design of a resonant tunneling transistor are presented and preliminary results showing the capability of transistor action in such devices are presented.     

Basic parameter measurement and channel broadening effect in the submicrometer MOSFET

An improved measurement technique of the basic MOSFET parameters is presented. This method is based on the measured data of two identical devices with different channel lengths. The effect of series resistance and channel length can be separated from the mobility measurement. This is the only method in which it has been proved that mobility can be measured on a short channel device. A new technique of channel length and series resistance is done by the measurement of newly defined quantity, RTK, which is the equivalent channel length that includes the effect of series resistance. Because of the success of this measurement method, a new phenomena, which we call channel broadening effect, was investigated. Its effects on the submicrometer device characteristics were investigated.     

激光诱导镍等离子体发射光谱Stark展宽和电子密度的空间分辨特性

在大气环境下利用脉冲Nd:YAG激光532nm输出烧蚀Ni靶,产生了激光等离子体。在350-600nm波长范围内测定了激光诱导等离子体中Ni原子的空间分辨发射光谱。得到了385.83nm发射光谱线的Stark展宽及其随径向的变化特性。由发射光谱线的强度和Stark展宽计算了等离子体电子密度,并讨论了激光等离子体的空间演化特性。结果表明,在沿激光束方向上,当距离靶表面0-2.5mm范围内变化时,谱线的Stark展宽、线移和电子密度都随距靶面距离的增大而先增大,在离靶面约1.25mm处时达到最大值,之后随距离的进一步增大而减小;电子密度在0.1-3.0 1016cm-3范围内变化。     

An analytical and computer-aided model of the AlGaAs/GaAs high electron mobility transistor

An analytical model for the AlGaAs/GaAs high electron mobility transistor (HEMT) or MODFET has been developed. This model uses a Trofimenkoff-type relation [1] for the electron velocity and electrical field and assumes that the electron velocity saturation inside the two-dimensional electron gas channel cause current saturation. It also takes into account the parasitic conduction in the AlGaAs layer by including a MESFET operation. Based on this model, analytical current-voltage equations suitable for computer simulation have been derived. Calculated results for sub-half-micrometer HEMT's show excellent agreement with measured characteristics.     

Real-space electron transfer by thermionic emission in GaAsAlxGa1−xAs heterostructures: Analytical model for large layer widths

Calculations are presented for negative differential resistance (NDR) and switching in layered GaAsAl_xGa_1?xAs heterostructures with a high electric field parallel to the interface. The mechanism is based on thermionic emission of hot electrons from the GaAs layers into the Al_xGa_1?xAs layers. An analytical model is obtained in the limit of relatively large layer widths (400 Å or wider). The method of moments is employed to solve the Boltzmann equation, assuming a position-dependent electron temperature and Quasi-Fermi level in the Al_xGa_1?xAs layers, and a position-independent electron temperature and Quasi-Fermi level in the narrower GaAs layer. Thermal conduction of hot electrons from the GaAs layer into the Al_xGa_1?xAs layers is taken into account. The results of the calculations show that the threshold electric field for the onset of NDR and the peak-to-valley ratio can be controlled to a large extent by adjusting the mobility of the Al_xGa_1?xAs layer, the layer dimensions, and the potential barrier (Al mole fraction in the Al_xGa_1?xAs).     

Step and flash imprint lithography for quantum dots based room temperature single electron transistor fabrication

In this work we demonstrate the successful fabrication using step and flash imprint lithography – reverse tone (SFIL-R)? coupled with a novel Focus ion beam (FIB) quantum dot (QD) deposition technique to produce of a full array of room temperature single electron transistors (RT-SET) based on tungsten quantum dot arrays. The integration of SFIL-R and FIB technology process flow has been developed in order to explore the possibility of an ultra low power, monolithically integrated nano-electronics circuits using RT-SET. We describe the parallel production of RT-SET devices using SFIL-R. The yield of the mass produced devices are examined. These QD based devices are characterized and initial results are evaluated.     

Nonlinear electron properties of an InGaAs/InAlAs-based ballistic deflection transistor: Room temperature DC experiments and numerical simulations

We present a detailed experimental and numerical study of a novel device so-called ballistic deflection transistor (BDT). Based on InGaAs-InAlAs heterostructure on InP substrate, BDT utilizes a two dimensional electron gas (2DEG) supported by a gated microstructure to achieve nonlinear electron transport at room temperature. BDT channel is larger than the mean free path implying that electron transport is not purely ballistic in nature. However, the asymmetric geometrical deflection combined with the electron steering caused by the applied differential gate voltages ultimately results in an attractive nonlinear behavior of the BDT useful for the working of the large scale devices at room temperature. Device performance was studied by analyzing the effects of several modifications of the BDT geometry and biasing conditions, both experimentally and by numerical simulations.     

Application of focused ion beam techniques and transmission electron microscopy to thin-film transistor failure analysis

The locations of process-induced defects in hydrogenated amorphous silicon thin-film transistors (a-Si:H TFTs), which are used as elements of active-matrix liquid crystal displays, were investigated by combining focused ion beam techniques with cross-sectional transmission electron microscopy (X-TEM). The FIB technique is applied to TFT failure analysis problems, which require considerable localised etching without inducing mechanical stress or damage at fragile failure locations. We demonstrate the manner in which these techniques are used to characterise TFT defects such as pinholes and portions of the multilayer damaged by mechanical stress. A dramatic improvement brought about by the FIB technique is the increase in temporal efficiency of sample preparations. X-TEM observations also lead to identification of the fault and analysis of its cause, which in turn lead to a marked yield improvement.