III–V ternary nanowires on Si substrates: growth,characterization and device applications

Over the past decades, the progress in the growth of materials which can be applied to cutting-edge technologies in the field of electronics, optoelectronics and energy harvesting has been remarkable. Among the various materials, group III–V semiconductors are of particular interest and have been widely investigated due to their excellent optical properties and high carrier mobility. However, the integration of III–V structures as light sources and numerous other optical components on Si, which is the foundation for most optoelectronic and electronic integrated circuits, has been hindered by the large lattice mismatch between these compounds. This mismatch results in substantial amounts of strain and degradation of the performance of the devices. Nanowires (NWs) are unique nanostructures that induce elastic strain relaxation, allowing for the monolithic integration of III–V semiconductors on the cheap and mature Si platform. A technique that ensures flexibility and freedom in the design of NW structures is the growth of ternary III–V NWs, which offer a tuneable frame of optical characteristics, merely by adjusting their nominal composition. In this review, we will focus on the recent progress in the growth of ternary III–V NWs on Si substrates. After analysing the growth mechanisms that are being employed and describing the effect of strain in the NW growth, we will thoroughly inspect the available literature and present the growth methods, characterization and optical measurements of each of the III–V ternary alloys that have been demonstrated. The different properties and special treatments required for each of these material platforms are also discussed. Moreover, we will present the results from the works on device fabrication, including lasers, solar cells, water splitting devices, photodetectors and FETs, where ternary III–V NWs were used as building blocks. Through the current paper, we exhibit the up-to-date state in this field of research and summarize the important accomplishments of the past few years.     

Recent progress in epitaxial growth of III–V quantum-dot lasers on silicon substrate

In the past few decades, numerous high-performance silicon (Si) photonic devices have been demonstrated. Si, as a photonic platform, has received renewed interest in recent years. Efficient Si-based III–V quantum-dot (QDs) lasers have long been a goal for semiconductor scientists because of the incomparable optical properties of III–V compounds. Although the material dissimilarity between III–V material and Si hindered the development of monolithic integrations for over 30 years, considerable breakthroughs happened in the 2000s. In this paper, we review recent progress in the epitaxial growth of various III–V QD lasers on both offcut Si substrate and on-axis Si (001) substrate. In addition, the fundamental challenges in monolithic growth will be explained together with the superior characteristics of QDs.     

ZnO/SiC/Si(111)异质外延

使用SiC作为过渡层,采用自行设计建造的连通式双反应室高温MOCVD系统很好地克服了ZnO和SiC生长时的交叉污染问题,在Si基片上外延出高质量的ZnO薄膜.测量了样品的XRD和摇摆曲线,以及室温下的PL谱.实验结果表明,SiC过渡层的引入大大提高了ZnO薄膜的质量和发光性能,并有望实现在Si上制备ZnO单晶薄膜.     

On a new method of heterojunction formation in III–V nanowires

The process of the formation of axial heterostructures in nanowires is considered on the basis of the vapor–liquid–solid model of growth. A new method of heterostructure formation in (Al, Ga)As nanowires by varying the arsenic flux is proposed.     

ZnO/SiC/Si(111)异质外延

使用SiC作为过渡层,采用自行设计建造的连通式双反应室高温MOCVD系统很好地克服了ZnO和SiC生长时的交叉污染问题,在Si基片上外延出高质量的ZnO薄膜.测量了样品的XRD和摇摆曲线,以及室温下的PL谱.实验结果表明,SiC过渡层的引入大大提高了ZnO薄膜的质量和发光性能,并有望实现在Si上制备ZnO单晶薄膜.     

Recent advances of heterogeneously integrated III–V laser on Si

Due to the indirect bandgap nature, the widely used silicon CMOS is very inefficient at light emitting. The integration of silicon lasers is deemed as the ‘Mount Everest’ for the full take-up of Si photonics. The major challenge has been the materials dissimilarity caused impaired device performance. We present a brief overview of the recent advances of integrated III–V laser on Si. We will then focus on the heterogeneous direct/adhesive bonding enabling methods and associated light coupling structures. A selected review of recent representative novel heterogeneously integrated Si lasers for emerging applications like spectroscopy, sensing, metrology and microwave photonics will be presented, including DFB laser array, ultra-dense comb lasers and nanolasers. Finally, the challenges and opportunities of heterogeneous integration approach are discussed.     

Study of the I–V characteristics of nanostructured Pd films on a Si substrate after vacuum annealing

The I–V characteristics of nanostructured Pd films on a Si substrate are investigated. The nanostructures (nanoislands) are formed by the vacuum annealing of continuous ultrathin Pd films sputtered onto a substrate. The shape of the I–V characteristics of the investigated Si substrate-Pd film system is shown to be heavily dependent on the degree of film nanostructuring. The surface morphology of the films is studied using scanning electron microscopy.     

Si(111)碳化层中的SiC结晶

为采用HFCVD技术在Si（111）衬底上外延3C－SiC薄层而在Si表面首先进行碳化处理．实验样品用H2稀释的碳化物气氛进行碳化处理，热丝温度约为2000℃，衬底温度在950℃到1100℃之间．用X射线衍射、电子衍射和俄歇能谱等分析手段研究了碳化层的组分及结构，发现碳化层可由合碳硅结晶层、3C－SiC结晶层和富碳的3C－SiC结晶层组成．适当控制碳化条件可以调整3C－SiC结晶层的比例．     

Comparison of III–V Heterostructures Grown on Ge/Si,Ge/SOI,and GaAs

Semiconductors - III–V/Ge/Si(001), III–V/Ge/SOI(001), and III–V/GaAs(001) heterostructures are fabricated and investigated. The Ge buffer layer for the III–V/Ge/Si structure...     

Measurement of Young’s modulus of GaAs nanowires growing obliquely on a substrate

A convenient and fast method for measuring Young’s modulus of semiconductor nanowires obliquely standing on the growth substrate is presented. In this method, the nanowire is elastically bent under the force exerted by the probe of an atomic-force microscope, and the load-unload dependences for the bending of the probe cantilever are recorded. Next, these curves are used to find the bending stiffness of the tilted nanowires, after which, taking into account the nanowire dimensions, Young’s modulus is obtained. The implementation of this method is demonstrated for tilted GaAs nanowires growing on a GaAs (111) substrate. Young’s modulus is determined by applying finite-element analysis to the problem of the stationary elastic bending of a nanowire taking into account the actual nanowire shape and faceting. It proves that a fairly accurate estimate of Young’s modulus can be obtained even if the nanowire shape is approximated by a circular cylinder with a single cross-sectional area. The values of Young’s modulus obtained for GaAs nanowires of cubic lattice symmetry are 2 to 3 times smaller than its value for bulk GaAs. This difference is attributed to the presence of stacking faults in the central part of the nanowires.     

Ⅲ–Ⅴ ternary nanowires on Si substrates: growth,characterization and device applications

Over the past decades, the progress in the growth of materials which can be applied to cutting-edge technologies in the field of electronics, optoelectronics and energy harvesting has been remarkable. Among the various materials, group Ⅲ–Ⅴ semiconductors are of particular interest and have been widely investigated due to their excellent optical properties and high carrier mobility. However, the integration of Ⅲ–Ⅴ structures as light sources and numerous other optical components on Si,which is the foundation for most optoelectronic and electronic integrated circuits, has been hindered by the large lattice mismatch between these compounds. This mismatch results in substantial amounts of strain and degradation of the performance of the devices. Nanowires(NWs) are unique nanostructures that induce elastic strain relaxation, allowing for the monolithic integration of Ⅲ–Ⅴ semiconductors on the cheap and mature Si platform. A technique that ensures flexibility and freedom in the design of NW structures is the growth of ternary Ⅲ–Ⅴ NWs, which offer a tuneable frame of optical characteristics, merely by adjusting their nominal composition. In this review, we will focus on the recent progress in the growth of ternary Ⅲ–Ⅴ NWs on Si substrates. After analysing the growth mechanisms that are being employed and describing the effect of strain in the NW growth, we will thoroughly inspect the available literature and present the growth methods, characterization and optical measurements of each of the Ⅲ–Ⅴ ternary alloys that have been demonstrated. The different properties and special treatments required for each of these material platforms are also discussed. Moreover, we will present the results from the works on device fabrication, including lasers, solar cells, water splitting devices, photodetectors and FETs, where ternary Ⅲ–Ⅴ NWs were used as building blocks. Through the current paper, we exhibit the up-to-date state in this field of research and summarize the important accomplishments of the past few years.     

Pulsed characterisation of GaN HEMTs on Si (1 1 1) substrate

The DC and RF power characteristics of GaN HEMTs under continuous wave (CW) and pulsed load-pull measurement are examined, in this article. The results give a comprehensive understanding of self-heating effects and allow improved heat dissipation, by pulsed measurement. The measured output power increases under the pulse load-pull measurement, due to the isothermal environment. The RF power performance for pulsed mode was measured at 3.5?GHz, with 18.4?dB power gain and a large 3.5?W/mm power output, under pulse load-pull, which is a 3.25?dB improvement, compared to CW operation. The relationship of output power and impedance is determined by load-pull measurement.     

Impact of defect on I(V) instabilities observed on Ti/4H–SiC high voltage Schottky diodes

Anomaly in current at low forward bias is observed for large-area Ti Schottky diodes on n type 4H–SiC. Random telegraph signal (RTS) measurements, carried out on these defective devices, show discrete time switching of the current. Thermal activation of RTS signal gives two related trap signature (activation energy and cross section). Frequency analysis, using power spectral densities (PSDs) numerically calculated, confirms the presence of an extended defect which presents different charge states (i.e. an extended defect decorated by punctual traps). PSDs show two cut-off frequencies proving the individual response of two traps. Simulations of the I–V characteristics using two barrier heights modulated by a Gaussian function which represents the defect distribution show a good agreement with the experimental results. Finally we note that there's a strong correlation between traps observed by telegraph noise techniques and excess current.     

Direct calculations on the band offsets of large-lattice-mismatched and heterovalent Si and III–V semiconductors

Band offset in semiconductors is a fundamental physical quantity that determines the performance of optoelectronic devices. However, the current method of calculating band offset is difficult to apply directly to the large-lattice-mismatched and heterovalent semiconductors because of the existing electric field and large strain at the interfaces. Here, we proposed a modified method to calculate band offsets for such systems, in which the core energy level shifts caused by heterovalent effects and lattice mismatch are estimated by interface reconstruction and the insertion of unidirectional strain structures as transitions, respectively. Taking the Si and III–V systems as examples, the results have the same accuracy as what is a widely used method for small-lattice-mismatched systems, and are much closer to the experimental values for the large-lattice-mismatched and heterovalent systems. Furthermore, by systematically studying the heterojunctions of Si and III–V semiconductors along different directions, it is found that the band offsets of Si/InAs and Si/InSb systems in [100], [110] and [111] directions belong to the type I, and could be beneficial for silicon-based luminescence performance. Our study offers a more reliable and direct method for calculating band offsets of large-lattice-mismatched and heterovalent semiconductors, and could provide theoretical support for the design of the high-performance silicon-based light sources.     

III–V semiconductors on Si substrates: New directions for heterojunction electronics

Excellent device performance at both d.c. and microwave frequencies has recently been obtained from GaAs based devices grown on Si substrates. In GaAs MESFETs on Si, current gain cutoff frequencies and maximum oscillation frequencies of f_T = 13.3 GHz and f_max = 30 GHz have been obtained for 1.2 μm devices, which is nearly identical to the performance achieved in GaAs on GaAs technology for both direct implant and epitaxial technology. For heterojunction bipolar transistors, current gain cutoff frequencies and maximum oscillation frequencies of f_T = 30 GHz and f_max = 11.3 GHz have been obtained for emitter dimensions of 4 × 20 μm². These results compare with the best reported HBT on GaAs substrates of f_T = 40 GHz and f_max = 26 GHz with much smaller geometry. Given the performance already demonstrated in AaAs on Si devices and the advantages afforded by this technology, the growth of III–Vs on Si promises to play an important role in the future of heterojunction electronics.     

CdTe/GaAs(111)B薄膜的MBE生长研究

采用分子束外延方法,在GaAs(111)B衬底上,生长CdTe薄膜,以求研制出用于液相外延生长碲镉汞(HgCdTe)薄膜的CdTe/GaAs(111)B复合衬底.通过理论分析和实验探索,优化了生长温度和Te/Cd束流比等重要生长参数,获得了质量较好的CdTe薄膜,再通过循环热处理,使CdTe/GaAs(111)B复合衬底的质量得到进一步的提高,X-射线回摆曲线半峰宽(FWHM)有明显的降低.为LPE-HgCdTe薄膜的生长打下了较好基础.     

Peculiarities of the Properties of III–V Semiconductors in a Multigrain Structure

The systematized results of studies of the properties of InAs, InSb, and GaAs semiconductors in a multigrain structure based on measurement and analysis of the current–voltage and spectral characteristics are presented. It is established that electron emission and injection are determined by the localization effects of states in the bulk and surface region of submicron grains. The phenomena of current limitation and lowfield emission characteristic of quantum dots are revealed and studied. The results can be used in studies and in the development of multigrain structures for gas and optical sensors, detectors, and emitters of infrared and terahertz ranges.     

Interface studies of ALD-grown metal oxide insulators on Ge and III–V semiconductors (Invited Paper)

Atomic layer deposited (ALD) HfO₂/GeO_xN_y/Ge(1 0 0) and Al₂O₃/In_0.53Ga_0.47As(1 0 0) ? 4 × 2 gate stacks were analyzed both by MOS capacitor electrical characterization and by advanced physical characterization to correlate the presence of electrically-active defects with chemical bonding across the insulator/channel interface. By controlled in situ plasma nitridation of Ge and post-ALD annealing, the capacitance-derived equivalent oxide thickness was reduced to 1.3 nm for 5 nm HfO₂ layers, and mid-gap density of interface states, D_it = 3 × 10¹¹ cm^?2 eV^?1, was obtained. In contrast to the Ge case, where an engineered interface layer greatly improves electrical characteristics, we show that ALD-Al₂O₃ deposited on the In_0.53Ga_0.47As (1 0 0) ? 4 × 2 surface after in situ thermal desorption in the ALD chamber of a protective As cap results in an atomically-abrupt and unpinned interface. By avoiding subcutaneous oxidation of the InGaAs channel during Al₂O₃ deposition, a relatively passive gate oxide/III–V interface is formed.