30 GHz SiGe active inductor with voltage controlled Q

An active inductor (AI) based on a cascade gyrator for 30 GHz applications implemented with a 0.25 μm in SiGe technology is presented. The gyrator converts not only a key capacitor into an inductor, but also an added resistor, into a negative resistor. This gyrator-RC has its losses compensated by the negative resistor improving the active inductor Q factor. Changing the bias voltage and current allows to obtain a variable AI. A study of a cascade gyrator AI topology is done to understand the circuit behavior and key elements. For this purpose, an AI impedance model is introduced and discussed. An improved AI with the added resistor replaced by a voltage controlled mosfet resistor is proposed. This extra control voltage allows the variable AI quality factor fine tuning. Schematic and circuit extracted from layout simulations are presented, and compared with the measured results of two prototypes of the AIs (one with a fixed resistor and other with a voltage controlled resistor). A prototype of a high pass filter using the AI with fine Q control was fabricated. Non-linear simulations for different input signal levels were performed and compared with measurements. Also discussion on the non-linear models accuracy is performed.     

Design of 10 GHz eight-phase voltage controlled oscillator in 90 nm CMOS

A novel 10 GHz eight-phase voltage-controlled oscillator(VCO) architecture applied in clock and data recovery(CDR) circuit for 40 Gbit/s optical communications system is proposed.Compared with the traditional eight-phase oscillator,a new ring CL ladder filter structure with four inductors is proposed.The VCO is designed and fabricated in IBM 90nm complementary metal-oxide-semiconductor transistor(CMOS) technology.Measurement results show the tuning range is 9.2 GHz～11.0 GHz and the phase noise of-108.85 dBc/Hz at 1 MHz offset from the carrier frequency of 10 GHz.The chip area of VCO is 500 μm× 685 μm and the power dissipation is 17.4 mW with the 1.2 V supply voltage.     

Optimized 2.4 GHz voltage controlled oscillator with a high-Q MWCNT network-based pulse-shaped inductor

This paper focuses on the use of a high-Q Multi-Wall Carbon Nano-Tube (MWCNT)-based pulse-shaped inductor in the implementation of an LC differential voltage-controlled oscillator (LCVCO). The topology integrates a micro-scaled capacitor and a MWCNT network-based inductor together with the CMOS circuits. The CMOS circuits were designed to enhance the quality factor and to control the oscillation amplitude. The high quality factor of the inductor improves the overall quality factor and phase noise of the oscillator. The measurement results show that the LCVCO operates at 2.3982 GHz and achieves a phase noise of ?133.3 dBc/Hz at 1 MHz away from the carrier frequency. The VCO produces frequency tuning from 2.07 GHz to 2.77 GHz (29.16%) with an ultra low power consumption of 1.7 mW from a 0.6 V supply voltage. The output power level of the VCO is ?10 dBm, with an improved quality factor of 49.     

A simple voltage controlled oscillator with grounded capacitors

A simple voltage controlled oscillator circuit using capacitors, all of which are grounded, is presented. The circuit is thus attractive from the point of view of monolithic or hybrid IC fabrication. The frequency of oscillation can be varied over a wide range, with the amplitude of oscillation remaining relatively stable over the range. Experimental results are given that agree closely with the theoretical predictions.     

Varactor-tuned gunn diode voltage controlled oscillator antenna array

A simple varactor tuned X-band Gunn diode VCO antenna array which is strongly coupled has been demonstrated. These arrays have the advantages of simple biasing circuit, no resistors required to eliminate multimode problem and suitable for monolithic integration circuit. Preliminary results show a maximum tuning range of 47MHz for 1×1 array and 170MHz for 2×2 array. In order to solve power combining heating problem, we move the backside metal forward and it becomes a microstrip form. The measured frequency and radiation patterns of these grid arrays agree very well with theoretical calculations.     

Ring voltage controlled oscillator for high-speed PLL systems

A circuit of a ring voltage controlled oscillator (VCO), which is to be used in high-speed phase-locked loop (PLL) systems integrated into programmable logic integrated circuits, is proposed. The maximum operating frequency of a VCO in 180 nm CMOS is shown by simulation to be able to reach 2 GHz in all operating conditions with the phase noise being ?99 dB/Hz and detuning frequency being 1 MHz.     

CMOS second-harmonic quadrature voltage controlled oscillator using substrate for coupling

In this work, a new circuit configuration for second-harmonic quadrature voltage controlled oscillator (QVCO) with CMOS technology is proposed. The proposed QVCO is made by coupling two identical cross-connected VCOs. The coupling elements (two resistors and two capacitors) do not increase the power consumption of the core VCOs and do not disturb the resonant frequency of the tank circuit in the core VCOs and also, according to the simulations the coupling elements do not adversely affect the phase noise. The role of the substrate terminal of cross-connected MOSFETs of the core oscillators as common mode nodes is demonstrated. Using this node for coupling makes it possible to eliminate the tail transistors in the core oscillators and therefore the circuit can operate with supply voltages as low as 0.5 V. Using the same method to couple more than two core oscillators, results in a multiphase VCO.     

A 6-GHz capacitively-coupled Colpitts CMOS quadrature voltage controlled oscillator

In this work a new low-noise low-power Colpitts quadrature voltage controlled oscillator (QVCO) made by coupling two identical current-switching differential Colpitts voltage controlled oscillators (VCO) is proposed; coupling of the VCOs is done using some capacitors in an “in-phase anti-phase” scheme. In this coupling configuration first harmonics (as well as higher harmonics) from each VCO are injected to the other VCO, as opposed to coupling schemes in which only even harmonics are injected. An analysis of the linearized circuit which confirms 90° phase difference between output signals of the proposed circuit is presented. Since no extra noise sources or power consumption are introduced to the core VCOs, the proposed QVCO achieves low phase noise performance and low power consumption. The proposed circuit is designed and simulated in a commercial 0.18 μm CMOS technology. The simulated phase noise of the proposed QVCO at 3 MHz offset frequency is ?138.3 dBc/Hz, at 6 GHz. The circuit dissipates 8.16 mW from a 1.8 V supply and its frequency can be tuned from 5.6 to 6.3 GHz.     

Ultra low power DG FinFET based voltage controlled oscillator circuits

Voltage-controlled oscillator (VCO) significantly influences power and performance in many analog and digital applications. In this era of portable electronics, power consumption has emerged as an important design metric. Intended subthreshold circuits have proven their ability to satisfy this demand of ultra low-power consumption of a multitude of applications such as RFID, microsensors, etc. Double-gate Fin-FET technology is a promising alternative to the CMOS technology for the subthreshold circuits because of its enhanced gate control, improved performance, scalability, and robustness. Therefore, this paper investigates the viability of DG FinFET Current Starved Voltage Controlled Oscillator (CSVCO) in the subthreshold regime. The results indicate the superior performance of DG FinFET-based CSVCO in regard to speed, PDP, EDP, and variability as compared to CMOS-based CSVCO. Seven different CSVCO configurations, viz.. SG, IG, hybrid, hybrid reverse, pignsg, psgnig and MIGFET, designed using different configurations of DG FinFET, are simulated using 32 nm FinFET Predictive Technology Model (PTM) in HSPICE at 150 mv power supply. The proposed pignsg CSVCO shows better results in terms of frequency obtained versus power expended giving least PDP of 1.25E-16J and better immunity to supply voltage and process variations compared to all other CSVCO configurations.     

Low phase-noise integrated voltage controlled oscillator design using LTCC technology

This paper describes the design and implementation of a highly integrated voltage controlled oscillator (VCO) module based upon Low-Temperature Co-fired Ceramic (LTCC) packaging technology. The circuit is realized by embedding the strip-line resonator and lumped passives inside a multilayer LTCC substrate. Measurement results of a silicon bipolar VCO circuit operating at 2.4 GHz is shown. The constructed module is compact in size and has good phase noise performance.     

Coarse-fine, wideband distributed voltage controlled oscillator for wireless applications

A new distributed voltage controlled oscillator (DVCO) is presented. The proposed topology allows a very wide tuning range VCO and fine-coarse tuning. The design of a prototype DVCO is discussed and measurements are reported showing improved performance in terms of phase noise, tuning range and power consumption.     

Fully integrated low phase noise multi-band LC-tank voltage controlled oscillator with switched-capacitor resonator

This paper presents the design and implementation of a fully integrated low noise multi-band LC-tank voltage-controlled-oscillator(VCO).Multi-band operation is achieved by using switched-capacitor resonator.Additional three-bit binary weighted capacitor array is also used to extend frequency tuning range in each band.To lower phase noise,two noise filters are added and a linear varactor is adopted.Implemented in a 0.18 μm complementary-metal-oxide-semiconductor(CMOS) process,the VCO achieves a frequency tuning range covering 2.26～2.48 GHz,2.48～2.78 GHz,2.94～3.38 GHz,and 3.45～4.23 GHz while occupies a chip area of 0.52 mm2.With a 1.8 V power supply,it draws a current of 10.9 mA,10.6 mA,8.8 mA,and 6.2 mA from the lowest band to the highest band respectively.The measured phase noise is-109～-120 dBc/Hz and-121～-131 dBc/Hz at a 1 MHz and 2.5 MHz offset from the carrier,respectively.     

具有自校准压控振荡器和精确自动频率校准算法的低噪声频率合成器

A low noise phase locked loop （PLL） frequency synthesizer implemented in 65 nm CMOS technology is introduced. A VCO noise reduction method suited for short channel design is proposed to minimize PLL output phase noise. A self-calibrated voltage controlled oscillator is proposed in cooperation with the automatic frequency calibration circuit, whose accurate binary search algorithm helps reduce the VCO tuning curve coverage, which reduces the VCO noise contribution at PLL output phase noise. A low noise, charge pump is also introduced to extend the tuning voltage range of the proposed VCO, which further reduces its phase noise contribution. The frequency synthesizer generates 9.75-11.5 GHz high frequency wide band local oscillator （LO） carriers. Tested 11.5 GHz LO bears a phase noise of-104 dBc/Hz at 1 MHz frequency offset. The total power dissipation of the proposed frequency synthesizer is 48 mW. The area of the proposed frequency synthesizer is 0.3 mm^2, including bias circuits and buffers.     

Alumina microstrip GaAs f.e.t. 11 GHz oscillator

A small, lightweight 11 GHz f.e.t. oscillator has been developed. An output power of 10 mW with an efficiency of 10% was easily produced using a GaAs f.e.t. designed for small-signal amplifier applications. Its low power consumption makes it a suitable low-noise source for integrated-receiver applications.     

Curvature-compensated BiCMOS bandgap with 1-V supply voltage

We present a bandgap circuit capable of generating a reference voltage of 0.53 V. The circuit, implemented In a submicron BiCMOS technology, operates with a supply voltage of 1 V, consuming 92 μW at room temperature. In the bandgap circuit proposed, we use a nonconventional operational amplifier which achieves virtually zero systematic offset, operating directly from the 1-V power supply. The bandgap architecture used allows a straightforward implementation of the curvature compensation method. The proposed circuit achieves 7.5 ppm/K of temperature coefficient and 212 ppm/V of supply voltage dependence, without requiring additional operational amplifiers or complex circuits for the curvature compensation     

An approach for SiGe HBT small-signal modelling up to 40 GHz

In this article, a simple method for the small-signal equivalent-circuit modelling of SiGe heterojunction bipolar transistors (HBTs) fabricated with a 0.13-μm BiCMOS technology is proposed. The presented transistor model is compatible with BiCMOS processes and takes into account the parasitic effects such as substrate effect and the extrinsic capacitances. The parameter-extraction approach is based on the analytically derived equations in conjunction with the optimisation technology. The intrinsic parameters are described as the function of extrinsic resistances. The extrinsic resistances are iteratively extracted by the variance of the intrinsic elements as an optimisation criterion. The proposed modelling approach is validated by SiGe HBTs with 0.2 × 5.9 μm² emitter occupying area from 50 MHz to 40 GHz. The agreements between the measured and modelled data are excellent in the desired frequency range over a wide range of bias points with different bias conditions.     

Novel digitally programmable multiphase voltage controlled oscillator and its stability discussion

In this paper, a novel programmable current-mode multiphase voltage controlled oscillator (MVCO) is presented. The proposed MVCO consists of four identical first-order all-pass filters, which act for delay cells of the MVCO. By switching the programmable MOS switches on and off, the MVCO can provide six or eight different phase sinusoidal signals. Theoretically, the proposed MVCO can provide 2n (n ? 3) different phase sinusoidal signals by cascading n (n ? 3) first-order all-pass delay cells. Compared with previous reported works, this MVCO has the advantages of lower supply voltage, lower power consumption, a smaller chip area and more multi-outputs than other reported works. In particularly, by using programmable switches and cascading more first-order all-pass delay cells, the proposed MVCO can theoretically provide 2n (n ? 3) different phase sinusoidal signals.     

A 580-μW 1.8–6 GHz Multiband Switched-Resonator SiGe VCO With 0.3-V Supply Voltage

This letter presents a fully integrated low-power low-voltage multiband switched-resonator differential cross-coupled voltage controlled oscillator (VCO) implemented in 0.18 SiGe-BiCMOS technology. The VCO operates with a supply voltage as low as 0.29 V, owing to the low knee-voltage provided by the technology, and consumes a total power of 580 muW. Utilizing a switched-resonator, the VCO covers a wide switched frequency range of 1.83-2.97 GHz and 4.36-6.17 GHz with measured phase noise of around 112.2 dBc/Hz with 0.29 V supply and 119.7 dBc/Hz with 1 V supply at 1 MHz offset. Since high-frequency bands experience higher phase noise than the low frequency bands, high- short microstrip line inductors have been used for the high-frequency bands. To the best of the authors' knowledge, the reported VCO achieves the widest switched frequency tuning range with lowest core supply voltage.     

基于MBE的fmax为157GHz的SiGeHBT器件

在模拟集成电路的应用中,不仅注重器件fT,而且注重晶体管最高振荡频率(fmax).文中以MBE生长的SiGe材料为基础,进行了提高SiGe HBT器件fmax的研究,研制出了fmax＝157GHz的SiGe HBT器件.     

基于MBE的fmax为157GHz的SiGe HBT器件

在模拟集成电路的应用中，不仅注重器件fT，而且注重晶体管最高振荡频率（fmax）．文中以MBE生长的SiGe材料为基础，进行了提高SiGe HBT器件fmax的研究，研制出了fmax＝157GHz的SiGe HBT器件