Highly-impermeable Al2O3/HfO2 moisture barrier films grown by low-temperature plasma-enhanced atomic layer deposition

Polymer substrates are essential components of flexible electronic applications such as OTFTs, OPVs, and OLEDs. However, high water vapor permeability of polymer films can significantly reduce the lifetime of flexible electronic devices. In this study, we examined the water vapor permeation barrier properties of Al₂O₃/HfO₂ mixed oxide films on polymer substrates. Al₂O₃/HfO₂ films deposited by plasma-enhanced atomic layer deposition were transparent, chemically stable in water and densely amorphous. At 60 °C and 90% relative humidity (RH) accelerated condition, 50-nm-thick Al₂O₃/HfO₂ had water vapor transmission rate (WVTR) = 1.44 × 10⁻⁴ g m⁻² d⁻¹, whereas single layers of Al₂O₃ had WVTR = 3.26 × 10⁻⁴ g m⁻² d⁻¹ and of HfO₂ had WVTR = 6.75 × 10⁻² g m⁻² d⁻¹. At 25 °C and 40% RH, 50-nm-thick Al₂O₃/HfO₂ film had WVTR = 2.63 × 10⁻⁶ g m⁻² d⁻¹, which is comparable to WVTR of conventional glass encapsulation.     

Extraction of SiO2/SiC interface trap profile in 4H- and 6H-SiC metal-oxide semiconductor field-effect transistors from subthreshold characteristics at 25°C and 150°C

The profile of trap density at the SiO₂/SiC interface in SiC metal-oxide semiconductor field-effect transistors (MOSFETs) is critical to study the channel electron mobility and evaluate device performance under various processing and annealing conditions. In this work, we report on our results in determining the interface trap density in 4H- and 6H-SiC MOSFETs annealed in dry O₂, NO, and CO₂, respectively, based on the device transfer and currentvoltage characteristics in the subthreshold region at 25°C and 150°C. We also studied electron field-effect mobility, fixed oxide charge, and gate leakage in those devices.     

High-performance pentacene field-effect transistors using Al2O3 gate dielectrics prepared by atomic layer deposition (ALD)

High-performance pentacene field-effect transistors have been fabricated using Al₂O₃ as a gate dielectric material grown by atomic layer deposition (ALD). Hole mobility values of 1.5 ± 0.2 cm²/V s and 0.9 ± 0.1 cm²/V s were obtained when using heavily n-doped silicon (n⁺-Si) and ITO-coated glass as gate electrodes, respectively. These transistors were operated in enhancement mode with a zero turn-on voltage and exhibited a low threshold voltage (< −10 V) as well as a low sub-threshold slope (<1 V/decade) and an on/off current ratio larger than 10⁶. Atomic force microscopy (AFM) images of pentacene films on Al₂O₃ treated with octadecyltrichlorosilane (OTS) revealed well-ordered island formation, and X-ray diffraction patterns showed characteristics of a “thin film” phase. Low surface trap density and high capacitance density of Al₂O₃ gate insulators also contributed to the high performance of pentacene field-effect transistors.     

1 Volt organic transistors with mixed self-assembled monolayer/Al2O3 gate dielectrics

Control of the threshold voltage and the subthreshold swing is critical for low voltage transistor operation. In this contribution, organic field-effect transistors (OFETs) operating at 1 V using ultra-thin (∼4 nm), self-assembled monolayer (SAM) modified aluminium oxide layers as the gate dielectric are demonstrated. A solution-processed donor–acceptor semiconducting polymer poly(3,6-di(2-thien-5-yl)-2,5-di(2-octyldodecyl)-pyrrolo[3,4-c]pyrrole-1,4-dione)thieno[3,2-b]thiophene) (PDPP2TTT) is used as the active layer. It is shown that the threshold voltage of the fabricated transistors can be simply tuned by carefully controlling the composition of the applied SAM. The optimised OFETs display threshold voltages around 0 V, low subthreshold slopes (150 ± 5 mV/dec), operate with negligible hysteresis and show average saturated field-effect mobilities in excess of 0.1 cm²/V s at 1 V.     

High-performance enhancement-mode AlGaN/GaN MOS-HEMTs with fluorinated stack gate dielectrics and thin barrier layer

We present high-performance enhancement-mode AlGaN/GaN metal-oxide-semiconductor high-electron mobility transistors (MOS-HEMTs) by a fluorinated gate dielectric technique. A nanolaminate of an Al₂O₃/La_xAl_1-xO₃/Al₂O₃ stack (x≈0.33) grown by atomic layer deposition is employed to avoid fluorine ions implantation into the scaled barrier layer. Fabricated enhancement-mode MOS-HEMTs exhibit an excellent performance as compared to those with the conventional dielectric-last technique, delivering a large maximum drain current of 916 mA/mm and simultaneously a high peak transconductance of 342 mS/mm. The balanced DC characteristics indicate that advanced gate stack dielectrics combined with buffered fluorine ions implantation have a great potential for high speed GaN E/D-mode integrated circuit applications.     

聚酰亚胺为栅绝缘层的并五苯场效应晶体管

以真空蒸发的有机半导体材料并五苯为有源层,以旋涂的聚酰亚胺作为栅绝缘层,以真空蒸发的Al为栅、源和漏电极,成功制作了顶接触式并五苯有机场效应晶体管(OFET).测试表明,在源漏电压为70 V时,器件的载流子迁移率μ为0.079 cm2/V·s,器件的开关电流比为1.7×104.     

Al2O3/TiO2 nanolaminate gate dielectric films with enhanced electrical performances for organic field-effect transistors

Nanolamination has entered the spotlight as a novel process for fabricating highly dense nanoscale inorganic alloy films. OFET commercialization requires, above all, excellent dielectric properties of gate dielectric layer. Here, we describe the fabrication and characterization of Al–O–Ti (AT) nanolaminate gate dielectric films using a PEALD process, and their OFET applications. The AT films exhibited a very smooth surface (R_q < 0.3 nm), a high dielectric constant (17.8), and a low leakage current (8.6 × 10⁻⁹ A/cm² at 2 MV/cm) compared to single Al₂O₃ or TiO₂ films. Importantly, a 50 nm thick AT film dramatically enhanced the value of μFET (0.96 cm²/V) on a pentacene device, and the high off-current level in a single TiO₂ film was effectively reduced. The nanolamination process removes the drawbacks inherent in each single layer so that the AT film provides excellent dielectric properties suitable for fabricating high-performance OFETs. Triethylsilylethynyl anthradithiophene (TES-ADT), a solution-processable semiconductor, was combined with the AT film in an OFET, and the electrical properties of the device were characterized. The excellent dielectric properties of the AT film render nanolamination a powerful strategy for practical OFET applications.     

Spatially separated atomic layer deposition of Al2O3, a new option for high‐throughput Si solar cell passivation

A next generation material for surface passivation of crystalline Si is Al₂O₃. It has been shown that both thermal and plasma‐assisted (PA) atomic layer deposition (ALD) Al₂O₃ provide an adequate level of surface passivation for both p‐ and n‐type Si substrates. However, conventional time‐resolved ALD is limited by its low deposition rate. Therefore, an experimental high‐deposition‐rate prototype ALD reactor based on the spatially separated ALD principle has been developed and Al₂O₃ deposition rates up to 1.2 nm/s have been demonstrated. In this work, the passivation quality and uniformity of the experimental spatially separated ALD Al₂O₃ films are evaluated and compared to conventional temporal ALD Al₂O₃, by use of quasi‐steady‐state photo‐conductance (QSSPC) and carrier density imaging (CDI). It is shown that spatially separated Al₂O₃ films of increasing thickness provide an increasing surface passivation level. Moreover, on p‐type CZ Si, 10 and 30 nm spatial ALD Al₂O₃ layers can achieve the same level of surface passivation as equivalent temporal ALD Al₂O₃ layers. In contrast, on n‐type FZ Si, spatially separated ALD Al₂O₃ samples generally do not reach the same optimal passivation quality as equivalent conventional temporal ALD Al₂O₃ samples. Nevertheless, after “firing”, 30 nm of spatially separated ALD Al₂O₃ on 250 µm thick n‐type (2.4 Ω cm) FZ Si wafers can lead to effective surface recombination velocities as low as 2.9 cm/s, compared to 1.9 cm/s in the case of 30 nm of temporal ALD Al₂O₃. Copyright © 2011 John Wiley & Sons, Ltd.     

Pure germanium epitaxial growth on thin strained silicon-germanium graded layers on bulk silicon substrate for high-mobility channel metal-oxide-semiconductor field-effect transistors

We demonstrate epitaxially grown high-quality pure germanium (Ge) on bulk silicon (Si) substrates by ultra-high-vacuum chemical vapor deposition (UHVCVD) without involving growth of thick relaxed SiGe buffer layers. The Ge layer is grown on thin compressively strained SiGe layers with rapidly varying Ge mole fraction on Si substrates resulting in several SiGe interfaces between the Si substrate and the pure Ge layer at the surface. The presence of such interfaces between the Si substrate and the Ge layer results in blocking threading dislocation defects, leading to a defect-free pure Ge epitaxial layer on the top. Results from various material characterization techniques on these grown films are shown. In addition, capacitance-voltage (CV) measurements of metal-oxide-semiconductor (MOS) capacitors fabricated on this structure are also presented, showing that the grown structure is ideal for high-mobility metal-oxide-semiconductor field-effect transistor applications.     

原子层沉积薄膜之激光损伤性能分析

采用目前尚在国内鲜有报道的原子层沉积技术在熔石英和BK7玻璃基片上镀制了TiO2单层膜、AlO3单层膜以及TiO2/Al2O3增透膜,沉积温度在110℃和280℃.利用X射线粉末衍射仪对膜层微观结构进行了分析研究,并在激光损伤平台上进行了抗激光损伤阈值的测量.采用Nomarski微分干涉差显微镜和原子力显微镜对激光损伤...     

IGZO thin film transistors with Al2O3 gate insulators fabricated at different temperatures

Thin film transistors (TFTs) with bottom gate and staggered electrodes using atomic layer deposited Al₂O₃ as gate insulator and radio frequency sputtered In–Ga–Zn Oxide (IGZO) as channel layer are fabricated in this work. The performances of IGZO TFTs with different deposition temperature of Al₂O₃ are investigated and compared. The experiment results show that the Al₂O₃ deposition temperature play an important role in the field effect mobility, I_on/I_off ratio, sub-threshold swing and bias stability of the devices. The TFT with a 250 °C Al₂O₃ gate insulator shows the best performance; specifically, field effect mobility of 6.3 cm²/Vs, threshold voltage of 5.1 V, I_on/I_off ratio of 4×10⁷, and sub-threshold swing of 0.56 V/dec. The 250 °C Al₂O₃ insulator based device also shows a substantially smaller threshold voltage shift of 1.5 V after a 10 V gate voltage is stressed for 1 h, while the value for the 200, 300 and 350 °C Al₂O₃ insulator based devices are 2.3, 2.6, and 1.64 V, respectively.     

Influence of Si<Subscript>3</Subscript>N<Subscript>4</Subscript> passivation on surface trapping in SiC metal-semiconductor field-effect transistors

The SiC metal-semiconductor field-effect transistors (MESFETs) have been reported to have current instability and strong dispersion caused by trapping phenomena at the surface and in the substrate, which degrade direct-current (DC) and radio-frequency (RF) performance. This paper illustrates the change in electrical characteristics of SiC MESFETs after Si₃N₄ passivation. Because of a reduction of surface trapping effects, Si₃N₄ passivation can diminish current collapse under pulsed DC conditions, increasing the RF power performance. The reduction of surface trapping effects is verified by the change in the ratio of the drain current to the gate current under pinch-off conditions.     

TDDB improvement by optimized processes on metal-insulator-silicon capacitors with atomic layer deposition of Al2O3 and multi layers of TiN film structure

an 1 × 10-12 A/cm2.No early failures under stress conditions are found in its TDDB test.The novel MIS capacitor is proven to have excellent reliability for advanced DRAM technology.     

Characterization of hafnium oxide grown on silicon by atomic layer deposition: Interface structure

Ultra-thin films of hafnium oxide deposited on Si(1 0 0) substrates by means of atomic layer deposition using tetrakis(diethylamino)hafnium as the hafnium precursor are characterized. These films and interface structures are probed using Fourier transform infrared spectroscopy along with Z-contrast imaging and electron energy loss spectroscopy (EELS) of a scanning transmission electron microscope. The interface structure of HfO₂/Si(1 0 0) is further investigated using angle resolved X-ray photoelectron spectroscopy to probe the core level orbitals (Hf 4f, Si 2p, O 1s) at high resolution. The interfacial differences are also examined by probing the Hf 4f bonding with normal incidence XPS in thin and thick films. The XPS studies show that the binding energies remain unchanged with film depth and that there is no apparent signature of silicate structure in the as-deposited films. EELS spectra taken at the interface and XPS measurements suggest the interface is mainly silicon oxide. Two different cleaning methods used show difference only in the thickness of the silicon oxide interlayer.     

氧化铝钝化在晶体硅太阳电池中的应用

首先,回顾了氧化铝钝化技术的发展历程,对制备氧化铝钝化薄膜的手段进行了总结,并且详细描述了氧化铝的材料性质和钝化的机理。其次,指出氧化铝薄膜的优点在于优异的场效应钝化特性和良好的化学钝化性质,因此可以应用于低掺和高掺p型硅表面的钝化。此外,氧化铝薄膜及其叠层还具有良好的热稳定性,符合丝网印刷太阳电池的要求。最后,总结了氧化铝薄膜钝化技术在晶体硅太阳电池中的最新研究动态,指出氧化铝钝化薄膜用于工业生产中存在的问题,并针对这些问题提出了有效的解决方案。     

Sub-100 nm ALD-assisted nanoimprint lithography for realizing vertical organic transistors with high ON/OFF ratio and high output current

We introduced a conformal atomic-layer-deposited aluminum oxide layer to cover the imprint mold to reduce the feature size and to strengthen the mold durability. A nano-hole array pattern with diameter down to 85 nm was successfully transferred to sample substrate to fabricate a vertical organic transistor. The Imprint vertical organic transistor exhibited high output current density as 4.35 cm²/V s and high ON/OFF current ratio as 11,000 at a low operation voltage as 1.5 V.     

Selenium doping of GalnP by atomic layer epitaxy

Selenium doping of GalnP was performed using atomic layer epitaxy. The dependence of the n-type carrier concentration of Se-doped GalnP on growth temperature was quite different from that of Se-doped GaAs. Reducing growth temperature was found to be a crucial factor in achieving high n-type doping levels in as-grown Se-doped GalnP.     

Structural,chemical, and electrical properties of Y2O3 thin films grown by atomic layer deposition with an (iPrCp)2Y(iPr-amd) precursor

Y₂O₃ thin films were grown by atomic layer deposition (ALD) through a heteroleptic liquid (iPrCp)₂Y(iPr-amd) precursor at 350 °C. The structural and chemical properties of both as-deposited and annealed Y₂O₃ films at 500 °C and 700 °C are analyzed by atomic force microscopy for variation in surface roughness, X-ray diffraction for crystalline structure, and X-ray photoelectron spectroscopy for chemical states. The as-deposited Y₂O₃ film shows the same crystalline orientation along the plane (222), a stoichiometric state, and minimal hydroxylate formation up to 700 °C. Being the dielectric layer in the metal-oxide-semiconductor capacitor, the as-deposited ALD-Y₂O₃ films with liquid (iPrCp)₂Y(iPr-amd) precursor without any post-deposition annealing show the much lower leakage density than ALD-Y₂O₃ with solid Y(MeCp)₃.     

Unpassivated GaN/AlGaN/GaN power high electron mobility transistors with dispersion controlled by epitaxial layer design

In this paper, a novel GaN/AlGaN/GaN high electron mobility transistor (HEMT) is discussed. The device uses a thick GaN-cap layer (∼250 nm) to reduce the effect of surface potential fluctuations on device performance. Devices without Si₃N₄ passivation showed no dispersion with 200-ns-pulse-width gate-lag measurements. Saturated output-power density of 3.4 W/mm and peak power-added efficiency (PAE) of 32% at 10 GHz (V_DS=+15 V) were achieved from unpassivated devices on sapphire substrates. Large gate-leakage current and low breakdown voltage prevented higher drain-bias operation and are currently under investigation.     

原子层沉积Al_2O_3纳米管弯曲模量的原位研究

本文使用原子层沉积技术以及模板法制备了厚度、成分和结构精确可控的氧化铝纳米管,结合SEM、TEM、SAED和XPS分析,可知所得为非晶态氧化铝纳米管状结构且薄膜致密无针孔,沉积速率为0.11 nm/cycle,实现了纳米管壁厚在纳米尺度精确可控制备。进一步使用自主设计的SEM/SPM(扫描电子显微镜/扫描探针显微镜)联合测试系统,对氧化铝纳米管进行了原位三点弯曲实验研究。结果表明外半径在50 nm左右的氧化铝纳米管的杨氏模量范围在400~600 GPa之间,且杨氏模量值随着纳米管壁厚的增大而递减。