A charge-coupled infrared imaging array with Schottky-barrier detectors

An IR sensitive, charge-coupled linear imaging array using palladium-silicide Schottky-barrier detectors has been designed, fabricated, and tested. Thermal scenes as low in temperature as 110° C were imaged. It was shown theoretically that in the vidicon mode of operation, nonuniformities in the transfer process and in detector capacitance do not degrade the video signal. Good uniformity was indeed obtained in this mode. A scheme for removing the background signal from the detectors before loading into the charge-coupled device (CCD) was incorporated into the design of the chip, and operation in this mode was also demonstrated. This imager, though made with a single level of metallization with gaps, had reasonably good transfer efficiency and is free of smearing and blooming.     

GaAs and related heterojunction charge-coupled devices

A Schottky-barrier gate GaAs charge-coupled device (CCD) technology is described. Experimental devices fabricated in this technology have operated with charge transfer efficiency >0.999/transfer and-have operated at clock frequencyf_{cl} = 500MHz. Implications of this technology in high-speed signal processing and in visible and near-infrared imaging are discussed.     

Measurement of CCD transfer efficiency by use of feedback to increase the effective number of transfers

A technique is reported that permits accurate measurement of transfer efficiency in charge-coupled devices that have low overall transfer loss (/spl les/1 percent). By adding a feedback loop the signal is passed through the CCD many times, thus increasing the measured transfer loss. A detailed analysis is given that predicts the expected improvement in the minimum measurable transfer loss through the application of feedback. These predictions are then compared with experimental results on both three-phase and two-phase charge-coupled devices.     

A charge-coupled area image sensor and frame store

A two-dimensional three-phase charge-coupled array with 128 × 106 elements, that can serve either as a solid-state image sensor or as an analog serial memory, has been built. As an image sensor the device has been operated successfully in the frame transfer mode to yield 120 frames/s with 64 × 106 resolution elements. By using the whole array as an image sensor, pictures with 128 × 106 resolution elements have been obtained at 15 frames/s with tolerable smearing. In the memory mode the device can store a whole analog frame as produced by a companion device, or 13 568 bits of digital information. But for the latter application defect-free devices are mandatory. The design of the device, the various modes of operation, the quality of the results, some typical defects, and some further applications are discussed.     

Computer analysis of surface-charge transport between transfer electrodes in a charge-coupled device

A computer program has been developed that simulates two-dimensional dynamics of electrons and holes in a p-channel charge-coupled device. By using this program we have investigated the effects of two-dimensional device structure on surface-charge transfer, particularly a potential-barrier and fringing field. We have obtained the following results: 1) in case of a p-channel CCD negative charges on the SiO2film at a gap reduce the potential-barrier between transfer electrodes. This effect aids transfer of surface-charge in a CCD with wide gaps. 2) In transfer operation of a CCD with wide gaps, the signal charge must be less than a particular value so that a potential-barrier does not emerge. The particular value depends upon the device parameters and the transfer pulses. 3) The fringing field created by the adjacent electrode enhances the speed of surface-charge transfer. This effect increases with decreasing the transfer-electrode length and the signal charge level. 4) The computer results indicate that 100 percent transfer efficiency is obtained from the strong fringing field after the transfer time is equal to the transit time if no surface states exist.     

The bipolar transistor bucket-brigade shift register

An analysis of the bipolar transistor bucket-brigade shift-register operation is presented for comparison to other charge-transfer shift-register schemes. It is shown that incomplete charge transfer, the most important performance limiting effect for the charge-coupled device and the IGFET bucket brigade, is very small under most practical operating conditions for the bipolar transistor bucket brigade. In addition to charge loss due to finite transistor current gain h/SUB fe/ the next most important performance limitation comes from collector-emitter capacitance. It is shown that this collector-emitter capacitance leads to reduced analog time delay on transfer through the register and to signal attenuation effects similar to those resulting from incomplete charge transfer. Using the results of the analysis, experimental data reported by Sangster are discussed and a comparison of the advantages and disadvantages of the bipolar bucket-brigade register with the MOS charge-transfer registers is made.     

Theory of amorphous-silicon charge-coupled devices

The theory of operation of amorphous-silicon charge-coupled devices has been studied numerically and analytically under the assumption that the localized states in amorphous-silicon are distributed exponentially with respect to energy. The transfer inefficiency ε is found to depend not only on the localized state density but also on the transit time and initial density of signal electrons. The approximate analysis shows thatln(epsilon)is a linear function of logarithmic clock frequency, and that its coefficient is given by the characteristic temperature which represents the steepness of the localized state density distribution in amorphous-silicon.     

Parallel-to-serial transformation by using large-cell-size amorphous-silicon charge-coupled devices

An 8 bit/mm amorphous-silicon charge-coupled device of resistive gate structure and amorphous-silicon transistors has been integrated in monolithic form. The device operated at 10 kHz with a transfer efficiency of more than 99.4% per transfer. Parallel signals applied from external terminals have been transferred to cells in the charge-coupled device under the control of transistors, and have been detected as serial signals at the output terminal of the charge-coupled device.     

Hybrid infrared focal-plane arrays

In this paper, new results are presented in the development of hybrid infrared focal-plane arrays. Attention is focused on hybrid focal-plane arrays using backside-illuminated InAsSb and HgCdTe photovoltaic detectors which are source-coupled into a charge-coupled device (CCD) multiplexer. Background suppression capabilities of the input circuit, charge skimming and partitioning, are experimentally demonstrated. Data on the uniformity and temperature dependence of the input MOSFET threshold voltage are presented. The temperature dependence of the threshold voltage agrees well with theoretically calculated values. Several aspects of the noise problems associated with the hybrid infrared focal-plane arrays are discussed. Noise of a source-coupled input circuit with a feedback amplifier is analyzed and it is shown that although two new noise sources are added, the circuit can operate with less noise than the simple source-coupled input circuit. To further understand focal-plane operation, a noise performance model has been constructed which gives excellent agreement with experimental data. Finally, the performance of hybrid focal-plane arrays is discussed.     

32×32双色红外探测器同步读出电路设计

双色（中短波）同步工作模式的红外探测器,其输出光电流信号为中波信号和中短波混合信号。文中提出了一种电压信号相减的电路结构,可在中波和中短波信号同步积分后,将两个波段的积分电压信号进行相减,得到单独的短波信号,实现信号分离的过程,并对32×32规模的电路进行了仿真验证,电路在仿真中有良好的性能。     

A new accelerated transfer method for the CPD image sensor

A new charge transfer method for the CPD image sensor is proposed. In this method a high transfer speed is achieved with the use of an accelerated charge priming transfer (CPT) coupler, which consists of the array of the conventional CPT's and inverter amplifiers. This constitution strikingly increases the speed as well as the efficiency of the charge transfer from the vertical transport lines with large capacitance to the horizontal buried-channel charge-coupled (BCCD) shift register. Under a high transfer efficiency of more than 98 percent, a short transfer time less than 1 µs has been attained, independently of the signal charge magnitude.     

Self-scanned image sensors based on charge transfer by the bucket-brigade method

Solid-state image sensors which are internally scanned by charge transfer offer a potentially usefull alternative to sensors based onx-yaddressing. The application of charge transfer to solid-state scanning introduces sensor design problems which are common to either the "bucket-brigade" or "charge-coupled" approach. Two-dimensional and single-line sensors employing bucket-brigade scanning have been built and evaluated. Problems discussed include transfer efficiency, video signal extraction, vertical scanning, and spurious effects. The use of the bucket-brigade shift register as a scan generator forx-yaddressing is also described.     

Charge-injection imaging: Operating techniques and performances characteristics

The charge-injection device (CID) imaging technique employs intracell transfer and injection to sense photon-generated charge at each sensing site. Sites are addressed by an X-Y coincident-voltage technique that is not restricted to standard scanning. Free-format (random) site selection is possible. An epitaxial structure provides a buried collector to prevent recollection of the injected charge. In sequential injection, the charge is injected into the substrate and the resulting displacement current sensed. In parallel injection, the functions of signal charge detection and injection have been separated. The injection operation is used to reset (empty) the charge storage capacitors after line readout has been completed. Nondestructive readout (NDRO) is possible by deferring the injection operation. Low-loss NDRO operation has been achieved using a cooled imager. High sensitivity, low dark current, high modulation transfer function (MTF), and low blooming are some additional advantages of sensing signal charge levels within the array. Compared to the charge-coupled device (CCD), the CID approach results in a relatively high output capacitance; however, this is not considered to be a performance-limiting factor for most imaging applications.     

Experimental confirmation of an analytical model for charge transfer in charge-coupled devices

An analytical model for the charge loss as a function of transfer time under low charge levels in surface channel charge-coupled devices has been theoretically determined and experimentally confirmed. The model includes the effect of surface states. A new method of measuring charge transfer makes it possible to determine the role that surface states play in the degradation of signal charge transfer.     

Application of charge-coupled devices to infrared detection and imaging

A review of infrared sensitive charge-coupled devices (IRCCD) is presented. Operational requirements of typical IRCCD applications are briefly introduced. IRCCD devices are divided into two major categories: a) Monolithic devices, which essentially extend the original CCD concept into the IR. Monolithic IRCCD's discussed include inversion-mode devices (with narrow bandgap semiconductor substrate), accumulation-mode devices (extrinsic wide bandgap semiconductor substrate), and Schottky-barrier devices (internal photoemission), b) Hybrid devices, in which the functions of detection and signal processing are performed in separate but integratable components by an array of IR detectors and a silicon CCD shift register unit. Hybrid IRCCD's discussed include both direct injection devices (in conjunction with photovoltaic IR detectors) and indirect injection devices (in conjunction with pyroelectric and photoconductive devices).     

The effects of bulk traps on the performance of bulk channel charge-coupled devices

The effects of bulk traps on the transfer effciency and transfer noise in bulk channel charge-coupled devices (BCCD's) are calculated for different charge packet sizes and operating frequencies. These predictions are compared with experimental results and the distribution and density of bulk states in actual devices are thereby measured. The measured low transfer inefficiency of 10^-4per transfer with no intentionally introduced background charge and low transfer noise are shown to be due to a low bulk state density of 2 × 10¹¹/cm³. A detailed comparison of estimated noise in both surface and bulk channel versions of an image sensor and an analog delay line show that BCCD's are very attractive for low-light level imaging but not as attractive for analog signal processing.     

Noise measurements in charge-coupled devices

Measurements of the noise levels at the output of surface and bulk channel charge-coupled devices with three-phase overlapping polysilicon electrodes are presented. Pulser noise, correlated transfer noise, shot noise, dark current noise, and electrical insertion noise at the input have been measured and studied. The dependences of the electrical insertion noise and the transfer noise on charge packet size and clock frequency are discussed in detail and the latter related to interface state densities. New schemes and input circuits for low-noise electrical insertion of the signal charge are discussed. Our measurements indicate that the noise levels due to the intrinsic noise sources (transfer and storage noise) agree with our physical understanding of the device operation. The noise levels due to the extrinsic noise sources (pulser noise and electrical insertion noise) are above the expected theoretical values.     

Short-channel effects on the input stage of surface-channel CCD's

A detailed study of transient signal charge injection into surface-channel charge-coupled devices using a two-dimensional computer model including the source diffusion and the self-induced and fringing field effects has been carried out. The total delay time required to inject a packet of charge into CCD's for a range of device structures was determined. It is found that the maximum clock pulse frequency of operation is determined by the input delay time and not by the speed of charge transfer which is normally assumed. The results of this study are compared with results obtained using a one-dimensional simulation model for charge injection into CCD's. Experimental justification of the one-dimensional model is provided. With the aid of this analysis a design expression for the intrinsic input delay (the delay associated with the fill portion) for short gate surface-channel CCD's is derived and presented in this paper. It is also shown that for short gate devices (L < 8µm) the input delay time due to scooping is about two to four times the intrinsic delay.     

Properties of an idealized traveling-wave charge-coupled device

In order to ascertain the operating capabilities and drive requirements of the charge-coupled device (CCD), it has been analyzed as a sinusoidal traveling-wave device. From this model, it has been possible to show the drive requirements and the lower bound to power dissipated in the substrate of an operating CCD. Signal loss in the sinusoidal model is due solely to surface-state effects, and varies with the amount of charge being transported through the device. Signal attenuation in digital devices is significantly reduced by using ZERO's that carry at least 10 percent as much charge as the ONE's. Some numerical extracts from the calculations will help illustrate what one can expect from charge-coupled devices. These numbers apply to a CCD with a wavelength (bit length) of 72 µ and a channel width of 20 µ, being driven with a 10-V p-p sine wave at 10 MHz. The drive power, almost purely capacitative, is 27 µW/bit in the absence of a signal and 320 µW/bit carrying a charge of 10^-12C. Due to the motion of this charge through the device, at least 2 µW/ active bit must be dissipated in the CCD substrate. Under these conditions, a uniform surface-state density of 10¹¹states/cm².eV will cause signal attenuation of 1.5 percent per bit with an alternating series of ONE's and empty ZERO's. If the ZERO's carry 0.2 10^-12C, the signal attenuation drops to 1 percent per bit. The reactive power estimates described here are expected to accurately reflect actual device requirements, apart from parasitics. Surface-state attenuation, which is relatively insensitive to frequency, will be supplemented at high frequencies by diffusion-limited transfer.     

Wire transfer of charge packets using a CCD-BBD structure forcharge-domain signal processing

A structure for the virtual transfer of charge packets across metal wires is described theoretically and is experimentally verified. The structure is a hybrid of charge-coupled device (CCD) and bucket-brigade device (BBD) elements and permits the topological crossing of charge-domain signals in low power signal processing circuits. A test vehicle consisting of 8-, 32-, and 96-stage delay lines of various geometries implemented in a double-poly, double-metal foundry process is used to characterize the wire-transfer operation. Transfer efficiency ranging between 0.998 and 0.999 is obtained for surface n-channel devices with clock cycle times in the range from 40 ns to 0.3 ms. Transfer efficiency as high as 0.9999 is obtained for buried n-channel devices. Good agreement is found between experiment and simulation