RFID sensors based on ubiquitous passive 13.56‐MHz RFID tags and complex impedance detection

Passive radio frequency identification (RFID) sensors are attractive in diverse applications where sensor performance is needed at a low cost and when battery‐free operation is critical. We developed a general approach for adapting ubiquitous and cost‐effective passive 13.56‐MHz RFID tags for diverse sensing applications. In developed RFID sensors, the complex impedance of the RFID resonant antenna is measured and correlated to physical, chemical, or biological properties of interest. In contrast to known wireless sensors, developed RFID sensors combine several measured parameters from the resonant sensor antenna with multivariate data analysis and deliver unique capability for multianalyte sensing and rejection of environmental interferences with a single sensor. Theoretical calculations and experiments in an anechoic chamber demonstrate that the developed RFID sensors are immune to common electromagnetic interferences and the sensor/reader system operates within regulated emission levels. Performance of developed RFID sensors is illustrated in measurements of toxic industrial chemicals (TICs) in air with the detection limit (DL) of 80 parts per billion and in a non‐invasive monitoring of milk spoilage. Sensors selectivity is demonstrated in the detection of different vapors with individual sensors. Copyright © 2008 John Wiley & Sons, Ltd.     

Novel tag estimation method by use of Manchester coding in RFID systems

Radio frequency identification suffers from tag collision issue. ALOHA‐based algorithms are useful and practical groups of tag anti‐collision algorithm among others. Some standards such as EPCglobal Class‐1 Generation‐2 use some kind of dynamic framed slotted ALOHA (DFSA) to cope with tag collision. DFSA efficiency depends on estimating the number of unidentified tags in each identification cycle accurately. So tag estimation is one of the challenging issues in DFSA. In this paper, we use Manchester coding to compute the lower bound of collided tags in a frame and then add α as an additional value to computed value according to the difference between optimal number of collision slots and calculated number of collision slots. Then, we evaluate and compare our method with other proposed methods.     

Design of an ultra-low-power digital processor for passive UHF RFID tags

A new architecture of digital processors for passive UHF radio-frequency identification tags is proposed.This architecture is based on ISO/IEC 18000-6C and targeted at ultra-low power consumption.By applying methods like system-level power management,global clock gating and low voltage implementation,the total power of the design is reduced to a few microwatts.In addition,an innovative way for the design of a true RNG is presented,which contributes to both low power and secure data transaction.The digital processor is verified by an integrated FPGA platform and implemented by the Synopsys design kit for ASIC flows.The design fits different CMOS technologies and has been taped out using the 2P4M 0.35μm process of Chartered Semiconductor.     

基于MF RC500型读卡器的无源RFID系统设计

在对射频识别(RFID)系统的组成和原理进行分析的基础上,提出基于Philips公司MF RC500型读卡器和AT89S51型单片机实现的射频识别读写器的设计方法.首先介绍RFID系统的组成及MF RC500的特性,接着给出由AT89S51型单片机和MF RC500构建无源RFID系统的原理设计,以及对Mifare S50卡的读写流程.     

RFID无线射频识别技术应用探析

RFID无线射频识别技术是20世纪80年代开始投入使用的数据采集新技术。针对业界对该技术理论和应用的研究,文章从该技术的系统构成、工作原理、突出的技术优势以及应用前景和需要解决的问题等方面进行了探析。     

一种用于UHF RFID标签的超低功耗数字处理机设计

A new architecture of digital processors for passive UHF radio-frequency identification tags is proposed. This architecture is based on ISO/IEC 18000-6C and targeted at ultra-low power consumption. By applying methods like system-level power management, global clock gating and low voltage implementation, the total power of the design is reduced to a few microwatts. In addition, an innovative way for the design of a true RNG is presented, which contributes to both low power and secure data transaction. The digital processor is verified by an integrated FPGA platform and implemented by the Synopsys design kit for ASIC flows. The design fits different CMOS technologies and has been taped out using the 2P4M 0.35 μm process of Chartered Semiconductor.     

应用于无源超高频射频识别标签的嵌入亚阈值参考源电流模稳压电路

本文设计了一种应用于无源超高频射频识别标签的电流模稳压电路。无源标签的能量必须通过整流电路从射频能量中获取。由于输入射频功率的巨大变化,整流电路的输出需经过稳压后才能为标签提供稳定的电源。通过嵌入亚阈值参考源对流向负载的电流进行精确控制,稳压电路的输出在-20-80℃温度范围内稳定在1-1.3V,并实现了约100kHz的带宽,保证了电源的快速恢复。电路在UMC 0.18um混合CMOS工艺下流片实现,电流功耗为1uA。     

A current-mode voltage regulator with an embedded sub-threshold reference for a passive UHF RFID transponder

This paper presents a current-mode voltage regulator for a passive UHF RFID transponder.The passive tag power is extracted from RF energy through the RF-to-DC rectifier.Due to huge variations of the incoming RF power,the rectifier output voltage should be regulated to achieve a stable power supply.By accurately controlling the current flowing into the load with an embedded sub-threshold reference,the regulated voltage varies in a range of 1-1.3 V from-20 to 80 ℃,and a bandwidth of about 100 kHz is achieved for a fast power recovery.The circuit is fabricated in UMC0.18μm mixed-mode CMOS technology,and the current consumption is only 1 μA.     

Adaptive Binary Splitting: A RFID Tag Collision Arbitration Protocol for Tag Identification

In the RFID system, a reader recognizes tags through communications over a shared wireless channel. When multiple tags transmit their IDs at the same time, the tag-to-reader signals lead to collision. Tag collision arbitration for passive RFID tags is significant for fast identification since collisions disturb the reader's identification process. This paper presents an Adaptive Binary Splitting (ABS) protocol which is an improvement on the binary tree protocol. To reduce collisions and identify tags efficiently, ABS uses information which is obtained from the last processes of tag identification. Our performance evaluation shows that ABS outperforms other tree based tag anti-collision protocols. This work was supported by Korea Research Foundation Grant (KRF-2005-041-D00680).     

A low power CMOS compatible embedded EEPROM for passive RFID tag

A 512-bit low-voltage CMOS-compatible EEPROM is developed and embedded into a passive RFID tag chip using 0.18 μm CMOS technology. The write voltage is halved by adopting a planar EEPROM cell structure. The wide Vth distribution of as-received memory cells is mitigated by an initial erase and further reduced by an in-situ regulated erase operation using negative feedback. Although over-programmed charges leak from the floating gates over several days, the remaining charges are retained without further loss. The 512-bit planar EEPROM occupies 0.018 mm² and consumes 14.5 and 370 μW for read and write at 85 °C, respectively.     

基于FM0记忆辅助特性的RFID标签碰撞检测

为实现两个射频识别(RFID)碰撞标签信息的检测和分离,提出一种利用Gen2标准中FM0标签编码固有记忆特性的检测方法。通过对FM0比特编码特点和碰撞标签信息的无记忆检测分析,得到基于单个比特持续时间的无记忆检测方法的条件错误概率和单个标签信息检测的误码率;然后利用单个FM0比特编码需要前一比特的“记忆”特性,得到对应于前一比特的一对测量值和对应于下一比特的一对测量值,进而得到碰撞标签信息的1比特记忆辅助检测时的条件错误概率和误码率性能;并对在帧Aloha媒质接入方案中采用提出的检测方法时的N个标签群的总延迟减少性能进行了分析。仿真实验结果表明,提出的1比特记忆辅助检测方法,相比于无记忆检测具有更好的误码率性能,且能减少标签群接入时的总延迟。     

UHF频段无源RFID系统干扰分析与抑制策略

在射频识别(RFID)领域,由于UHF频段无源RFID电子标签读写距离远、价格低、寿命长等特点,该频段RFID技术受到世界各国的广泛重视.本文首先介绍UHF频段RFID系统工作原理,然后进行该频段RFID系统的干扰分析并量化分析干扰对RFID读写距离的影响,最后给出UHF频段RFID技术的干扰抑制和部署策略,对该频段RFID技术的应用普及具有重要意义.     

高灵敏度全集成UHF RFID标签的设计与实现

本文给出了一款基于ISO1800-6B协议的全集成的无源UHF RFID标签,这款芯片由模拟前端、基带处理器和EEPROM 存储器组成。在设计过程中,我们采用了具有高效率的差分驱动CMOS整流器使得通信范围得到扩展。我们采用新颖的高性能的电压限制器为芯片提供稳定的电压,这款限压器的在不同温度和工艺变化下的电压漂移只有172mV。在稳压器的设计中,我们采用动态带宽增强技术提高其稳压能力。对已解调器,我们采用了一款轨到轨的比较器实现在任何通信范围下对输入信号的正确解调。标签芯片采用TSMS 0.18um CMOS 工艺,芯片面积为900×800 um2。测试结果显示,芯片功耗为6.8uW,灵敏度达到-13.5dBm。     

A fast tag identification anti‐collision algorithm for RFID systems

In this work, we propose a highly efficient binary tree‐based anti‐collision algorithm for radio frequency identification (RFID) tag identification. The proposed binary splitting modified dynamic tree (BS‐MDT) algorithm employs a binary splitting tree to achieve accurate tag estimation and a modified dynamic tree algorithm for rapid tag identification. We mathematically evaluate the performance of the BS‐MDT algorithm in terms of the system efficiency and the time system efficiency based on the ISO/IEC 18000‐6 Type B standard. The derived mathematical model is validated using computer simulations. Numerical results show that the proposed BS‐MDT algorithm can provide the system efficiency of 46% and time system efficiency of 74%, outperforming all other well‐performed algorithms.     

应用于无源UHF RFID标签的CMOS兼容集成微型太阳能电池研究

在标准CMOS工艺下,设计了一种与CMOS工艺兼容的片上集成太阳能电池阵列,通过从外部环境收集光能为UHF射频识别(RFID)标签供电。采用SMIC 0.18μm CMOS工艺制备出太阳能电池阵列,其面积约为0.2mm2;在AM1.5、1 000W/m2、25℃标准测试条件下,测得最大输出功率为10.212μW,短路电流和开路电压分别为28.763μA和0.458V,光电转换效率为5.106%。相对于常规Si太阳能电池复杂的制造工艺,本文太阳能电池阵列与CMOS工艺相兼容,可与电路系统集成从而实现片上供电。     

一种超低功耗无源超高频射频识别标签芯片的设计与实现

本文提出了一种符合ISO18000-6B协议的无源超高频射频识别标签芯片设计。该芯片包括了射频/模拟前端,数字基带和512比特的EEPROM存储器。采用肖特基二极管来提高整流器的功率转换效率。详细阐述了基于峰值电流源的参考电压源的设计,该电路结构简单,并且可以满足低压、低功耗的设计要求。为了降低功耗,模拟模块工作在1v以下电源电压,并采用了一些低功耗的设计方法进一步降低数字基带的功耗。整个标签芯片采用TSMC 0.18um CMOS工艺实现,芯片尺寸为800*800um2。测试结果表明芯片的总功耗为7.4uW,灵敏度达-12dBm。     

RFID技术及其在ETC系统中的应用

射频识别技术作为一种新兴的自动识别技术,近年来在国内外已经得到了迅速发展。以RFID为研究对象,分析其工作原理及主要特点,通过对不停车收费系统的组成及工作流程的介绍,重点说明RFID技术是如何应用于该系统中的。RFID技术的发展前景广阔,随着ETC系统的不断推广RFID技术在该系统中得到了广泛应用。     

A passive UHF RFID tag with a dynamic-Vth-cancellation rectifier

This paper presents a passive UHF RFID tag with a dynamic-Vth-cancellation(DVC) rectifier. In the rectifier, the threshold voltages of MOSFETs are cancelled by applying gate bias voltages, which are dynamically changed according to the states of the MOSFETs. The DVC rectifier enables both low ON-resistance and small reverse leakage of the MOSFETs, resulting in high power conversion efficiency(PCE). An area-efficient demodulator with a novel average detector is also designed, which takes advantage of the rectifier’s first stage as the envelope detector. The whole tag chip is implemented in a 0.18 μm CMOS process with a die size of 880×950 μm2. Measurement results show that the rectifier achieves a maximum PCE of 53.7% with 80 kΩ resistor load.     

RFID技术在高校资产盘查中的应用研究

为了解决传统资产管理账物不符、资产日趋增多所带来的清查难度大、资产利用率低等问题,采用RFID自动识别技术,在传统资产管理系统基础上,结合网络技术,构建了一套智能、便捷、实时的高校资产盘查方案,实现对流动使用中的资产进行实时动态跟踪处理,大幅降低了管理成本,有效提高了资产管理效率。     

一种改进的RFID系统多状态防碰撞算法

标签防碰撞技术是RFID系统中的关键技术和研究热点.详细分析了典型的二进制及其他改进防碰撞算法原理,并在多状态二进制搜索算法的基础上进行了改进和创新.新算法根据标签碰撞的特点,充分利用已得到的冲突信息,取消了激活命令,大大节省了算法时间,并且新算法能够动态选择分叉数量,使得标签的识别效率得到了提高.性能分析表明,该算法比已有的二进制及动态二进制反碰撞算法具有更明显的优势.