Modeling of output resistance in SiGe heterojunction bipolartransistors with significant neutral base recombination

A simple compact model, suitable for circuit simulations, is derived which enables quantitative determination of the impact of neutral base recombination on the small signal ac output resistance of SiGe HBT's for arbitrary base ac drive conditions. The model uses existing SPICE parameters which are routinely extracted from bipolar transistors plus an additional model parameter which can be extracted from a proposed experimental technique involving output resistance measurements under base ac voltage and current drive conditions. The modeling approach also enables the forward and reverse base transit times to be related to transistor small signal ac output resistance by a simple analytic expression. The currently accepted expression for the r _μ parameter, which is used to model neutral base recombination in the ac hybrid-π equivalent circuit, is shown to be incorrect and is replaced by a new correct expression. Numerical simulations of a SiGe HBT structure which exhibits neutral base recombination are used to verify the validity of the model     

Quantifying neutral base recombination and the effects ofcollector-base junction traps in UHV/CVD SiGe HBTs

This work quantifies neutral base recombination in UHV/CVD SiGe heterojunction bipolar transistors (HBTs) using calibrated two-dimensional (2-D) simulation. The simulated collector-base conductance through neutral base recombination (NBR) modulation is far below the experimentally observed values, and hence does not explain the measured output resistance degradation under forced-I_B operation. In spite of the output resistance degradation, these UHV/CVD SiGe HBTs have approximately the same base current as the silicon control, and hence higher current gain. Based on the observation of the majority carrier concentration limited recombination in the CB junction depletion layer, as opposed to the minority carrier concentration limited recombination in the neutral base, local presence of traps in the CB junction depletion layer is suggested. This explains the measured CB conductance modulation and the related output resistance degradation without compromising the current gain. Numerical simulations using traps locally introduced into the CB junctions successfully reproduced the measured collector-base conductance from simulation without appreciable degradation in current gain     

A new common-emitter hybrid-π small-signal equivalent circuitfor bipolar transistors with significant neutral base recombination

The linear superposition approach to the modeling of small-signal parameters in the presence of substantial base recombination, which involves a virtual transistor without base recombination, is identified to cause incorrect emitter current modeling. All of the terminal current changes can be correctly modeled by using the measured forced-V_BE Early voltage in a new equivalent circuit, which properly accounts for NBR and Early effect in a physically consistent manner. As a result, practical situations of small collector-base resistance (τ _μ) can be properly handled, τ_μ is related to the ac current-drive and ac voltage-drive Early voltages, which facilitates parameter extraction and circuit modeling. Measurements on state-of-the-art UHV/CVD SiGe HBT's show that the conventional assumption that τ_μ is far larger than the forced-V_BE output resistance τ₀ does not apply to devices with significant NBR. In practice, τ_μ can be comparable to (and smaller than) τ₀ depending on the device processing, profiles and operating temperature. Temperature dependent data are presented, and circuit implications are discussed based on the new equivalent circuit     

THE EFFECT OF DOPANT OUTDIFFUSION ON THE NEUTRAL BASE RECOMBINATION CURRENT IN Si/SiGe/Si HETEROJUNCTION BIPOLAR TRANSISTORS

A new analytical model for the base current of Si/SiGe/Si heterojunction bipolar transistors(HBTs) has been developed. This model includes the hole injection current from the base to the emitter, and the recombination components in the space charge region(SCR) and the neutral base. Distinctly different from other models, this model includes the following effects on each base current component by using the boundary condition of the excess minority carrier concentration at SCR boundaries: the first is the effect of the parasitic potential barrier which is formed at the Si/SiGe collector-base heterojunction due to the dopant outdlffusion from the SiGe base to the adjacent Si collector, and the second is the Ge composition grading effect. The effectiveness of this model is confirmed by comparing the calculated result with the measured plot of the base current vs. the collector-base bias voltage for the ungraded HBT. The decreasing base current with the increasing the collector-base reverse bias voltage is successfully explained by this model without assuming the short-lifetime region close to the SiGe/Si collector-base junction, where a complete absence of dislocations is confirmed by transmission electron microscopy (TEM)[1]. The recombination component in the neutral base region is shown to dominate other components even for HBTs with a thin base, due to the increased carrier storage in the vicinity of the parasitic potential barrier at collector-base heterojunction.     

Neutral base recombination and its influence on the temperaturedependence of Early voltage and current gain-Early voltage product inUHV/CVD SiGe heterojunction bipolar transistors

We present the first comprehensive investigation of neutral base recombination (NBR) in ultra-high vacuum/chemical vapor deposited (UHV/CVD) SiGe heterojunction bipolar transistors (HBT's), and its influence on the temperature characteristics of Early voltage (V_A ) and current gain-Early voltage product (βV_A). We show that a direct consequence of NBR in SiGe HBT's is the degradation of V_A when transistors are operated with constant-current input (forced-I_B) as opposed to a constant-voltage input (forced-V_BE). In addition, experimental and theoretical evidence indicates that with cooling, V_A in SiGe HBT's degrades faster than in Si bipolar junction transistors (BJT's) for forced-I_B mode of operation. Under the forced-V_BE mode of operation, however, SiGe HBT's exhibit a thermally-activated behavior for both V_A and βV_A, in agreement with the first-order theory. The differences in V_A as a function of the input bias and temperature for SiGe HBT's are accurately modeled using a modified version of SPICE. The performance of various practical SiGe HBT circuits as a function of temperature, in the presence of NBR, is analyzed using this calibrated SPICE model     

Self-aligned SiGe-base heterojunction bipolar transistor byselective epitaxy emitter window (SEEW) technology

In the device a SiGe epitaxial base is integrated in a structure which uses in situ doped epitaxial lateral overgrowth for the formation of the emitter window and the extrinsic base contact. Nearly ideal I -V characteristics have been achieved for a base width of 60 nm with an intrinsic base resistance of 4.6 kΩ/□ and for emitter widths down to 0.4 μm. A DC collector current enhancement factor of 3.1 was obtained relative to a Si homojunction transistor with a 1.25 times higher intrinsic base resistance. The breakdown voltage BV_CBO is identical for both Si and SiGe devices, even though the collector-base depletion region is partly overlapped with the reduced-bandgap SiGe strained layer. The lower BV_CEO, measured for the SiGe-base transistor, is due to the higher current gain. Based on these results the fabrication of high-speed bipolar circuits that take advantage of SiGe-base bandgap engineering seems possible using selective epitaxy emitter window (SEEW) technology     

On the profile design and optimization of epitaxial Si- andSiGe-base bipolar technology for 77 K applications. I. Transistor DCdesign considerations

The DC design considerations associated with optimizing epitaxial Si- and SiGe-base bipolar transistors for the 77-K environment are examined in detail. Transistors and circuits were fabricated using four different vertical profiles, three with a graded-bandgap SiGe base, and one with a Si base for comparison. All four epitaxial-base profiles yield transistors with DC properties suitable for high-speed logic applications in the 77-K environment. The differences between the low-temperature DC characteristics of Si and SiGe transistors are highlighted both theoretically and experimentally. A performance tradeoff associated with the use of an intrinsic spacer layer to reduce parasitic leakage at low temperatures and the consequent base resistance degradation due to enhanced carrier freeze-out is identified. Evidence that a collector-base heterojunction barrier effect severely degrades the current drive and transconductance of SiGe-base transistors operating at low temperatures is provided     

Degradation of InGaAs/InP double heterojunction bipolar transistorsunder electron irradiation

The dc characteristics of InGaAs/InP double heterojunction bipolar transistors (DHBTs) are studied under high-energy (~1 MeV) electron irradiation up to a fluence of 14.8×10¹⁵ electrons/cm ². The devices show an increase in common-emitter current gain (h_fe) at low levels of dose (<10¹⁵ electrons/cm²) and a gradual decrease in h_fe and an increase in output conductance for higher doses. The decrease in h _fe is as much as ~80% at low base currents (~10 μA) after a cumulative dose of 14.8×10¹⁵ electrons/cm². The observed degradation effects in collector current-voltage (I-V) characteristics are studied quantitatively using a simple SPICE-like device model. The overall decrease in h_fe is attributed to increased recombination in the emitter-base junction region caused by radiation-induced defects. The defects introduced in the collector-base junction region are believed to be responsible for the observed increase in the output conductance     

Measurement of low-frequency base and collector current noise andcoherence in SiGe heterojunction bipolar transistors usingtransimpedance amplifiers

Transimpedance amplifiers have been used for direct study of current noise in silicon germanium (SiGe) heterojunction bipolar transistors (HBT's) at different biasing conditions. This has facilitated a wider range of resistances in the measurement circuit around the transistor than is possible when using a voltage amplifier for the same kind of measurements. The ac current amplification factor h _fe and the sum of the base and emitter series resistances (r _b+r_e) have been extracted from the noise. It has been established that the dominant noise source is situated in the base emitter junction at the emitter side and is not related to contact resistance noise. The simultaneous measurement of both the base-lead noise and the collector-lead noise and the calculation of the coherence between the signals has facilitated the pinpointing of the dominant noise source in the device and the extraction of (r_b+r_e )     

Effect of reverse base current on bipolar and BiCMOS circuits

A detailed study on the effect of reverse base current (RBC) on the switching behavior of bipolar BiCMOS circuits utilizing advanced high-performance bipolar transistors is presented. It is shown that as the collector doping N_c is increased to overcome the Kirk effect (base stretching) during the switching transient, the avalanche-generated reverse base current in the collector-base junction may cause problems for bipolar output devices switching out of saturation. A basic bipolar inverter and various BiCMOS driver circuits were simulated based on measured avalanche multiplication factors from advanced bipolar transistors with various collector doping N _c. In the case of the basic bipolar inverter, the reverse base current may prevent the switching device from being shut off completely during the on-to-off transition and a self-sustained state may result which reduces the output voltage swing. For the common-emitter (CE) BiCMOS driver, a similar self-sustained state may also occur with the added adverse effect of excessive leakage in standby. Design and scaling considerations are discussed     

75-GHz fT SiGe-base heterojunction bipolartransistors

The fabrication of silicon heterojunction bipolar transistors which have a record unity-current-gain cutoff frequency (f_T) of 75 GHz for a collector-base bias of 1 V, an intrinsic base sheet resistance (R_bi) of 17 kΩ/□, and an emitter width of 0.9 μm is discussed. This performance level, which represents an increase by almost a factor of 2 in the speed of a Si bipolar transistor, was achieved in a poly-emitter bipolar process by using SiGe for the base material. The germanium was graded in the 45-nm base to create a drift field of approximately 20 kV/cm, resulting in an intrinsic transit time of only 1.9 ps     

Graded-SiGe-base, poly-emitter heterojunction bipolar transistors

Si/Si_1-xGe_x heterojunction bipolar transistors (HBTs) fabricated using a low-temperature epitaxial technique to form the SiGe graded-bandgap base layer are discussed. These devices were fabricated on patterned substrates and subjected to annealing cycles used in advanced bipolar processing. These devices, which have base widths under 75 mm, were found to have excellent junction qualities. Due to the small bandgap of SiGe, the collector current at low bias is ten times higher than that for Si-base devices that have a pinched base resistance. This collector current ratio increases to more than 40 at LN₂ temperature resulting in current gains of 1600 for the SiGe-base transistors despite base sheet resistances as low as 7.5 kΩ/□     

The relevance of fT and fmax for the speed ofa bipolar CE amplifier stage

Expressions relating the bandwidth of a common-emitter (CE) amplifier stage and the small-signal CML gate delay time to directly measurable transistor parameters, such as f_T, f_max, and input bandwidth f_υ, are presented. They are valid for an arbitrary division of the base resistance and base-collector depletion capacitance into internal and external components. No resistance measurements are needed. It is shown that the transistor input bandwidth f_υ is an important figure of merit for the speed of a CE stage. Under a given bias condition, f_υ is determined by the base resistance and the cut-off frequency. In most cases the value of the maximum oscillation frequency f_max is only of minor importance. It would therefore be more meaningful to present besides f_T also f_υ instead of f_max as a figure of merit for transistors for high-speed, low-power analog and digital circuits     

A 2.4 Gb/s receiver and a 1:16 demultiplexer in one chip using asuper self-aligned selectively grown SiGe base (SSSB) bipolar transistor

This paper reports a 2.4 Gb/s optical terminal IC that integrates high-speed analog and digital circuits for future optical networks using 60-GHz f_T self-aligned silicon-germanium (SiGe)-alloy base bipolar transistors. The selective epitaxial growth (SEG) SiGe base was formed by using cold-wall ultra-high vacuum (UHV)/CVD technology. Boron concentration reduction at the SiGe epitaxial layer/Si-substrate interface by using a new treatment prior to SEG leads to electrical characteristics with less dependence on bias voltage. The IC consists of a receiver (a preamplifier, an automatic gain control (AGC) amplifier, a phase-locked loop (PLL), and a D-type flip-flop (D-F/F)), and a 1:16 demultiplexer (DMUX). An input offset control circuit is included in the AGC amplifier for wide dynamic range. Trench isolation and silicon-on-insulator (SOI) technologies are introduced to reduce crosstalk between the amplifiers and the PLL. Power consumptions are 0.6 W at -5.2 V for the analog part and 0.45 W at -3.3 V for the digital part, which does not include the ECL output buffers     

A 0.2-μm 180-GHz-fmax 6.7-ps-ECL SOI/HRS self-alignedSEG SiGe HBT/CMOS technology for microwave and high-speed digitalapplications

A technology for combining 0.2-μm self-aligned selective-epitaxial-growth (SEG) SiGe heterojunction bipolar transistors (HBTs) with CMOS transistors and high-quality passive elements has been developed for use in microwave wireless and optical communication systems. The technology has been applied to fabricate devices on a 200-mm SOI wafer based on a high-resistivity substrate (SOI/HRS). The fabrication process is almost completely compatible with the existing 0.2-μm bipolar-CMOS process because of the essential similarity of the two processes. SiGe HBTs with shallow-trench isolations (STIs) and deep-trench isolations (DTIs) and Ti-salicide electrodes exhibited high-frequency and high-speed capabilities with an f_max of 180 GHz and an ECL-gate delay of 6.7 ps, along with good controllability and reliability and high yield. A high-breakdown-voltage HBT that could produce large output swings for the interface circuit was successfully added. CMOS devices (with gate lengths of 0.25 μm for nMOS and 0.3 μm for pMOS) exhibited excellent subthreshold slopes. Poly-Si resistors with a quasi-layer-by-layer structure had a low temperature coefficient. Varactors were constructed from the collector-base junctions of the SiGe HBTs. MIM capacitors were formed between the first and second metal layers by using plasma SiO₂ as an insulator. High-Q octagonal spiral inductors were fabricated by using a 3-μm thick fourth metal layer     

The influence of BF2 and F implants on the 1/f noise inSiGe HBTs with a self-aligned link base

A study is made of 1/f noise in SiGe heterojunction bipolar transistors (HBTs) fabricated using selective growth (SEG) of the Si collector and nonselective growth (NSEG) of the SiGe base and Si emitter cap. The transistors incorporate a self-aligned link base formed by BF ₂ implantation into the field oxide below the p⁺ polysilicon extrinsic base. The influence of this BF₂ implant on the 1/f noise is compared with that of a F implant into the polysilicon emitter. Increased base current noise S_IB and base current are seen in transistors annealed at 975°C, compared with transistors annealed at 950 or 900°C. At a constant collector current, both the BF₂ and F implants reduce S_IB, whereas at a constant base current, only the BF₂ implant reduces S_IB. This result indicates that the BF₂ implant decreases the intensity of the base current noise source whereas the F implant decreases the base current. The proposed explanation for the increased 1/f noise is degradation of the surface oxide by viscous flow at 975°C under the influence of stress introduced during selective Si epitaxy. The influence of the BF₂ implant on the noise is explained by the relief of the stress and hence the prevention of viscous oxide flow     

基区复合电流对双极晶体管厄利电压的影响

推导了在考虑了基区复合电流后双极晶体管厄利电压的理论表达式。用该表达式计算了 Si/Si Ge异质结双极晶体管的厄利电压 ,并且与仿真结果进行了比较。比较结果表明 ,两种情况下计算出的厄利电压值符合良好     

Analyses and design of bias circuits tolerating output voltages above BV/sub CEO/

Due to the inevitable tradeoff between speed and breakdown voltage, the spectacular speed improvement of modern SiGe processes in recent history has partially been achieved at the cost of a reduction in breakdown voltages. Because supply voltages have hardly been reduced however, circuits operating at a supply voltage above the collector-emitter breakdown voltage (BV/sub CEO/) are common practice today and collector-base avalanche currents are therefore of major concern. Transistors that need to handle a collector-emitter voltage above (BV/sub CEO/) are typically found as output transistors in output driver stages and in bias current circuits. Such circuits can be designed to tolerate collector-emitter voltages above (BV/sub CEO/) by driving the base terminal with a relatively low impedance. This paper analyzes various conventional as well as two new bias current circuits supporting operation at collector voltages above (BV/sub CEO/). In the new circuits, feedforward and feedback avalanche current compensation techniques are introduced that obtain a substantial increase in output breakdown voltage of the bias circuits and improve the accuracy of the current mirror at output voltages above (BV/sub CEO/). With the feedback technique, a measured increase in output breakdown voltage by more than 2 V is demonstrated while the accuracy of the current mirror ratio at output voltages of 2 to 3 times (BV/sub CEO/) is improved by an order of magnitude.     

Output conductance of bipolar transistors with large neutral-baserecombination current

Neutral base recombination current, which is negligible in most modern bipolar transistors, can affect the common-emitter output conductance quite dramatically if it dominates other sources of base current. Mathematical theory for this phenomenon is developed, applied to some simplified special cases, and compared with numerical simulation. The large output conductance of some real Si/Si_1-xGe_x DHBTs is seen to be the result of a large neutral base recombination current     

High-performance SiGe epitaxial base bipolar transistors producedby a reduced-pressure CVD reactor

High-performance Si and SiGe epitaxial base bipolar transistors have been fabricated using a commercially available, reduced pressure, epitaxial reactor. The SiGe devices exhibit exceptional Early voltages in the range of 400-500 V, and an f_T of 31 GHz with a BV_CEO of 7.6 V and BV_CBO of 16 V. These results demonstrate that SiGe has potential as a commercially viable technology for analog, digital, and mixed-signal applications