Influence of Interconnection Configuration on Thermal Dissipation of ULSI Interconnect Systems

应用一个三层互连布线结构研究了诸多因素尤其是布线的几何构造对互连系统散热问题的影响,并对多种不同金属与介质相结合的互连布线的散热情况进行了详细模拟.研究表明互连线上焦耳热的主要散热途径为金属层内的金属线和介质层中热阻相对小的路径.因此互连系统的几何布线对系统散热具有重要影响.在相同条件下,铝布线系统的温升约为铜布线的ρAl/ρCu倍.此外,模拟了0.13μm工艺互连结构中连接功能块区域的信号线上的温升情况,探讨了几种用于改善热问题的散热金属条对互连布线的导热和附加电容的影响.     

ULSI互连系统热特性的模拟

应用基于有限元算法的软件 ANSYS对 0 .15 μm工艺条件下的一个 U L SI电路的五层金属互连结构进行了热特性模拟和分析 .模拟了这个经多目标电特性优化了的互连结构在采用不同金属 (Cu或 Al)互连线及不同电介质 (Si O2 或低介电常数材料 xerogel)填充条件下的热分布情况 ,计算了这些条件下此互连结构的温度分布 .并将结果与 Stanford大学模拟的另一种五层金属布线结构的热特性结果进行了比较 .讨论了低介电常数材料的采用对于互连结构散热情况的影响 .此外 ,还简要地介绍了 ANSYS的性能和用于热模拟的原理和特色     

ULSI互连系统热特性的模拟

应用基于有限元算法的软件ANSYS对0.15μm工艺条件下的一个ULSI电路的五层金属互连结构进行了热特性模拟和分析．模拟了这个经多目标电特性优化了的互连结构在采用不同金属(Cu或Al)互连线及不同电介质(SiO2或低介电常数材料xerogel)填充条件下的热分布情况,计算了这些条件下此互连结构的温度分布．并将结果与Stanford大学模拟的另一种五层金属布线结构的热特性结果进行了比较．讨论了低介电常数材料的采用对于互连结构散热情况的影响．此外,还简要地介绍了ANSYS的性能和用于热模拟的原理和特色．     

基于45 nm技术的ULSI互连结构的温度模拟

应用自行建立的准二维简化模型，计算了三种基于45nm节点技术的ULSI九层低介电常数介质互连结构的温度升高。与ANSYS的分析对比表明，简化模型误差为7．7％。三种互连结构中，结构Ⅲ设计具有最佳的散热能力，不仅工作时绝对温升小，而且随衬底温度和介质导热系数的温升加大也小；结构Ⅰ的散热能力良好，结构Ⅲ最差。对三种互连结构的尺寸分析表明，层间介质的厚度对互连系统的温升影响大，必须在电学模拟和温度模拟完成后找到一个最佳厚度值，以保证既有好的散热条件，又有利于减小RC延迟。互连结构的温升随电介质导热系数的减小呈二阶指数升高，特别当介质导热系数小于0．1W／℃·m时，互连结构设计将会成为器件温升和系统可靠性的关键所在，引入新技术或许势在必行。     

以BCB为介质层的圆片级三维多芯片封装结构研究

研究了一种新型的圆片级三维多芯片封装结构,该结构以BCB为介质层,体硅工艺加工的硅片为基板,适合于毫米波射频元器件的封装与应用。结构中包含多层BCB介质层和金属布线,同时可以集成射频芯片,薄膜电阻,可变电容等有源和无源元件。封装过程中,射频芯片埋置在接地金属化的硅腔体中,利用热压焊凸点技术和化学机械抛光（CMP）实现多成金属布线间的层间互连。BCB介质层的涂覆、固化和抛磨对封装结构的性能影响较大,为了在进行CMP工艺和多层布线工艺之前得到高质量的BCB介质层,对BCB的固化曲线进行了优化,改进后的BCB介质层在经过CMP工艺后,能够得到光滑可靠的抛磨表面,不易产生质量缺陷,表粗糙度能够控制在10nm以内,利于BCB表面的金属布线工艺。同时,对加工完成的封装结构的力学、热学和射频传输性能进行了测试,结果显示：互连金凸点的剪切力达到70 N/mm2,优化后封装结构的热阻可以控制在2℃/W以内,在工作频段内,测试用低噪放大器的S参数变化很小,插入损耗的变化小于1db,回波损耗在10~15GHz的范围内,低于-8db,满足设计要求。     

适用于0.8μmCMOS VLSI的双层金属布线技术研究

多层金属有线互连技术是VLSI工艺中最重要和关键的技术之一．本文系统地研究了用效0．8μmCMOSVLSI的双层金属布线工艺技术，特别是对双层金属布线层间介质的平坦化、接触孔和通孔的低阻欧姆接触及可靠的金属互连等关键工艺进行了分析讨论．这套技术已成功地应用放“0．8μm双层金属布线CMOS计算机主板时钟产生器专用集成电路”的研制，并获得较好芯片成品率．     

制备Cu互连悬空结构的新型工艺研究

为了降低集成电路中的互连延迟,采取了一种新型的集成电路Cu互连工艺,以掩膜电镀的方法制备Cu互连的叠层结构,借鉴MEMS工艺的牺牲层技术,用浓磷酸对Al2O3牺牲层进行湿法刻蚀,不仅在互连金属间介质层而且在层内介质层都形成了以空气为介质的Cu互连悬空结构.用一种叉指测试结构对以空气和聚酰亚胺为介质的互连性能进行了比较,结果表明,采用空气介质减小了互连线耦合电容,为进一步降低集成电路的互连延迟提供了途径.     

一种低成本的硅垂直互连技术

采用KOH刻蚀工艺制作硅垂直互连用通孔,淀积SiO2作为硅垂直互连的电绝缘层,溅射Ti和Cu分别作为Cu互连线的黏附层/扩散阻挡层和电镀种子层.电镀10μm厚的Cu作为硅垂直互连的导电层.为实现金属布线的图形化,在已有垂直互连的硅片上试验了干膜光刻工艺.采用化学镀工艺,在Cu互连线上沉积150～200 nm厚的NiMoP薄膜作为防止Cu腐蚀和Cu向其上层介质扩散的覆盖层.高温退火验证了Ti阻挡层和NiMoP覆盖层的可靠性.     

Cu互连应力迁移失效有限元分析

为研究铜互连系统中各因素对残余应力及应力迁移失效的影响,建立了三维有限元模型,用ANSYs软件分析计算了Cu互连系统中的残余应力分布情况,并对比分析了不同结构、位置及层间介质材料的互连系统中的残余应力及应力梯度.残余应力在金属线中通孔正下方M2互连顶端最小,在通孔内部达到极大值,应力梯度在Cu M2互连顶端通孔拐角底部位置达到极大值.双通孔结构相对单通孔结构应力分布更为均匀,应力梯度更小.结果表明,空洞最易形成位置由应力和应力梯度的大小共同决定,应力极大值随通孔直径和层间介质介电常数的减小而下降,随线宽和重叠区面积的减小而上升.应力梯度随通孔直径、层间介质介电常数和重叠区面积的减小而下降,随线宽减小而上升.     

用于无线互连的片上天线金属干扰分析与设计规则

定性分析了金属互连线、电源网格、散热与封装以及金属Dummy Fills对2 mm长、30 μm宽的片上偶极天线对工作特性的影响.通过在硅衬底和散热金属之间引入0.35 mm厚的金刚石介质材料使天线的传输增益在20 GHz时提高了9 dB.为研究这些金属结构和布局对集成偶极天线对的传输增益、相位、阻抗及辐射特性带来的干...     

Thermal modeling of localized laser heating in multi-level interconnects

Thermal modeling was used to simulate thermal profiles from localized laser heating on two multi-level interconnect structures with metallization complexity comparable to those used in advanced interconnect systems. The modeling focused on addressing issues with regard to the effectiveness of laser-based techniques in defect localization in state-of-the-art metallization schemes. Modeling results indicate that indirect heating from the laser does not propagate effectively through adjacent metal layers from both the front side and the back side. Poor heat conduction and its associated thermal spreading during laser heating make defect detection difficult beyond three levels of metal. Thermal distribution and spreading were found to be more affected by interconnect geometries than by variations in laser spot size. Smaller temperature rises during laser heating were observed in the newer interconnect structures consisting of copper and low-k dielectric materials than in those with conventional aluminum, tungsten, and silicon dioxide. The smaller temperature rise leads to weaker signal strength at the defect sites and makes it more difficult to detect defects in the newer-material structures. Metallization density also affects heat conduction in advanced interconnect systems but the temperature rise during laser heating varies slowly as a function of metallization density.     

铜互连结构热应力分析及介电材料选择优化

基于Ansys有限元软件,采用三级子模型技术对多层铜互连结构芯片进行了三维建模.研究了 10层铜互连结构总体互连线介电材料的弹性模量和热膨胀系数对铜互连结构热应力的影响,在此基础上对总体互连线介电材料的选择进行优化.结果表明,总体互连线介电材料的热膨胀系数对铜互连结构的热应力影响较小,而弹性模量对其影响较大;各层介电材...     

Electromigration and integration aspects for the copper-SiLK system

In this study, the thermal characteristics and electromigration (EM) resistance of two dielectrics, SiLK™ and SiO₂, are investigated to evaluate the feasibility of low dielectric-constant SiLK for intermetal dielectric applications. Liftoff patterning was employed to fabricate the Cu interconnect for the EM test, and the Taguchi method was used in the experimental design to identify the key parameters for a successful liftoff. It was shown that the thermal impedance of the metal lines passivated with SiLK is 14% higher than that of metal lines passivated with SiO₂. On the basis of the thermal impedance and temperature rise of the interconnect, it was concluded that the major heat transfer path is via the underlayer dielectric to the Si substrate. The activation energy of EM for Cu passivated with SiLK is smaller, and the EM lifetime is shorter than that of Cu passivated with SiO₂. Possible mechanisms are discussed.     

Thermal Stability Improvement of Vertical Conducting Green Resonant-Cavity Light-Emitting Diodes on Copper Substrates

Green light vertical-conducting resonant-cavity light-emitting diodes (RCLEDs) have been fabricated on a Cu substrate by the combination of laser lift-off and plating techniques. The structure of the RCLED/Cu is consisted of the InGaN-GaN multiple-quantum-well active layer between three layers of the dielectric TiO-SiO distributed Bragg reflector as a top mirror and an Al metal layer as a bottom mirror. It was found that the RCLED with Cu substrate presents superior thermal dissipation and a stable electroluminescence emission peak wavelength (507 nm) under a high injection current. It is attributed to the Cu substrate providing a good heat sink and effectively reducing the junction temperature.     

Analysis of thermal stresses in metal interconnects with multilevel structures

The evolution of thermal stresses in aluminum interconnects was analyzed numerically. Particular attention was devoted to the effects of multilevel arrangement, which have been largely ignored in past studies. Two-dimensional models based on long metal lines with different aspect ratios and cross-sectional arrangements were employed. The metallization, taken to include thin refractory layers sandwiching the aluminum conductor, was embedded within silicon oxide dielectric on top of the silicon substrate. A thermal cooling process was simulated by recourse to the finite element method. It was found that the incorporation of refractory layers increases the stress in aluminum lines. The line aspect ratio, rather than the multilevel nature, plays the most important role in affecting the thermal stress. Issues related to interconnect stress modeling and reliability implications are discussed.     

Reliability computer-aided design tool for full-chip electromigration analysis and comparison with different interconnect metallizations

We have developed a set of methodologies for thermal aware circuit-level reliability analysis with either Al or Cu metallization in a circuit layout and implemented it in a public domain reliability CAD tool, SysRel. SysRel utilizes a hierarchical reliability analysis flow, with interconnect trees treated as the fundamental reliability unit, that sufficiently captures the differences in electromigration failure between Al and Cu metallizations. Under similar test conditions, the electromigration reliability of Al and Cu interconnect trees demonstrates significant differences because of the differences in interconnect architectural schemes. Using the best estimates of material parameters and an analytical model, we present a detail comparison of electromigration reliability of a sample test-structure as well as of actual circuit layouts with Al and Cu dual-damascene interconnect systems. We also demonstrate fast thermal-analysis in SysRel for circuit performance driven chip-level reliability assessment.     

Interconnect scaling scenario using a chip level interconnect model

This paper describes an interconnect scaling scenario, which considers the impact of metal aspect ratio and pitch at each layer, new interconnect materials, and improved circuit design techniques. A new design methodology for a multilevel interconnect scheme is proposed on the basis of a chip level interconnect model. The design rule, the number of metal layers, and selection of interconnect materials at each device generation are projected using this methodology. It is shown that the 0.13-μm CMOS generation requires not only new interconnect materials but also improved circuit design techniques such as variable pitch router and insertion of repeater buffers. A high-performance LSI in the 0.13-μm CMOS generation needs seven layers using Cu interconnect and low-k dielectrics     

Comparison of WTi and WTi(N) as diffusion barriers for Al and Cu metallization on Si with respect to thermal stability and diffusion behavior of Ti

The thermal stability of WTi and WTi(N) as diffusion barriers for Al and Cu metallization on Si (1 0 0) was investigated by time of flight secondary ion mass spectrometry (ToF-SIMS) depth profiling, X-ray diffraction (XRD), electron microscopy (SEM and TEM) and X-ray photoelectron spectroscopy (XPS). For both, Al and Cu, Ti diffusion out of WTi into the metal was proved to occur at elevated temperatures (400 °C for Al and 600 °C for Cu) which further results in barrier film failure. Nitrogen incorporation into WTi leads to an elimination of the Ti diffusion and consequently to a better thermal stability of the barrier film. It is shown that besides crystal structure, Ti diffusion into the metallization is an essential factor of the barrier failure mechanism. The failure temperature for Al is lower than for Cu.     

Thermal parameters identification of micrometric layers of microelectronic devices by thermoreflectance microscopy

The objective of this paper is the determination of the thermal properties of micrometric layers of electronic devices using a thermoreflectance probe. Unlike classical thermoreflectance methods, the main point of the method presented in this paper is to be able to quantify the heating energy (by Joule effect) and the effective temperature response (by calibration). It is then possible to estimate the thermal conductivity (in W m⁻¹ K⁻¹) instead of the thermal diffusivity (in m² s⁻¹). A semi-analytical thermal 3D-periodic model then enables to identify a few thermal properties of the layers of the device, and in particular the thermal conductivity of the passivation layer. This methodology has been applied to the study of an industrial device containing interconnect test structures made of copper lines on a silicon wafer with a few micrometers BCB (BenzoCycloButene) polymer passivation layer. The BCB thermal conductivity and the metal heat capacity are obtained using this method.     

Optical and thermal properties of large-area OLED lightings with metallic grids

We investigate the effects of auxiliary metal electrodes on the optical and thermal properties of large-area (30 × 120 mm²) opaque and transparent white OLED lighting panels. Enlarging their emission area inevitably entails a non-uniform current distribution due to the limiting conductivity of transparent electrodes, causing local heat generation. To tackle it, we have used grid patterned Cr, Mo/Al/Mo, or Cu metal lines (0.15 mm in width) as auxiliary metal electrodes on an ITO anode. Among those, Cu metal grids exhibit the highest luminous efficacy with the least heat generation, and the most uniform light distribution by virtue of its lowest sheet resistance, followed by Mo/Al/Mo and then Cr metal grids. It is also found that local heat generation appears more seriously in large-area transparent OLED panels. With attempt to suppress it, we have also deposited Al metal lines (2 mm in width) on a semitransparent Al/Ag cathode by thermal evaporation, which brings in a highly uniform heat distribution. Furthermore, we study the effect of the shape of the light-emitting area on the luminance and heat distributions. A round-shaped OLED panel with a hexagonal metal grid exhibits highly homogeneous luminance and surface temperature distributions.