共查询到19条相似文献,搜索用时 46 毫秒
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制备场效应晶体管的石墨烯主要分三种类型:大面积单层石墨烯、石墨烯纳米带和双层石墨烯片。文中介绍了这三类石墨烯场效应晶体管器件的研究进展和标志性成果,探讨了石墨烯对于场效应晶体管的影响。研究认为:与大面积单层石墨烯晶体管相比,由石墨烯纳米带制得的石墨烯场效应晶体管的开关比和电流密度等性能能够大幅度提升,可应用于逻辑电路;与大面积单层石墨烯和石墨烯纳米带相比,双层石墨烯晶体管具有更高的开关比,因此其实际应用的潜力最大。 相似文献
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使用超声分散CVD法合成的商用单壁碳纳米管(SWCNT),利用匀胶机把分散获得的、含有SWCNT的悬浮液均匀旋涂于SiO2/Si基上,利用萌罩式电子束蒸发技术在碳纳米管随机网络薄膜表面制备漏源Au电极。该制备技术避免了碳纳米管器件更多的化学接触,有效确保碳纳米管的纯度。该碳纳米管场效应晶体管器件采用重掺杂Si作为背栅、SWCNT随机网络薄膜为导电沟道。在室温环境下利用Keithley-4200对器件性能进行了测试分析,器件开启电流约为1μA,峰值跨导为326nS。该方法制备的SWCNT随机网络场效应晶体管,具有工艺实现简单、器件性能稳定、重复性和一致性好等特点,并可以用于构建CNT逻辑电路。该技术对于研究低成本、大规模基于CNT的集成电路来说,具有较高的借鉴价值。 相似文献
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利用电子束蒸发技术在Si衬底形成Au电极作为底栅电极,在底栅电极上生长SiO2薄膜。超声分散CVD法合成的商用单壁碳纳米管(SWCNTs),使用匀胶机将单壁碳纳米管悬浮液均匀旋涂于SiO2薄膜上。再利用荫罩式电子束蒸发技术,在单壁碳纳米管随机网络薄膜表面制备漏源电极。该工艺过程避免了碳纳米管过多的化学接触,有效地保护了碳纳米管的性状。在室温条件下对器件电学性能进行测试和分析。使用该方法制备的单壁碳纳米管随机网络薄膜场效应晶体管,具有器件性能稳定、重复性和一致性较好等优点,并可用于构建碳纳米管逻辑电路。该方法对于研究基于碳纳米管的大规模、低成本的集成电路,具有较高的借鉴价值。 相似文献
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综述了碳纳米管场效应晶体管(CNTFET)的主要结构和导电沟道的制备工艺,如AFM探针操控、CVD原位生长、交流介电泳和L-B大面积操控排布等方法。在对CNTFET的这些结构和制备工艺进行详细分析的基础上,着重指出目前CNTFET导电沟道制备中存在的诸如金属性单壁碳纳米管(SWCNT)的烧除、接触电阻大、滞后现象以及P型CNTFET转化等问题,并针对这些问题提出了具体可行的解决方案。 相似文献
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包含新技术、新材料的新型器件的不断涌现,使现有的传统器件模型已不能完全表征石墨烯场效应晶体管(GFET)的特性。提出了一种基于经验公式的非线性模型来表征GFET的特性,该模型对传统经验模型的公式和拓扑结构进行了改进,使其能更好地表征GFET的特性。该模型包含了GFET的栅源电流模型、源漏电流模型、电容模型和低频散射效应等。此外该模型为可定标的模型,可用于一定尺寸范围的器件的仿真。该模型可集成在仿真软件中进行石墨烯电路的设计,其直流I-V特性和多偏置S参数的仿真结果与测试结果吻合较好,验证了该模型的有效性。 相似文献
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由于具有独特的一维纳米结构、稳定的化学特性和优异的电学性能,单壁碳纳米管被认为是制作高性能电子器件以及下一代纳米电路的理想材料,作为新型基础电子元件的一种,碳纳米管场效应晶体管一直是研究的热点。研究了一种基于非对称肖特基接触的碳纳米管场效应晶体管,金属钯与金属铝分别作为电极材料制作出的碳纳米管场效应晶体管分别表现出p型和n型的导通特性,当这两种金属分别作为源、漏电极制作在单根半导体性单壁碳纳米管的两端时,便构成了非对称肖特基接触结构碳纳米管场效应晶体管。器件表现出了优良的整流特性,整流比达到103,在栅压的调控下,正向电流的开关比接近103。 相似文献
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建立了单栅石墨烯场效应晶体管处于栅氧化层界面平整时的电流模型,在此基础上分析氧化层界面粗糙度对源漏电流的影响.研究表明:粗糙界面会导致源漏电流有所下降;且粗糙度越大,源漏电流下降越多. 相似文献
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《电子材料与电子技术》2006,33(1):9
在国家自然科学基金委、科技部、中科院的大力支持下,化学所有机固体院重点实验室等在基于碳纳米管的场效应晶体管研究领域取得新进展。基于碳纳米管的电子器件是纳米电子学的热点研究课题之一,具有重要的科学意义和应用前景。场效应晶体管是利用改变电场来控制固体材料导电能力的有源器件,是微电子学中最重要的单元器件之一。 相似文献
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提出了一种新型自对准石墨烯场效应晶体管(graphere field-effect transistor,GFET)制备工艺,该工艺可与现有Si CMOS工艺相兼容。利用该工艺制备的自对准栅GFET器件可以消除传统GFET器件制备过程中存在的栅极与漏极和源极覆盖区的寄生电容或栅极与源极和漏极暴露区的寄生电阻,使器件直流特性得到了很大改善。对制作的样品进行直流I-V特性测试时,清楚地观测到了双极型导电特性。制作的沟道长度为1μm的自对准GFET器件样品最大跨导gm为2.4μS/μm,提取的电子与空穴的本征场效应迁移率μeeff和μheff分别为6 924和7 035 cm2/(V·s),顶栅电压VTG为±30 V时,器件的开关电流比Ion/Ioff约为50,远大于目前已报道的最大GFET开关电流比。 相似文献
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Arash Hazeghi Tejas Krishnamohan H.-S. Philip Wong 《Electron Devices, IEEE Transactions on》2007,54(3):439-445
The theoretical performance of carbon nanotube field-effect transistors (CNFETs) with Schottky barriers (SBs) is examined by means of a general ballistic model. A novel approach is used to treat the SBs at the metal-nanotube contacts as mesoscopic scatterers by modifying the distribution functions for carriers in the channel. Noticeable current reduction is observed compared to previous ballistic models without SBs. Evanescent-mode analysis is used to derive a scale length and the potential profile near the contacts for radially symmetric CNFET structures. Band-to-band tunneling current and ambipolar conduction are also treated. The effects of different device geometries and different nanotube chiralities on the drain-current are studied using this simple model. Quantum conductance degradation due to SBs is also observed 相似文献
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Zhihong Chen Farmer D. Sheng Xu Gordon R. Avouris P. Appenzeller J. 《Electron Device Letters, IEEE》2008,29(2):183-185
In this letter, we demonstrate a gate-all-around single-wall carbon nanotube field-effect transistor. This is the first successful experimental implementation of an off-chip gate and gate-dielectric assembly with subsequent deposition on a suitable substrate. The fabrication process and device measurements are discussed in the letter. We also argue in how far charges in the gate oxide are responsible for the observed nonideal device performance. 相似文献
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A noniterative physics-based compact model is developed for carbon nanotube (CNT) transistor and interconnect in order to support early stage design exploration. Based on the derivation of surface potential, the new model accurately predicts both I-V and C-V characteristics. It is scalable to key process and design parameters, such as the diameter, chirality, contact materials, gate dielectrics, and bias voltages. Without any iteration in model computation, the proposed model significantly enhances the simulation efficiency for large-scale design research. By benchmarking circuit performance, the optimal space of the CNT process is further localized. It is observed that for a Schottky-barrier CNT transistor with the diameter range of 1-1.5 nm, the circuit can be more than 8× faster than that of 22-nm CMOS, with the tolerance to the variation in contact materials. 相似文献
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This paper presents a simple mathematical model for the output-voltage (current)/ input-voltage characteristic of the carbon
nanotube field effect transistor (CNTFET) complementary inverting amplifier and the metallic carbon nanotube (MCNT) interconnect.
The model, basically a Fourier series, yields closed-form expressions for the amplitudes of the harmonic and intermodulation
components of the output voltage (current) resulting from a multisinusoidal input voltage. The special case of a two-tone
equal-amplitude input voltage is considered in detail. The results show that the harmonic and intermodulation performance
of the complementary CNTFET-based inverting amplifier and the MCNT interconnect is strongly dependent on the values of the
amplitudes of the input tones with the third-order intermodulation component dominating over a wide range of the input voltage
amplitudes. The results also show that while the harmonics may exhibit minima, the intermodulation products are almost monotonically
increasing with the increase in the input voltage amplitude and exhibit no minima. 相似文献
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Christophe Caillier Anthony Ayari Vincent Gouttenoire Jean‐Michel Benoit Vincent Jourdain Matthieu Picher Matthieu Paillet Sylvie Le Floch Stephen T. Purcell Jean‐Louis Sauvajol Alfonso San Miguel 《Advanced functional materials》2010,20(19):3330-3335
A transistor based on an individual multiwalled carbon nanotube is studied under high‐pressure up to 1 GPa. Dramatic effects are observed, such as the lowering of the Schottky barrier at the gold–nanotube contacts, the enhancement of the intertube conductance, including a discontinuity related to a structural transition, and the decrease of the gate hysteresis of the device. 相似文献
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Highly Stretchable Conductors Integrated with a Conductive Carbon Nanotube/Graphene Network and 3D Porous Poly(dimethylsiloxane) 下载免费PDF全文
Mengting Chen Ling Zhang Shasha Duan Shilong Jing Hao Jiang Chunzhong Li 《Advanced functional materials》2014,24(47):7548-7556
Here, a novel and facile method is reported for manufacturing a new stretchable conductive material that integrates a hybrid three dimensional (3D) carbon nanotube (CNT)/reduced graphene oxide (rGO) network with a porous poly(dimethylsiloxane) (p‐PDMS) elastomer (pPCG). This reciprocal architecture not only alleviates the aggregation of carbon nanofillers but also significantly improves the conductivity of pPCG under large strains. Consequently, the pPCG exhibits high electrical conductivity with a low nanofiller loading (27 S m?1 with 2 wt% CNTs/graphene) and a notable retention capability after bending and stretching. The simulation of the mechanical properties of the p‐PDMS model demonstrates that an extremely large applied strain (εappl) can be accommodated through local rotations and bending of cell walls. Thus, after a slight decrease, the conductivity of pPCG can continue to remain constant even as the strain increases to 50%. In general, this architecture of pPCG with a combination of a porous polymer substrate and 3D carbon nanofiller network possesses considerable potential for numerous applications in next‐generation stretchable electronics. 相似文献
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