A 1920(H)×1035(V) pixel high-definition CCD image sensor

A 1920(H)×1035(V)-pixel high-definition CCD (charge-coupled-device) image sensor compatible with an 1125-scanning-lines and 16:9 aspect-ratio television system is described. The device basically uses an interline scheme with a vertical overflow drain. To maintain 74.25-MHz ultrahigh-data-rate operation, the device adopts a dual-channel configuration for the horizontal CCD (H-CCD) register. To accomplish both vertical signal charge transfer in the vertical CCD (V-CCD) register and signal charge distribution from the V-CCD registers into the dual-channel horizontal CCD registers simultaneously within a 3.77-μs short horizontal blanking period, a one-horizontal-period signal storage memory electrode and optical black memory are introduced. Bipolar buffer transistor chips are hybridized in the same package as the device, so as to reduce parasitic capacitance at CCD output terminals and maintain a wide-bandwidth operation. The device operates successfully and 1000-TV-line limiting resolution was obtained for both vertical and horizontal directions. Total random noise was evaluated to be 41 electrons. Dynamic range reached 66 dB. Signal-to-noise ratio for a black/white (B/W) camera was 51.5 dB under F4.0 and 2000-lux illumination conditions     

A CCD image sensor with 768 × 490 pixels

A ⅔-in 768(H) × 490(V) element interline CCD image sensor has been successfully developed. The device adopts a vertical overflow drain principle, a buried,channel amplifier, three-level polysilicon technology, and 1.5-µm-rule fine-pattern process. The device operates with an NTSC format. The 560 TV lines limiting resolution is obtained in the horizontal direction. No significant loss in transfer efficiency is observed in the horizontal register, even at the 14.32 MHz clock rate. Optimal photosensitivity spectrum response is obtained and the peak response appears at 550 nm. The noise equivalent signal is reduced to 48 electrons, using correlated double sampling. Then, the dynamic range reaches 68 dB. The correlated double sampling, combined with buried-channel amplifier technology is found to be also effective for great reduction in horizontal line noise.     

A 2 million pixel FIT-CCD image sensor for HDTV camera systems

A 1-in optical format frame-interline-transfer charge-coupled-device (FIT-CCD) image sensor with 2 million pixels and an aspect ratio of 16(H):9(V) has been developed for HDTV cameras. The effective number of pixels is 1920(H)×1036(V). In order to decrease the smear level, achieve uniform charge handling capability for the vertical CCD, and eliminate defects that appear as vertical stripes in the image of the device, aluminum wire was put onto the vertical transfer gate to decrease the resistance in the transfer gate and a dual-channel two-phase CCD was utilized for the horizontal shift register operated by a 37.125-MHz clock. As a result, this image sensor has a dynamic range of 72 dB and a sensitivity of 75 nA/lx for light with a color temperature of 2856 K. Smear is reduced to -100 dB by using the FIT-CCD image sensor structure. The horizontal limit is 1000 TV lines. In addition, image lag is negligibly small and below the sensitivity of the measurement instrument     

A new organization area image sensor with CCD readout through charge priming transfer

A new organization for an area image sensor with a wide dynamic range is proposed, in which an XY photodiode-MOS switch array is combined with an analog CCD readout shift register through a "charge priming transfer (CPT)" function. It is shown that use of the CPT makes the transfer of small signal charge from large capacitance vertical transport lines to the horizontal CCD strikingly efficient. The operating principle of the new device organization and some preliminary experimental results with a 404(H) × 256(V) element image sensor are reported.     

Design consideration and performance of a new MOS imaging device

The design considerations and performance of a new MOS imaging device with novel random noise suppression (RANS) circuits are described. This device consists of 492 × 388 photodiodes, a vertical shift register, and a horizontal BCD register integrated in p-wells. The RANS circuits accelerate the charge-transfer speed from vertical signal lines to a horizontal BCD register with 98-percent efficiency. They also decrease the effective signal line capacitance, so noise due to the transfer MOS switches is suppressed to obtain a high signal-to-noise ratio of 46 dB at a standard scene illumination of 180 lx (F1.4) with no image lag and blooming. Sweep out operation for the smear charge accumulated in the vertical signal lines realizes a sufficient signal-to-smear ratio of 69 dB at 1/10 vertical scene illumination.     

A high-resolution staggered-configuration CCD imager overlaid with an a-Si:H photoconductive layer

A high resolution "two-level" CCD imager was overlaid with an a-SiC: H (intrinsic)/a-Si: H (intrinsic)/a-SiC:H (p-type) photo-conversion layer. This device has 400 (horizontal:H) × 500 (vertical:V) pixels, in which 385(H) × 490(V) pixels are effective. The image area is 8.8 mm (H) × 6.5 mm (V), which corresponds to ⅔-in optical format. The high-resolution feature has been realized by staggered configuration pixel layout and novel interline transfer CCD scanner, which can read out two horizontal rows simultaneously. A horizontal limiting resolution of 500 TV lines, which is twice the conventional horizontal 400-pixel-number CCD, has been obtained without increasing the pixel packing density.     

An analysis of fixed pattern noise for MOS-CCD type image sensors under quasi-stationary conditions

A theoretical explanation for fixed pattern noise (FPN) is given for the MOS-CCD image sensor with the use of external bias charge. The FPN is ascribed to the fluctuation of the bias charge which is returned from the coupler between the vertical transport line and the horizontal CCD (H-CCD) shift register. It is shown that the FPN is eliminated below -60 dB with respect to the maximum output signal in the case of vertical transfer efficiency of 97% or more.     

A PtSi Schottky-barrier area imager with meander-channel CCD readout registers

This paper describes improvement of the fill factor of Schottky-barrier infrared CCD arrays by using a meander-channel CCD (MCCD) as both the vertical and the horizontal readout registers. A 64 × 64 element monolithic Schottky-barrier infrared meander channel CCD(SB-IRMCCD) with 23 percent fill factor has been fabricated with negligible element to element cross talk. This letter also describes how a fill factor of 57 percent is possible by decreasing the area of the vertical MCCD register to 30 percent of that in the present device.     

A new configuration of CCD imager with a very low smear level—FIT-CCD imager

A new configuration of CCD imager has been developed to improve smearing. This new sensor introduces a storage region, which consists of pairs of vertical BCCD registers, between an interline transfer CCD imaging region and a readout horizontal CCD register. The configuration and operation of the new device (FIT-CCD imaging device) are described, together with the experimental results for 402(H) times 500(V) element imaging devices. The smear level observed is low as ∼0.45 percent at 50 times the saturation exposure, being the lowest level so far obtained in solid-state imagers. Degradation in the contrast transfer function due to introduction of the storage region is very little because of the minimized vertical transfer loss by the storage region configuration with pairs of half-long BCCD registers.     

A 1/3-in 410000-pixel CCD image sensor with feedback field-plateamplifier

The design considerations and performance of a 1/3-in format 410000-pixel interline transfer charge coupled device (CCD) (IL-CCD) image sensor are described. Some techniques have been introduced in order to shrink the pixel size to 6.4(H)×7.5(V) μm without any deterioration in dynamic range and, signal-to-noise (S/N) ratio. The photodiode structure is designed to reduce the knee effect so as to avoid an overflow of the vertical CCD (V-CCD) register up to 500 times the saturating illumination. A depleted-well CCD structure is introduced to maintain the maximum charge-handling capability of 92000 electrons/packet in the V-CCD register, and high enough transfer efficiency of the horizontal CCD (H-CCD) registers with 5-V_p-p pulse driving. A feedback field-plate amplifier (FFPA) is introduced to raise the sensitivity of the output amplifier to 16.2 μV/electron in order to obtain a large enough S/N ratio to the background noise of the peripheral circuits in a video camera     

A new CCD architecture of high-resolution and sensitivity for colordigital still picture

A new charged-coupled device (CCD) architecture developed for building high-resolution and high-sensitivity image sensors suitable for color digital still picture applications is presented. The sensor is based on the interline CCD structure. Both the interline pixels and the vertical charge transfer lines are utilized as light-sensing elements to improve simultaneously the resolution and sensitivity. This device is named the sea-of-photosensor array (SPA-CCD). A camera and supporting digital system were designed and built specifically to evaluate the device. Digital picture processing for white balance adjustment, chromatic correction, and high-frequency luminance was performed to improve color reproduction and picture resolution. An increased light sensitivity and limiting resolutions of 550 horizontal lines and 400 vertical lines on a TV screen were confirmed with an SPA-CCD of the same chip size as a conventional 190-k pixel IT-CCD. The new design of the SPA-CCD overcomes both the sensitivity and the resolution limitations of previous approaches     

高重频脉冲激光引起CCD视频中的动态次光斑现象研究

研究分析了CCD光电转换后信号电荷的传输过程以及激光高亮度的特点.认为高亮度的激光容易使感光二极管饱和,从而使光生电荷不通过读出脉冲控制而直接溢出至垂直CCD中,形成溢出信号电荷包;高亮度激光在垂直CCD内的漏光信号较强,从而直接在垂直CCD中形成漏光信号电荷包.溢出信号电荷包和漏光信号电荷包不依赖读出脉冲而出现于垂直CCD中,它们叠加在一起称之为次信号电荷包.次信号电荷包,经过垂直CCD的耦合转移动作,就形成了区别于激光主光斑的次光斑.研究中对次光斑的间距及循环移动的规律给出了定量的分析.次光斑的间距由CCD的转移频率和激光的重频频率所决定.而相邻帧中,主光斑与次光斑的间距有周期性的变化,从而造成了CCD输出视频中的次光斑循环移动.这种变化是由CCD垂直扫描周期被激光脉冲间隔时间整除后的余数所决定的.     

A 1/3-in 510(H)×492(V) CCD image sensor with mirror imagefunction

A 1/3-in optical format 510(H)×492(V) interline charge-coupled-device (CCD) image sensor with a mirror-image function has been developed. To realize both a normal image and a mirror image, the horizontal shift register (H-CCD) is transferred forward and backward by a four-electrode, quasi-two-phase clock drive. The unit cell size is 9.6(H)×7.5(V) μm². An on-chip microlens has been developed to achieve a sensitivity of 28 mV/lx, which is higher than that of the conventional 1/2-in device. The hole accumulation diode (HAD) sensor used has the advantage of low dark current, negligibly small lag, high blooming suppression, and a variable-speed electronic shutter. The smear reduction level is -83 dB. Horizontal resolution of 330 TV lines is obtained     

New low-noise output amplifier for high-definition CCD image sensor

A new low-noise charge-coupled-device (CCD) output amplifier, the RJG detector, has been developed. The RJG detector incorporates a JFET which has an electrically floating ring-junction gate (RJG). The operating principle of the amplifier is that signal charges, transferred from the CCD into the RJG, directly modulate the drain current in the detection JFET. The performance of the detector was evaluated by operating test devices under a 37-MHz clock frequency, which is the same frequency as that for the horizontal CCD operation in the recently developed 2-million-pixel high-definition CCD image sensor. It was found that 1/f noise was reduced by introducing the JFET and that reset noise was completely eliminated by achieving complete charge transfer through the reset operation. As a result, input referred noise equivalent electrons within the 18.5-MHz baseband were reduced to 17 (electrons)     

A high-packing density pixel with punchthrough read-out method foran HDTV interline CCD

A new pixel structure for a high-packing-density interline CCD is proposed, in which signal charges are read out from the photodiodes to the vertical CCD by a punchthrough mechanism. This read-out method makes it possible to reduce the depth of the VCCD channel and the second p-well by implanting these two layers after diffusion of the photodiode n layer. Spreading resistance measurements on dummy wafers show that the depths of these layers are 0.28 μm and 0.6 μm, respectively. Moreover, the photodiode n-layer is covered with a surface p⁺-layer, even at the transfer region. We describe the results of simulations and experiments on a test image sensor with pixel dimensions of 7.3 μm (H)×7.6 μm (V). From the experimental data, we estimate the characteristics of an image sensor with pixel dimension 5.0 μm (H)×5.2 μm (V). Such a device should have a maximum charge handling capability of 1.4×10⁵ electrons, a smear level of -88 dB, a sensitivity of 1.5×10³ electrons/Ix with a 30% fill factor, no image lag, and a low photodiode dark signal of less than 14 electrons at 60°C. These results indicate that an IL-CCD with a punchthrough readout structure is suitable for image sensors with a high pixel density such as 2/3 inch 2 million pixel image sensors for high-definition TV applications     

High-resolution CCD image sensors with reduced smear

Two types of interline transfer CCD image sensors with reduced smear signal were developed, one for a 525-line TV system (EIA) and one for a 625-line system (CCIR). An MOS diode is employed as a sensing element to realize negligibly small lag compared with that of a junction diode. The EIA and CCIR version have effective number of pixels of 510 × 492 and 500 × 582, respectively. Smear is reduced down to -92 dB by fabricating the vertical shift register on the p-well. In spite of the shrunken element area, the blue sensitivity similar to that for a conventional 384 × 491 CCD imager [1] is obtained by optimization of the film thickness on the diode. Resolution as high as 330 TV lines in color is also attained.     

A CCD color signal separation IC for single-chip color imagers

A CCD color signal separation IC for solid-state imagers with color filter arrays is described. The device simplifies peripheral circuitry and enhances picture qualities such as resolution, color fidelity, and stability for single-chip color imaging systems by incorporating CCD delay lines, sample-and-hold circuits, and dual clamp circuit. Also described is a color filter array utilizing Bayer geometry, which is used in the separation IC. Color images corresponding to a horizontal resolution of 340 TV lines with no erroneous color have been obtained from the device when used with a 580/spl times/475 element CCD imager.     

A CCD color signal separation IC for single-chip color imagers

A CCD color signal separation IC for solid-state imagers with color filter arrays is described. The device simplifies peripheral circuitry and enhances picture qualities such as resolution, color fidelity, and stability for single-chip color imaging systems, by incorporating CCD delay lines, sample-and-hold circuits, and dual clamp circuit. Also described is a new geometry color filter array which is required by the separation IC. Color image corresponding to horizontal resolution of 340 TV lines with no erroneous color has been obtained from the device when used with a 580 × 475 element CCD imager.     

Planar pulse discharge panel for a TV display

To realize a flat display panel for a high-definition TV (HDTV) receiver, the feasibility of a planar gas-discharge panel simply arranged with both the display and auxiliary cells on the same plane in the panel structure was studied. This would allow for a thick-film printing technique to be used for all fabrication processes. Using a pulse discharge driving scheme to provide internal memory, a monochrome current TV picture with 256 gray levels was reproduced on a small panel with 72 × 100 cells (horizontal cell pitch: 0.7 mm, vertical cell pitch: 0.5 mm).     

CCD电荷转换因子通用测试方法研究

通过分析电荷耦合器件(CCD)图像传感器光电转换、电荷转移、电荷输出的工作原理,提出了一种通用高效的电荷转换因子(CVF)测试方法。该方法采用在CCD感光区域施加直流偏压,水平区施加连续转移的驱动时序的方式,使CCD光敏区以电荷溢出方式往水平区转移电荷,水平区以固定频率不间断转移输出电荷包,从而让CCD输出强度恒定的响应信号;然后通过复位漏电流与输出信号强度的对应关系计算出CCD器件的CVF值。根据该方法的原理设计了一种适应各种CCD器件的通用测试装置,并对多款CCD进行测试验证。结果表明,该方法有效提高了CCD电荷转换因子的测试效率、测试精度和稳定性。