Effect of the Interfacial $hbox{SiO}_{2}$ Layer in High-$k$ $ hbox{HfO}_{2}$ Gate Stacks on NBTI

A relative contribution of the interface and bulk dielectric defects to negative bias temperature instability (NBTI) in the metal/HfO₂/SiO₂ gate stacks was investigated. Interface trap generation was assessed by the direct-current current-voltage (DCIV) technique, which independently measures the interface defect density from bulk oxide charges and delineates the contribution of the interface defect generation to the overall NBTI measured by the threshold voltage shift (DeltaV_TH). The metal/high-fc induced traps in the interfacial SiO₂ layer were found to control the fast transient trap charging/generation processes, which affect the power-law exponents of DeltaV_TH and the stress-generated interface trap density DeltaD_IT stress time dependencies. Similar kinetics of the long-term DeltaV_TH(t) and DeltaD_IT(t) dependencies in the high-fe and SiO₂ gate stacks suggests that the degradation is governed by the same mechanism of trap charging/generation in the SiO₂ film. The investigation leads to a novel methodology for the time-to-failure (TTF) extrapolation, in which the measured DeltaV_TH and DeltaD_IT values are adjusted for the contributions from the fast transient defect charging/generation processes. It is shown that the conventional TTF analysis might greatly overestimate TTF. Post-NBTI stress recovery at zero relaxation voltage measured by the DCIV method showed that oxide charges and interface traps relax at the same rate indicating that the interface processes may dominate DeltaV_TH relaxation. At positive relaxation voltages, however, the oxide charge relaxation exhibits a fast transient component. Relaxation at positive bias also shows an as yet unexplained fast component in the interface trap recovery.     

$hbox{NO}_{rm x}$ Aftertreatment Using Thermal Desorption and Nitrogen Nonthermal Plasma Reduction

In this paper, the results of two experiments are reported. First, the performances of various types of nonthermal plasma reactors for $hbox{NO}_{rm x}$ reduction were compared. It was shown that the surface-discharge reactors have as high $ hbox{NO}_{rm x}$ reduction capabilities as pulse-powered wire–cylinder reactors. Second, $hbox{NO}_{rm x}$ treatment using the surface-discharge reactor with a NO-adsorbent zeolite 13X was performed. Thermal desorption was employed for the regeneration of the zeolite. The $hbox{NO}_{rm x}$ of 350 ppm was kept lower than 18 ppm for at least 11 h, whereas it degraded to 75 ppm in the absence of the regeneration. The result suggested the possibility of an aftertreatment system that employed thermal desorption by utilizing the waste heat of diesel engine exhaust and $hbox{NO}_{rm x}$ reduction by using a surface-discharge reactor.      

Time-Dependent Dielectric Breakdown of 4H-SiC/$ hbox{SiO}_{2}$ MOS Capacitors

Time-dependent dielectric breakdown (TDDB) is one of the major issues concerning long-range reliability of dielectric layers in SiC-based high-power devices. Despite the extensive research on TDDB of $hbox{SiO}_{2}$ layers on Si, there is a lack of high-quality statistical TDDB data of $hbox{SiO}_{2}$ layers on SiC. This paper presents comprehensive TDDB data of 4H-SiC capacitors with a $ hbox{SiO}_{2}$ gate insulator collected over a wide range of electric fields and temperatures. The results show that at low fields, the electric field acceleration parameter is between 2.07 and 3.22 cm/MV. At fields higher than 8.5 MV/cm, the electric field acceleration parameter is about 4.6 cm/MV, indicating a different failure mechanism under high electric field stress. Thus, lifetime extrapolation must be based on failure data collected below 8.5 MV/cm. Temperature acceleration follows the Arrhenius model with activation energy of about 1 eV, similar to thick $hbox{SiO}_{2}$ layers on Si. Based on these experimental data, we propose an accurate model for lifetime assessment of 4H-SiC MOS devices considering electric field and temperature acceleration, area, and failure rate percentile scaling. It is also demonstrated that temperatures as high as 365 $^{circ}hbox{C}$ can be used to accelerate TDDB of SiC devices at the wafer level.      

Influence of Traps and Carriers on Reliability in HfSiON/ $hbox{SiO}_{2}$ Stacks

The influence of traps and current on the degradation in HfSiON has been studied. Different characteristics of activation energy for TDDB between thick and thin HfSiON, where the Poole Frenkel (PF) and tunnel currents mainly flow, respectively, were observed in the same temperature range. It was indicated that the current could promote the breakdown in HfSiON. Furthermore, we investigated the correlation between pre-existing traps and trap generation in HfSiON/$hbox{SiO}_{2}$ stacks with fluorine incorporation. It was found that the nature of generated traps correspond to that of pre-existing traps. From these results, it was considered that the interaction between traps and carriers causes the degradation in HfSiON.      

Composition Optimization and Phase Transformation of Si-Nanocrystal-Doped $hbox{SiO}_{x}$ for Enhancing Luminescence From MOSLED

Near-infrared (NIR) photo- and electroluminescence (PL and EL) of Si nanocrystals buried in Si-rich SiO_x, film, and their correlation with the structural phase transformation and the varied oxygen composition of SiO_x, are investigated. By detuning the N₂O flowing ratio (Y_{N 2 O} = [N₂O/(N₂O + SiH₄)] times 100%) from 93% to 80% during plasma-enhanced chemical vapor deposition growth, the oxygen composition ratio of the Si-rich SiO_x, can be adjusted from 1.64 to 0.88. The grazing incident X-ray diffraction and X-ray photoelectron spectroscopy spectra indicate that the SiO_x, transforms its structural phase from Si + SiO₂ isomer to Si + SiO + SiO₂ isomer. With O/Si ratio >1.24, the SiO_x, matrix becomes SiO₂ isomer, whereas the SiO_x, structure approaches SiO phase at O/Si ratio that is nearly 1.0. The formation of SiO matrix in SiO_x, grown at Y_{N 2 O} below 85% reduces the precipitated Si nanocrystal density from 2.8 times 10¹⁸ to 7 times 10¹⁶ cm^-3, and monotonically attenuates the NIR PL by one order of magnitude. Such a structural phase transformation from SiO₂ to SiO in SiO_x with lower O/Si ratio causes the degradation in EL power conversion efficiency and external quantum efficiency (EQE). Maximum EL power of 0.5 muW and EQE of 0.06% are obtained from MOSLED made on SiO_x, with optimized O/Si ratio of 1.24.     

$1/f$ Noise in Drain and Gate Current of MOSFETs With High-$k$ Gate Stacks

In this paper, we investigate the quality of MOSFET gate stacks where high- $k$ materials are implemented as gate dielectrics. We evaluate both drain- and gate-current noises in order to obtain information about the defect content of the gate stack. We analyze how the overall quality of the gate stack depends on the kind of high-$k$ material, on the interfacial layer thickness, on the kind of gate electrode material, on the strain engineering, and on the substrate type. This comprehensive study allows us to understand which issues need to be addressed in order to achieve improved quality of the gate stack from a $1/f$ noise point of view.      

$hbox{1}/f$ Noise Characterization of n- and p-Type Polycrystalline-Silicon Thin-Film Transistors

This paper presents a study of low-frequency-noise properties of n- and p-type polycrystalline-silicon (poly-Si) thin-film transistors (TFTs). The $hbox{1}/f$ noise behavior of these devices prompted the use of the carrier number with correlated mobility fluctuation model for data analysis. From this model, trap densities in this study were found to range from $hbox{3.5} times hbox{10}^{16}$ to $hbox{4} times hbox{10}^{17} hbox{states/eV} cdot hbox{cm}^{3}$, which is indicative of a good top surface of the channel and interface between the oxide and poly-Si. The normalized current noise of the p-channel TFTs changes with the inverse of current, independent of the width $(W)$ -to-length $(L)$ ratio of the channel; the normalized current noise of the n-channel TFTs also changes with the inverse of current, but not independent of the $W/L$ ratio. For smaller currents, noise is caused by traps at or near the oxide/semiconductor interface, whereas for larger currents, the larger contribution to the noise is believed to originate from the bulk.      

PM and $hbox{NO}_{rm x}$ Removal for Diesel Engine Emission Using Ozonizer and Chemical Hybrid Reactor

Over the years, we have investigated particulate matter (PM) and $ hbox{NO}_{rm x}$ reduction using nonthermal plasma-chemical hybrid processes without using catalysts. Among nonthermal plasma hybrid processes, the ozonizer combined with the chemical hybrid reactor was investigated using a 479 cc (5.5 kW) power generation diesel engine. The PM deposited on the diesel particulate filter can be incinerated by ozone and $hbox{NO}_{2}$ in a wide range of flue gas temperature. The NO was oxidized to form $hbox{NO}_{2}$ by ozone, and $hbox{NO}_{2}$ was reduced by the 3% $hbox{Na}_{2}hbox{SO}_{3}$ chemical reactor. As the results, PM deposited on both metal and ceramic filters were successfully removed even at ambient temperature. The rate of PM incineration depends on the amount of ozone injected and was significantly higher than the rate of PM generation. Using 2.4% ozone concentration with a flow rate of 10 L/min, 82% of NO having 720 L/min was oxidized to $hbox{NO}_{2}$, and 78% of $ hbox{NO}_{rm x}$ was removed as a chemical scrubber. However, $ hbox{NO}_{rm x}$ removal was deteriorated about 10% after 1-h operation. This was attributed to $hbox{Na}_{2}hbox{SO}_{3}$ oxidation by air, which was evidenced by the reduction of pH in the chemical reactor.      

Channel Hot-Carrier Degradation in Short-Channel Transistors With High- $k$/Metal Gate Stacks

Channel hot-carrier (CHC) degradation in nMOS transistors is studied for different $hbox{SiO}_{2}/hbox{HfSiON}$ dielectric stacks and compared to $hbox{SiO}_{2}$. We show that, independent of the gate dielectric, in short-channel transistors, the substrate current peak (used as a measure for the highest degradation) is at $V_{G} = V_{D}$, whereas for longer channels, the maximum peak is near $V_{G} = V_{D}/hbox{2}$. We demonstrate that this shift in the most damaging CHC condition is not caused by the presence of the high- $k$ layer but by short-channel effects. Furthermore, the CHC lifetime of short-channel transistors was evaluated at the most damaging condition $V_{G} = V_{D}$ , revealing sufficient reliability and even larger operating voltages for the high- $k$ stacks than for the $ hbox{SiO}_{2}$ reference.      

High-Power $hbox{Yb}^{{bm 3}{bm +}}$-Doped Phosphate Fiber Amplifier

We report on the development of novel high-power light sources utilizing a $hbox{Yb}^{3+}$-doped phosphate fiber as the gain element. This host presents several key benefits over silica, particularly much higher $hbox{Yb}_{2} hbox{O}_{3}$ concentrations (up to 26 wt%), a 50% weaker stimulated Brillouin scattering (SBS) gain cross section, and the absence of observable photodarkening even at high population inversion. These properties result in a greatly increased SBS threshold compared to silica fibers, and therefore, potentially much higher output powers out of either a multimode large mode area or a single-mode fiber, which means in the latter case a higher beam quality. To quantify these predictions, we show through numerical simulations that double-clad phosphate fibers should produce as much as $sim$700 W of single-frequency output power in a step index, single-mode core. As a step in this direction, we report a short phosphate fiber amplifier doped with 12 wt% $hbox{Yb}_{2} hbox{O}_{3}$ that emits 16 W of single-frequency single-mode output. We also describe a single-mode phosphate fiber laser with a maximum output power of 57 W. The laser slope efficiency is currently limited by the fairly high fiber loss ( $sim$3 dB/m). Measurements indicate that 77% of this loss originates from impurity absorption, and the rest from scattering.      

Combined Nanoscale and Device-Level Degradation Analysis of $hbox{SiO}_{2}$ Layers of MOS Nonvolatile Memory Devices

In this paper, the impact of an electrical stress applied on MOS structures with a 9.8-nm-thick $hbox{SiO}_{2}$ layer has been investigated at the device level and at the nanoscale with conductive atomic force microscopy (AFM). The goal is to correlate both kinds of measurements when studying the degradation and breakdown (BD) of tunnel oxides of nonvolatile memory devices. In particular, the generation of defects and its impact on leakage current and charge trapping in the tunnel oxide have been analyzed through spectroscopic measurements and current images. The properties and energy of the stress-induced defects (before and after BD) have been roughly estimated by thermally stimulated luminescence and AFM measurements.      

A Freestanding GaN/HfO $_{bf 2}$ Membrane Grown by Molecular Beam Epitaxy for GaN–Si Hybrid MEMS

Combination of GaN light source and Si-microelectromechanical systems (MEMSs) is a promising hybrid structure for optical MEMS. As one of GaN-Si hybrid structures, a freestanding GaN/HfO₂ membrane was fabricated on Si substrate. Unlike conventional GaN membrane on Si substrate, the fabricated membrane had a tensile stress by using the HfO₂ layer. Therefore, the GaN/HfO₂ membrane was flat enough to be useful for several MEMS. The GaN crystal was grown by molecular beam epitaxy on the HfO₂ layer deposited on Si substrate. The surface of the HfO₂ layer was nitrified before GaN crystal growth, and thus, a part of HfO₂ surface was changed to HfN, the lattice of which matched well to that of GaN. The characteristics of the GaN crystal grown on the nitrified HfO₂ layer were also investigated.     

Highly Stable 1.3-$muhbox{m}$ -Wavelength Lasers With p- and n-InP Buried Heterostructure

Highly stable 1.3-$muhbox{m}$-wavelength Fabry–Perot lasers with a p- and n-type InP buried heterostructure have been achieved at an ambient temperature of 85 $^{circ}hbox{C}$. The $t^{0.5}$ deterioration (second-stage degradation) property does not appear clearly within 6000 h, and the saturated first-stage degradation property remains. It is confirmed that the fabricated 1.3-$muhbox{m}$ FP lasers have a different optical-beam-induced-current characteristic from lasers suffering from $t^{0.5}$ deterioration. The first-stage degradation is due to the deterioration of the active layer and is attributed to the fact that some nonradiative recombination centers are generated in the active layer.      

$hbox{CO}_{bf 2}$ Reforming of Aliphatic Hydrocarbons With Silent Discharge Plasma

CO₂ reforming of methane ( CH₄) and propane (C₃H₈) was performed with a silent discharge reactor (SDR). The reactor performance was evaluated in terms of energy efficiencies for the conversion of the substrates and formation of H₂ and CO. The reactivity of C₃H₈ was 2- to 3-fold higher than that of CH₄, and both of CH₄ and C₃H₈ were reformed in the order of 10¹⁶ molecules/J at 298 K. The energy efficiencies for the conversion of these substrates increased with their initial concentrations, but decreased with an increase in reactor energy density. On the other hand, the energy efficiencies for the conversion of CO₂, which were not affected by the hydrocarbon types, were lower than those for the hydrocarbon substrates. A positive temperature effect was observed in the conversion of the hydrocarbon substrates only at low reactor energy densities from 298 to 433 K.     

Hot-Carrier- and Constant-Voltage-Stress-Induced Low-Frequency Noise in Nitrided High- $k$ Dielectric MOSFETs

Understanding and minimization of low-frequency noise (LFN) originating from high- $k$ (HK) gate dielectrics in newgeneration MOSFETs are of critical importance to applications in RF, analog, and digital circuits. To understand the effect of stress conditions on noise, nMOSFETs were subjected to accelerated hot-carrier stress (HCS) and positive constant-voltage stress (CVS). The additional LFN introduced through stressing was evaluated on nMOSFETs with TiN metal gate and HfSiON gate dielectric. Nitridation of HfSiO gate-dielectric MOSFETs was achieved by either a high-temperature $hbox{NH}_{3}$ anneal or a lower temperature plasma anneal. Influence of different dielectric nitridation procedures on the stress-induced degradation of transconductance, threshold properties, and LFN was studied. Worst degradation conditions, i.e., $V_{g} = V_{d}$, were used for HCS, whereas for CVS, the vertical field was fixed at 10 MV/cm for all transistors to achieve comparable stressing conditions. Plasma-nitrided devices showed less increase in their noise in the linear operation region than the thermally nitrided devices. This difference in noise behavior is attributed to the nitrogen profile across the HK/Si interface and in the bulk of the HK oxide caused by different nitridation techniques. The dielectric defect profile resultant from different annealing techniques was consistent with the spectral form of the observed drain-voltage LFN.      

Complex-Valued State Matrices for Simple Representation of Large Autonomous Microgrids Supplied by $PQ$ and $Vf$ Generation

This paper focuses on representing the state space model of a microgrid in which power regulated (PQ ) and voltage/frequency regulated (Vf) generation units share a distribution system. The generation units considered in this paper are inverter interfaced. This introduces some interesting modeling problems which are treated in the paper, such as the decoupled cascaded control schemes or the non-negligible grid dynamics. A modeling approach is proposed based on four defined complex vectors. These vectors allow for complex-valued system matrices to be formed in a quite automated way. Moreover, a convenient partition of the system matrices is proposed, which in turn allows fast and easy modifications. Additionally, a multivariable methodology is proposed to simultaneously find the control system gains in an optimal sense. A 69-bus radial system, supplied by 20 generation units, is used to demonstrate how the proposal is of easy implementation to conduct small-signal stability analyses.     

Preparation and Luminescence Properties of Glass Ceramics Precipitated With $hbox{M}_{bf 2}hbox{MgSi}_{bf 2}hbox{O}_{bf 7}{:},hbox{Eu}^{bf 2+}$ (M = Sr, Ca) Phosphor for White Light Source

$hbox{Eu}^{2+}$-doped silicate glasses were prepared in the system $42hbox{SiO}_{2}$– $gamma hbox{CaO}$– $(38gamma)hbox{SrO}$–$20hbox{MgO}$– $0.2hbox{EuO} (gamma = 0, 10, 20, 30, 38)$ by melting under reducing atmosphere. Glass ceramics precipitated with $hbox{M}_{2}hbox{MgSi}_{2}hbox{O}_{7}{:}hbox{Eu}^{2+}$ (M = Sr, Ca) phosphor were obtained by heat-treatment of the glass. They showed broad emission band due to the 5d $rightarrow$ 4f transition of $hbox{Eu}^{2+}$. The peak wavelength shifted from 470 to 530 nm with increasing CaO content. Their emission wavelength can be controlled by changing the compositional ratio of Ca and Sr. Their color coordinates were widely changed from blue to yellowish green region. We have successfully obtained glass ceramic phosphors with excellent durability for a high-power white LED based on near-UV LED.      

Injection and Avalanche Electroluminescence of $hbox{Al}_{hbox{0.1}} hbox{Ga}_{hbox{0.9}} hbox{N/Al}_{hbox{0.15}} hbox{Ga}_{hbox{0.85}} hbox{N}$ Multiple Quantum Wells

Three periods of Al_0.1Ga_0.9N/Al_0.15Ga_0.85 N multiple quantum wells (MQWs) were used as the active region of a p-i-n diode fabricated on 6H-SiC substrate. Electroluminescence (EL) of these MQWs has been investigated in both injection and avalanche modes. Band-to-band luminescence of the Al_0.1Ga_0.9N wells was found to peak at 364 nm in the injection mode and in the range of 364-372 nm in the avalanche mode. The most striking phenomenon is that band-to-band EL of the Al_0.15Ga_0.85N barriers has also been observed in the injection mode, while it is not seen in the avalanche mode. This is explained by considering different sources of carriers and different carrier transportation mechanisms in the two modes. The luminescence intensity I _EL has a power-law dependence on the current I by I _EL prop I ² in the injection mode and by I _EL prop I ⁴ in the avalanche mode.