晶体管非理想因素对跨导线性低通滤波器性能的影响

针对双极型晶体管的非理想因素(寄生发射极电阻RE和基极电阻RB、有限β值及Early效应VA等)对跨导线性低通滤波器性能的影响，分别导出了低通滤波器的截止频率ω^～m品质因数Q^～与积分器误差函数幅值E和相位θ之间的关系式，得到了ω^～m、Q^～与非理想参数RE．RB、有限β和VA值的关系式，给出了电子补偿的方法。SPICE仿真分析验证了理论分析结果。     

单电子晶体管特性的简化分析及其应用

文章在研究单电子晶体管(Single Electron Transistor，SET)I-V特性的基础上，阐明了一种简化分析方法，并据此设计了一个SET积分器，说明了SET积分器的工作条件、结构、性能、参数和特点。仿真结果表明：该积分器的传输特性与采用其它两种方法描述SETI-V特性所构成的积分器传输特性有着良好的一致性。这种简化分析方法同样适用于SET在其它功能电路中的应用。     

一种对数域电流模式积分器及其在高频滤波中的应用

提出了一种新颖的对数城电流模式积分器。该积分器的时间常数由参考偏置电流控制。用该积分器设计了二阶带通滤波器和0．1dB纹波三阶Chebyshev低通滤波器。计算机仿真表明，所设计的滤波器实际频响特性几乎是理想的，而且高频谐波失真很小，通频带灵敏度很低，频率在很宽的范围内可控。电路由双极型晶体管和接地电容构成，适合于全集成实现。     

有源补偿电流积分器

本文针对ＣＣＩＩ提出了一种新的有源补偿电流模式积分电路，理论分析和ＳＰＩＣＥ仿真均表明此补偿可减少非理想积分器与理想积分器之间的偏差，降低滤波器的灵敏度，本文还讨论了由此积分器构成的双积分器回路。     

一种新颖的对数域电流模式有损积分器

提出了一种新颖的对数域电流模式有损积分器。该积分器的极点频率与基准偏置电流呈线性关系，具有较宽的动态范围和较低的总谐波失真，适合于在低电压下工作。电路采用双极型晶体管和接地电容实现，适合于全集成。面向晶体管级的ＰＳＰＩＣＥ仿真结果表明该电路是正确的。     

几种非理想CCII连续时间积分器的误差函数分析

本文应用积分器的误差函数分析了几种基于第２代电流传输器（ＣＣＩＩ）连续时间积分器的非理想效应，导出了积分器误差函数也ＣＣＩＩ的直流增益和有限带宽之间的关系，并用实验验证了分析结果。     

单电子晶体管积分器及其性能分析

研究了单电子晶体管 ( Single electron transistor,SET) I-V特性的一种简化分析方法 ,在此基础上设计了 SET积分器 ,并阐述了该积分器的工作条件、结构、性能、参数和特点。仿真结果表明 ,该积分器的传输特性与采用其它两种方法描述 SET I-V特性所构成的积分器传输特性有着良好的一致性。文中所提出的简化分析方法同样适用于 SET在其它模拟和逻辑电路中的应用。     

几种非理想CCI连续时间积分器的误差函数分析

本文应用积分器的误差函数分析了几种基于第２代电流传输器（ＣＣＩ）连续时间积分器的非理想效应，导出了积分器误差函数与ＣＣＩ的直流增益和有限带宽之间的关系，并用实验验证了分析结果。     

一种基于单电子晶体管的二阶低通滤波器

在研完单电子晶体管(SET)I-V特性的基础上，阐明了一种分区处理法，设计了一个SET积分器电路。并据此实现了一个SET二阶低通滤波器，说明了该滤波器的工作条件、结构、性能、参数和特点。仿真结果表明，该滤波器的传输特性与采用其它两种方法描述SET I-V特性所构成的滤波器的传输特性有良好的一致性。文中所提出的SET I-V特性分区处理法，同样适用于SET在其它功能电路中的应用。     

用于高频的新颖开关电容积分器

本文研究了用于开关电容(SC)滤波器的离散积分器,所推荐的积分器是由无耗离散积分器(LDI)和双线性离散积分器的最佳线性结合而成,因此,称之为组合离散积分器(CDI)。由于这个积分器使正常转折频率增加一倍,并使高频离散积分器误差减少到最低限度,所以它对高频应用是理想的。文中给出了组合离散积分器的几种SC实现,并且还给出了以组合离散积分器为基础,模拟一般一阶和二阶的模拟滤波器单元的SC电路。     

Switched-current (SI) integrators with reduced effect of transistor mismatches

Switched-current (SI) circuits are widely used for analog sampled-data signal processing, due to their compatibility to the pure digital CMOS process. As their main building blocks are current mirrors, they suffer from the effects of MOS transistor parameters mismatch. In this paper, the Functional Block Diagram (FBD) of already known integrator circuits is modified in such a way that the number of required current mirrors is reduced. Thus, the behavior of the derived integrator topologies, with respect to the effect of MOS transistor parameters mismatch, is improved.A comparison is performed, concerning the performance of the proposed bilinear integrator circuits and those that are already introduced in the literature. For this purpose, a fifth-order Chebyshev lowpass SI filter transfer function was simulated. In the case of the proposed filter configurations, the obtained results show that their performance is improved in terms of the effects of MOS transistor parameters mismatch, DC power dissipation, and total required silicon area.     

Fully Differential Class-AB Log-Domain Integrator

A new fully differential class-AB log-domain integrator is proposed. The structure consists of two non-inverting integrators and an intersection circuit with a common-feedback circuit. The effects of transistor non-idealities and signal path mismatches on the differential integrator are investigated. A 5th-order Chebyshev low-pass filter which can be tuned from 1 to 45 MHz is designed. The validity and stability of the proposed circuits are verified using HSPICE simulations.     

New switched-current integrator

A switched-current integrator configuration with greatly improved insensitivity to transistor mismatch is described. A universal integrator configuration is developed which performs an algorithm identical to the well known switched-capacitor universal integrator. This permits signal flowgraph synthesis of switched-current filters with similar properties to those of their switched-capacitor counterparts.<>     

改进型跳耦结构电流镜滤波器

提出了一种利用电流镜积分器和微分器实现的改进型跳耦结构滤波器,讨论并比较了跳耦结构和改进型跳耦结构滤波器的设计方法,改进方法突破了单纯用电流镜积分器实现滤波器的局限,简化了椭圆函数滤波器的信号流图和电路结构;完成了MOS级的计算机仿真,仿真结果表明所提出的电路方案正确有效。     

Analysis and Compensation of Log-Domain Biquadratic Filter Response Deviations due to Transistor Nonidealities

A translinear log-domain integrator, the powerhouse of log-domain filtering techniques, is analyzed to determine its deviations due to major time-invariant bipolar transistor imperfections, such as parasitic emitter and base resistances, finite beta, Early effect, and area mismatches. The results are used to predict the transfer function deviations of biquad filters, for both lowpass and bandpass filter responses. It will be shown that the errors can be understood and categorized into integrator scalar and negative feedback errors, and how they can be electronically compensated. SPICE simulations, both large and small-signal analysis, are performed to verify the results.     

A Very High-Frequency Transistor-Only Linear Tunable Companding Current-Mode Integrator

A low-distortion tunable transistor-only integrator suitable for applications in the frequency range approaching the f _T of transistors is presented. The circuit is a modified version of the recently introduced companding current-mode integrator utilizing the non-linear base-emitter diffusion capacitance of the BJT. A first-order approximation of the circuit characteristics is explained, followed by a brief discussion on the departure from ideal characteristics due to transistor nonidealities. Experimental and simulated results of practical integrators are given to verify the feasibility of the proposed modified circuit.     

Switched-Current Filters Revisited: Square-Root Domain Sampled-Data Filters

In this brief, the well-known switched-current (SI) filtering technique is revisited using the concept of the square-root domain (SRD) filtering. It is proved that SI filters are a subclass of the SRD filters, where sampled-data signal processing is performed. This is achieved by considering typical lossless and lossy SRD sampled-data integrator configurations, using a set of complementary SRD operators which are based on the quadratic I-V relationship of MOS transistor operated in the saturation. Circuit examples are given, where linear-domain integrator and third-order filter configurations were derived using appropriate SRD sampled-data building blocks     

Design of a fA wide dynamic range ADC for current sensing

In this paper, optimal dynamic range scaling of ΔΣ ADC using bias current estimation method is proposed. Generally, a different dynamic range scaling gives different feedback factor and effective load capacitance to each integrator in the ΔΣ ADC. It means that power consumption of each integrator strongly depends on the coefficient of the integrator. Therefore, the proposed method estimates which dynamic range scaling consumes the least power to achieve a given settling error. To verify the effectiveness of the proposed method, the noise coupled third order ΔΣ ADC having different dynamic scaling with transistor level opamps was simulated to compare the ADC performance.     

State space synthesis of integrators based on the MOSFET square law

The authors present a design methodology on pure CMOS VLSI technology, which exploits the square law relationship between gate voltage and drain current in a saturated MOS transistor to implement state equations derived from a given transfer function. The process is illustrated with the design of an differential integrator     

Analysis of Integrator Nonlinearity in a Class of Continuous-Time Delta–Sigma Modulators

We analyze the effect of nonlinearity in the first integrator of a single-loop multibit continuous-time delta-sigma modulator, when the loop filter is of the cascade of integrators with feedforward kind. When a multibit quantizer is used in the loop, we show that integrator nonlinearity results in an increased in-band noise (IBN) floor. We develop analytical relations for the IBN spectral density for several opamp topologies, assuming that the shaped quantization noise is approximately Gaussian. Our results agree well with macromodel and transistor level simulations.