An investigation of the silicon—Sapphire interface using the MIS capacitance method

Measurements of the MIS capacitance as a function of voltage were carried out on aluminum-sapphire-silicon structures. The results were used to determine the doping of the silicon and the interface-state density and flat-band charge density at the silicon-sapphire interface. The density of states function Ds(cm^-2eV^-1) is found to be qualitatively similar to that reported for the Si-SiO2interface but is larger in magnitude by a factor of 5-10.     

Initial and radiation-induced charge distribution in silicon oxynitride MIS structures

Silicon oxynitride films deposited on a HF-etched Si surface show a large fixed positive charge in the dielectric (2-3 × 10^-2cm^-2). This charge is shown by etch-back experiments to be located near the silicon-oxynitride interface. Negative charge is injected into the oxynitride film if a negative bias larger than 2.8 × 10⁵V/cm is applied during irradiation. For saturation doses (about 1-2 Mrad of absorbed radiation), the magnitude of the injected charge can become as large or larger than the original positive charge in the oxynitride. The injected negative charge, is shown to be located at the silicon-oxynitride interface by etch-back experiments. The injection of negative charge under the above conditions appears to be an electronic phenomenon. An ionic mechanism appears unlikely because re-irradiation at room temperature without application of a bias restores the original flat-band condition of the MIS capacitor.     

不同退火氛围对TiN/HfO2/SiO2/Si结构电荷分布的影响

热退火技术是集成电路制造过程中用来改善材料性能的重要手段。系统分析了两种不同的退火条件(氨气氛围和氧气氛围)对TiN/HfO₂/SiO₂/Si结构中电荷分布的影响,给出了不同退火条件下SiO₂/Si和HfO₂/SiO₂界面的界面电荷密度、HfO₂的体电荷密度以及HfO₂/SiO₂界面的界面偶极子的数值。研究结果表明,在氨气和氧气氛围中退火会使HfO₂/SiO₂界面的界面电荷密度减小、界面偶极子增加,而SiO₂/Si界面的界面电荷密度几乎不受退火影响。最后研究了不同退火氛围对电容平带电压的影响,发现两种不同的退火条件都会导致TiN/HfO₂/SiO₂/Si电容结构平带电压的正向漂移,基于退火对其电荷分布的影响研究,此正向漂移主要来源于退火导致的HfO₂/SiO₂界面的界面偶极子的增加。     

Metal-insulator-semiconductor structures of InSb/SiO2with very low interface trap density

MIS structures fabricated using InSb and silicon dioxide with an interface trap density as low as 4×10¹⁰ cm^-2 eV^-1 have been achieved. This is about one order of magnitude less than any other reported figure for the InSb MIS system. Both capacitance/voltage and conductance techniques have been employed to study the interface properties of InSb/SiO₂. A low state density of <10¹⁰ cm^-2 was observed and the dielectric breakdown field of the oxide was greater than 4 mV cm^-1      

Electrical characterization of interface states in Ni/n-Si(111) Schottky diodes from (C-V) characteristics

Experiments have been performed on Ni/n-Si(111) Schottky diodes fabricated by the vacuum vapor deposition of Ni at 10⁻⁵ Torr pressure on an n-type «111å oriented silicon wafer. Measured current-voltage and capacitance-voltage characteristics in range frequency range 10 kHz-1 MHz have been analysed. Interface states parameters have been extracted from (C-V) characteristics using a metal-thin interfacial layer-semiconduct (MIS) structure model. The interface states density has been found to be in the range of 10¹¹ cm⁻² eV⁻¹ with a peak in the band gap of Si at about 0·51 eV below the conduction band edge.     

Electronic properties of the silicon-thermally grown tantalum oxide interface

MOS capacitance measurements showed that the Si-Ta2O5interface prepared by thermal oxidation at ∼530°C of vacuum deposited Ta film followed by a heat treatment at 350°C in N2-H2is characterized by a negative "oxide" charge (6 × 10¹¹e/cm^-2at flat-band) and by an interface state density of ∼ 1 × 10¹²cm^-2(eV)^-1. The room temperature instability is small. The breakdown strength is >8 × 10⁶V/cm.     

InxAl1-xAs/InP heterojunction insulated gate field effect transistors (HIGFET's)

Stability problems in conventional InP metal-insulator-semiconductor field effect transistors (MISFET's) have been overcome in InP heterojunction insulated gate FET's (HIGFET's) by replacing the insulator with InxAl1-xAs. We report on the fabrication and low-frequency operation of the HIGFET with a composition of x = 0.43. Transistor characteristics have been successfully modeled by an analytical MISFET model which indicate a low interfacial state density (≅ 10¹¹/cm²) and near flat-band condition.     

Electrical conduction and dielectric breakdown in aluminum oxideinsulators on silicon

Leakage currents and dielectric breakdown were studied in MIS capacitors of metal-aluminum oxide-silicon. The aluminum oxide was produced by thermally oxidizing AlN at 800-1160°C under dry O₂ conditions. The AlN films were deposited by RF magnetron sputtering on p-type Si (100) substrates. Thermal oxidation produced Al ₂O₃ with a thickness and structure that depended on the process time and temperature. The MIS capacitors exhibited the charge regimes of accumulation, depletion, and inversion on the Si semiconductor surface. The best electrical properties were obtained when all of the AlN was fully oxidized to Al₂O₃ with no residual AlN. The MIS flatband voltage was near 0 V, the net oxide trapped charge density, Q_0x, was less than 10¹¹ cm ^-2, and the interface trap density, D_it, was less than 10¹¹ cm^-2 eV^-1, At an oxide electric field of 0.3 MV/cm, the leakage current density was less than 10^-7 A cm^-2, with a resistivity greater than 10 ¹² Ω-cm. The critical field for dielectric breakdown ranged from 4 to 5 MV/cm. The temperature dependence of the current versus electric field indicated that the conduction mechanism was Frenkel-Poole emission, which has the property that higher temperatures reduce the current. This may be important for the reliability of circuits operating under extreme conditions. The dielectric constant ranged from 3 to 9. The excellent electronic quality of aluminum oxide may be attractive for field effect transistor applications     

TBD prediction from low-voltage near-interfacetrap-assisted tunneling current measurements

In this paper, we present a new method to predict oxide breakdown directly from measurements at low voltage and room temperature, therefore without the need for any voltage/field extrapolation. Previously, it has been shown that in ultrathin oxide (t_ox<2 nm) MOS devices with high substrate doping (N_A >10¹⁸ cm^-13) a current component of cathode electrons tunneling into anode near-interface traps (TNIT) is present when the applied voltage is between zero and the flat-band voltage. Here, we show that there is a correlation between this TNIT component and oxide breakdown. Then, we introduce a new method exploiting this correlation to predict oxide lifetime from stress measurements at the real operation conditions without any questionable voltage/field extrapolation. The results are consistent with other extrapolation techniques. However, the present methodology is particularly suitable for T_BD characterization of future technologies since, as the scaling process continues, TNIT will be more and more important and visible, while the traditional techniques to assess oxide defects (like capacitance-voltage (C-V) or stress-induced leakage current (SILC) measurements) or to directly detect breakdown will become less feasible     

High-Temperature Stable HfLaON p-MOSFETs With High-Work-Function Ir3Si Gate

We report a novel 1000 degC stable HfLaON p-MOSFET with Ir₃ Si gate. Low leakage current of 1.8times10^-5 A/cm² at 1 V above flat-band voltage, good effective work function of 5.08 eV, and high mobility of 84 cm²/Vmiddots are simultaneously obtained at 1.6 nm equivalent oxide thickness. This gate-first p-MOSFET process with self-aligned ion implant and 1000 degC rapid thermal annealing is fully compatible to current very large scale integration fabrication lines     

Electrical properties of N2O/NH3 plasma grownoxynitride on strained-Si

Growth of ultrathin (<100 Å) oxynitride on strained-Si using microwave N₂O and NH₃ plasma is reported. X-ray photoelectron spectroscopy (XPS) results indicate a nitrogen-rich layer at the strained-Si/SiO₂ interface. The electrical properties of oxynitrides have been characterized using a metal-insulator-semiconductor (MIS) structure. A moderately low value of insulator charge density (6.1×10¹⁰ cm^-2) has been obtained for NH₃ plasma treated N₂O oxide sample. Nitrided oxide shows a larger breakdown voltage and an improved charge trapping properties under Fowler-Nordheim (F-N) constant current stress     

An adaptive ferroelectric transformer—A solid-state analog memory device

A new solid-state adaptive (analog memory) device is described and demonstrated. The device is a flat-band electronic transformer with adaptable voltage gain; that is, the voltage gain-frequency transfer characteristic can be "set" to different values of attenuation by the application of an adapt signal and will retain that setting after the adapt signal has been removed. Ferroelectric materials are used as the dielectric in the transformer structure composed of two capacitors bonded together so that mechanical vibrations established in one (the input capacitor) are coupled to the other (the output capacitor). Converse and direct piezoelectric effects generate the mechanical vibrations and the output voltages, respectively. Ferroelectric effects in either capacitor provide the analog memory capabilities. Experimental adaptive transformers demonstrated are suitable for audio frequency operation. The voltage and current gain-frequency transfer characteristics are flat over the entire audio frequency range. Maximum gain is typically about -20 dB. Application of a voltage pulse (100 to 300 volts) of low energy (mJ) to either side of the transformer can adapt the gains to specific lower settings (between-20 and -60 dB) within an arbitrary switching time (roughly 10⁺³to 10^-4seconds) as determined by the pulse amplitude. Gain settings are electrically stable to within a few percent of the maximum gain for periods of at least one year, and possibly indefinitely, and can be reproduced by the same or an equivalent sequence of adapting pulses.     

Limitations of the MIS capacitance method resulting from semiconductor properties

The influence of doping profiles, traps and grain boundaries in the semiconductor on the C-V characteristics of ideal MIS diodes is calculated. In addition, it is shown that losses and frequency dispersion as well as hysteresis effects can result from traps in the semiconductor. If these semiconductor properties are ignored misinterpretations in terms of interface state density will arise which can be about 10¹² cm⁻². In the case of decreasing doping profiles and traps in a n-type semiconductor one will get an apparent positive surface charge while an apparent negative surface charge will result from increasing profiles and grain boundaries. A method for the experimental determination of the C-V characteristics of ideal MIS diodes is developed. This method is applicable to stable diodes with only shallow traps in the semiconductor.     

Optimum design for high-power and high-efficiency GaAs Hi-Lo IMPATT diodes

Optimum structure parameters of GaAs hi-lo IMPATT diodes to give a high-efficiency and a high-output power are experimentally determined in the frequency range from 7 to 18 GHz. The highest efficiency is obtained at any frequency when a diode has a punch-through factor of about 0.6 and is depleted with an electric field strength of 10 kV/cm at the end of the lo region under operation. The optimum lo-region carrier concentration to achieve the highest efficiency and the upper limit of a junction area to obtain a high-output power without decreasing efficiency are found to be simply related to frequency by the following equations:(N_{L})_{opt} = (4 times 10^{14}) cdot (f/7)^{3}cm^-3and(S_{j})_{max} = (20 times 10^{-4}) cdot (f/10)^{-1.9})cm²), respectively, wherefis in gigahertz.     

氧等离子体处理条件对聚硅烷制备SiO2/Si结构平带电压的影响

氧等离子体处理高阻P型（100）硅片上的聚硅烷涂层制备SiO2/Si结论。其MOS结构平带电压随氧等离子体处理时间、反应室气压、射频功率等条件的改变而变化,平带电压最小可达-0.55～-0.88V比同一环境热氧化制备的SiO2/Si结构平带电压小得多。     

Spatial charge distribution in as-deposited and UV-illuminatedgate-quality nitrogen-rich silicon nitride

Gate-quality N-rich amorphous SiN_1.6:H films prepared by plasma-enhanced chemical vapor deposition (PECVD) at substrate temperatures of 250 and 400°C are discussed. Films of different thicknesses t, ranging from 20 to 1100 nm, were obtained by varying the deposition time. The flat-band voltage shift was found to be proportional to t and t² before and after UV illumination, respectively. The linear dependence before illumination suggests a centroid of the positive charge located close to (within a region narrower than 20 nm of) the silicon/nitride interface. After UV illumination the distribution of the positive charge throughout the film is uniform. The bulk value of the positive photoinduced fixed charges is around 9×10¹⁶ and 3×10¹⁶cm^-3 for N-rich films deposited at 250 and 400°C, respectively     

Reliability of MINP compared to MIS, SIS, and N/P silicon solar cells under 1.0-MeV electron and environmental effects

The effects of 1.0-MeV electron radiation are compared for MIS, SIS, N/P, and MINP silicon solar cells. MIS, SIS, and N/P silicon solar cells are comparable in performance except that SIS cells degraded faster due to use of n-type Si substrates. MINP cells exhibited superior performance in that efficiency degraded 9 percent at a fluence of 1 × 10¹⁵e^-/cm²and 32 percent at a fluence of 1 × 10¹⁶e^-/cm²compared to 29 percent and 49 percent, respectively, for N/P cells. MINP cells utilize an SiO2insulator layer over a thin N-region, and a low work function metal contact. This design gives a high ultraviolet response and low surface recombination velocity which maintains high efficiency since most of the radiation loss occurs in the infrared region due to bulk damage effects.     

Fatigue phenomena of FTMIS memory transistors

Two operation modes of long endurance and their fatigue properties are described for a nonvolatile charge storage memory device which employs a floating silicon gate tunnel injection MIS (FTMIS) structure. The device is composed of an n-channel metal gate field effect transistor with a floating gate over tunnelable (20-35 Å) SiO2. The floating gate consists of highly resistive polycrystalline Si grains. Gate oxidation isolates each poly-Si grain, resulting in a structure of islands. This improves retention characteristics. The primary feature of these devices is that no fatigue phenomena are observed for 2 × 10¹²cycles continuous write-erase operation in the conventional operation mode. In addition, it is possible both to write and erase in the other operation mode with only positive pulses to the gate electrode. Furthermore, stored data is retained more than one year without any external power supply. Therefore the device is an excellent candidate for nonvolatile RAM applications as a semiconductor memory device.     

Design and fabrication of flat-band long-period grating

A method to realize the practical flat-band long-period fiber grating (LPG) fabrication is proposed. Based on the results obtained from the layer-peeling method, we have analyzed the structure of the designed flat-band LPG. We found that the designed LPG is an apodized LPG with sinc-like envelope and a constant period, while there exists a /spl pi/ phase shift at each zero point of the apodization profile. For the first time, a flat-band LPG is realized in fabrication. The experimental result shows a good match with our theoretical analysis.