VLSI Architecture Design of Fractional Motion Estimation for H.264/AVC

The H.264/AVC Fractional Motion Estimation (FME) with rate-distortion constrained mode decision can improve the rate-distortion efficiency by 2–6 dB in peak signal-to-noise ratio. However, it comes with considerable computation complexity. Acceleration by dedicated hardware is a must for real-time applications. The main difficulty for FME hardware implementation is parallel processing under the constraint of the sequential flow and data dependency. We analyze seven inter-correlative loops extracted from FME procedure and provide decomposing methodologies to obtain efficient projection in hardware implementation. Two techniques, 4×4 block decomposition and efficiently vertical scheduling, are proposed to reuse data among the variable block size and to improve the hardware utilization. Besides, advanced architectures are designed to efficiently integrate the 6-taps 2D finite impulse response, residue generation, and 4×4 Hadamard transform into a fully pipelined architecture. This design is finally implemented and integrated into an H.264/AVC single chip encoder that supports realtime encoding of 720×480 30fps video with four reference frames at 81 MHz operation frequency with 405 K logic gates (41.9% area of the encoder).

H.264/AVC中快速1/4像素运动估计算法

提出了一种快速1/4像素的运动估计算法.该算法基于运动补偿预测误差模型,与传统的1/4像素的分层运动估计算法不同,仅通过一步计算就能直接得到1/4像素精度的运动矢量,而且完全避免了运算量很大的分数像素内插运算和整像素搜索完成后的分数像素搜索.实验结果表明,该算法在保持图像质量的前提下极大地减少了1/4像素运动估计的运算量.     

基于H.264的内容自适应分数像素运动估计算法

分数像素精确运动估计的改进是整个运动估计模块优化的关键,本文提出了基于H.264的内容自适应分数像素运动估计算法。首先,提出基于平坦区域宏块预测的无效分数像素运动矢量(MV)搜索省略算法(SMBP);然后,改进H.264采用的基于中心的分数像素搜索算法(CBFPS),提出基于预测矢量的增强型菱形模板(EDSP)搜索算法。实验结果表明,内容自适应分数像素运动估计算法比分数像素全搜索算法(FFPS)在峰值信噪比(PSNR)有微小降低(0.095～0.209 dB)的情况下,平均减少了75.6%的分数像素搜索点,整个运动估计模块平均节省了38.5%的计算量。     

H.264/AVC中基于全零块检测的运动估计快速算法

全零块检测是面向低比特率的视频编码器常用优化方法之一.特别是与运动估计相结合,可以有效的减少编码器的计算复杂性.本文根据H.264/AVC中整数变换的特点,给出了相应的全零块检测门限,提出了一种基于全零块检测的运动搜索提前中止准则.针对H.264/AVC多编码模式的特点,进一步将全零块检测用于H.264/AVC中多种编码模式的选择,有效的提高了运动估计的效率.利用这种方法,在有效减少编码器的计算复杂性,提高H.264/AVC软件编码器编码效率的同时,可以保持比特率和图像质量基本不变.     

Small-diamond-based search algorithm for fast block motion estimation

A good fast motion search algorithm should efficiently speed up the encoding time and keep the quality of encoded video stable at the same time. Researches have shown that many fast algorithms lose the quality requirement in some special video sequences. These video sequences often have heavy motions and need large search windows for motion vector search. E3SS, DS, and E-HEXBS, which are famous algorithms, are not good enough in these sequences. As to UMHexagonS, it is able to meet the high video quality requirement very well, but it costs too much computation. This paper introduces a multi-stage motion estimation algorithm. The algorithm ensures getting good video quality while decreases the motion search time efficiently. It divides the search regions into many un-overlapped small-diamond regions and forces the motion search to go outward for larger motion vectors. This method is also designed to avoid mistaking local optimal motion vectors. For this reason, the selected motion vector is refined by several stages. Experimental results show that the proposed algorithm uses almost the same number of checking points as E3SS but achieves a better quality. Furthermore, the proposed algorithm is also tested in H.264/AVC JM9.5 encoder; the experimental results show that this algorithm is also suitable for variable block-size motion estimation.     

H.264/AVC运动估计算法的硬件结构研究

运动估计是H.264/AVC编码器的重要组成部分,其运算量占据了整个编码器计算时间的60%~90%。对H.264/AVC运动估计的几种快速搜索算法进行分析比较,并在此基础上提出先进的六边形搜索算法。给出运动估计快速搜索算法的一般硬件结构,并在此基础上提出具有流水线并行处理能力的先进六边形搜索算法的硬件结构。实验结果表明：该硬件结构系统工作频率能够达到109.06 MHz,完全能够满足高清视频实时应用的要求。     

Transparent encryption techniques for H.264/AVC and H.264/SVC compressed video

Transparent encryption of video content requires to provide a video preview that is left in plaintext, while the enhancement information is encrypted. In this paper we propose three algorithms that provide transparent encryption. The first two ones are based on the idea of generating controlled drift in such a way as to obtain the desired quality level, while the third algorithm employs scalable video coding. We provide experimental results on several video sequences, as well as a security analysis, showing that the proposed algorithms provide an effective framework to perform transparent encryption.     

基于空域特征的H.264快速多参考帧选择算法

提出了一种H.264快速多参考帧选择算法,它利用视频序列的空间相关特性,在运动估计之前判断当前宏块的Skip编码模式,实现在运动估计过程中快速选择编码模式,基于对Skip编码模式占用概率的统计分析,设置多模式下参考帧数量.实验结果表明,本算法在PSNR损耗与全搜索算法相比不超过0.07dB的情况下,平均节约72.5%的编码时间.     

一种基于二维直方图的H.264/AVC快速帧内预测判决算法

最新的视频压缩标准H.264/AVC具有极高的压缩率,但由于其算法极其复杂,编码时间较长,无法达到实时应用的要求。该文针对其帧内预测算法的特点,提出了一种基于二维直方图的快速帧内预测算法。该算法在进行帧内预测之前先对宏块预判,从两种帧内预测模式中选择一种,从而减少了算法的复杂度,提高了压缩速度。实验结果表明,所提的算法在码率只有少许增加的情况下,编码速度提高了16.26%,PSNR值基本不变。     

H.264中快速运动估计算法及其架构

提出了一种新的可应用于H.264中的运动估计算法和架构.该算法改进多级顺序排除算法(MSEA),将不同模式的块分为相同数量的子块,去除流程分支使数据流规则而有利于硬件实现,使其适用于H.264的可变块大小与分数像素精度的运动补偿预测.实验证明,该算法在提高搜索效率的前提下仍能保持优良的性能.     

H.264 motion estimation algorithm based on video sequences activity

Motion estimation is an important part of H.264/AVC encoding progress, with high computational complexity. Therefore, it is quite necessary to find a fast motion estimation algorithm for real-time applications. The algorithm proposed in this letter adjudges the macroblocks activity degree first; then classifies different video sequences, and applies different search strategies according to the result. Experiments show that this method obtains almost the same video quality with the Full Search （FS） algorithm but with reduced more than 95% computation cost.     

基于H.264/AVC的视频信息隐藏算法

在H.264/AVC的帧内预测环节,调制H.264/AVC编码中I帧4×4亮度块的帧内预测模式实现信息隐藏.这种调制基于该模式与待隐藏比特之间的映射规则进行.宿主4×4块的具体位置由各块自身特点结合密钥所指定的嵌入位置模板确定.信息的提取过程不需要原始视频内容,也不需完全解码,而只要对码流中的帧内预测模式进行解码即可.     

Adaptive Scanning for H.264/AVC Intra Coding

In this letter, an adaptive scanning that improves intra coding efficiency in the H.264/AVC standard is proposed. The proposed adaptive scanning utilizes the prediction directions (modes) that include the horizontal and vertical edge information in a block. Depending on the prediction directions, the proposed method uses three scanning methods: zigzag scanning, horizontal scanning, and vertical scanning. In the proposed method, horizontal and vertical scanning are used in vertical and horizontal prediction modes, respectively, and the normal zigzag scanning in the H.264 standard is used in all other intra prediction modes. The proposed method reduces the bit rate by approximately 2.5% compared with H.264/AVC, without the degradation of video quality.     

H.264解码器中一种新颖的去块效应滤波器设计

在此完成了H.264/AVC解码器中高效低功耗的去块效应滤波器设计.该设计采用5阶流水线技术,配合混合边界滤波顺序与打乱次序的存储数据更新机制,解决了数据与结构冒险问题,因此获得了正常流水线操作中的0延迟,使得基于流水线的设计架构得到最大程度的实现,同时提高了系统吞吐量并降低了功耗.该设计在FPGA芯片上验证的工作频率上限大约为200 MHz,吞吐量为滤波单个宏块需要198个时钟周期.使用0.18μmCMOS工艺,Synopsys Co.的DC工具对滤波器模块进行综合,结果为时序收敛,功耗约为2μW.仿真结果显示,可以对QCIF标准的视频(60 f/s)进行实时环路滤波,该环路滤波器可以用于H.264/Avc实时解码器中.     

A new distortion measure for motion estimation in motion-compensated hybrid video coding

In the video coding standards MPEG-x and H.26x, a motion-compensated prediction technique is used for enhancing the coding performance of bitrate reduction or peak signal to noise ratio (PSNR) improvement. This technique takes advantage of the correlation between consecutive frames in the time domain, which is relatively higher than that between adjacent blocks in the spatial domain. In order to utilize the correlation between consecutive frames, the conventional video coding standards have used the motion estimation (ME) and compensation technique, where the Sum of the Absolute Differences (SAD) is usually used as the distortion measure. The ME estimates the reference block that could minimize the residual signal between the current and reference blocks. However, the SAD is not appropriate to the specific sequences that have global or local illumination changes. In addition, the high-resolution video sequences have higher spatial correlation than the low-resolution video sequences in general. Therefore, a new distortion measure that can consider spatial and temporal correlation simultaneously may be helpful to enhance the coding performance. The proposed distortion measure searches for a reference block that minimizes the motion-compensated residual signal when the DC-component is predicted. In our proposed algorithm, the maximum BD-rate improvement is up to 13.6% for illumination-changed video sequences, and the average BD-rate improvement is 6.6% for various high-resolution video sequences in the baseline profile.     

一种基于H.264/AVC的快速运动估计算法

针对H．264／AVC视频编码标准中的多种块模式运动估计特点,提出了一种新的运动估计算法。该算法包括整像素和亚像素搜索的非对称混合菱形网格搜索法（UDiamondGS,unsymmetrical diamond grading integer pixel search）和分层的矢量偏移算法（HVBFDS,hierarchical vector biased fractional pixel search）,通过同Joint Video Team（JVT）提供的JM85进行验证和比较表明,该算法在保持编码器原有的失真度特性的同时,可显著提高编码器编码速度16～20倍。     

视频编码H.264/AVC新技术及其优化

本文详细介绍了视频编码新标准H.264/AVC中的运动估计和运动补偿、预测、证书变换、量化、熵编码环路滤波、帧切换等技术及其优化设计.     

Alternating asymmetric search range assignment for bidirectional motion estimation in H.265/HEVC and H.264/AVC

Bidirectional motion estimation (ME) significantly enhances video coding efficiency, whereas its huge complexity is also a critical problem for implementation. This paper presents alternating asymmetric search range assignment (AASRA) schemes to reduce the complexity by switching the use of a large and a small search ranges (SR.L and SR.S). A temporal AASRA (T-AASRA) scheme performs search range switching between past and future reference directions. A temporal-spatial AASRA (TS-AASRA) scheme performs more aggressive switching on the two dimensions of reference direction and MB/CTB index. T-AASRA and TS-AASRA achieve 43.5% and 65.2% complexity reduction, respectively, with small coding efficiency drop. Even after removing the factor of coding efficiency drop, the two schemes still show 38.4% and 54.7% equivalent complexity reduction. AASRA can also be combined with existing fast algorithms for further complexity saving, which has been demonstrated on hierarchical ME and dynamic search range selection algorithms.     

H.264 CABAC加速器的设计

H.264主要档次采用的CABAC熵编码技术在提高视频压缩比率的同时,严重增加了编/解码的计算复杂度,嵌入式系统由于其低成本低功耗的要求,需要专用硬件加速器来进行CABAC编/解码。设计了一个高性能H.264 CABAC硬件加速器,该加速器可配置为编码或解码模式,高效地实现CABAC编/解码操作。通过性能评估实验,在220 MHz时钟频率下,该加速器能够实现平均147 Mbps(1.5 cycle/bit)的编码速度和220 Mbps(1 cycle/bit)的解码速度。与软件实现相比,加速器获得50倍以上的性能提升。     

H.264基本档次码流解析的专用处理器设计

针对解析H.264基本档次码流提出一种专用处理器的设计方案,它采用软/硬件联合设计的方法.使硬件电路解码模块可实现每个时钟周期从码流中解析出1个码字的处理速度,比采用树形结构的纯软件方案提高了50倍.