Threshold voltage model for deep-submicrometer fully depleted SOIMOSFET's

The threshold voltage, V_th, of fully depleted silicon-on-insulator (FDSOI) MOSFET with effective channel lengths down to the deep-submicrometer range has been investigated. We use a simple quasi-two-dimensional model to describe the V_th roll-off and drain voltage dependence. The shift in threshold voltage is similar to that in the bulk. However, threshold voltage roll-off in FDSOI is less than that in the bulk for the same effective channel length, as predicted by a shorter characteristic length l in FDSOI. Furthermore, ΔV_th is independent of back-gate bias in FDSOI MOSFET. The proposed model retains accuracy because it does not assume a priori charge partitioning or constant surface potential. Also it is simple in functional form and hence computationally efficient. Using our model, V _th design space for Deep-Submicrometer FDSOI MOSFET is obtained. Excellent correlation between the predicted V_th design space and previously reported two-dimensional numerical simulations using MINIMOS5 is obtained     

Improved small-signal equivalent circuit model and large-signalstate equations for the MOSFET/MODFET wave equation

A simple non-quasi-static small-signal equivalent circuit model is derived for the ideal MOSFET wave equation under the gradual channel approximation. This equivalent circuit represents each Y-parameter by its DC small-signal value shunted by a (trans) capacitor in series with a charging (trans) resistor. A large-signal model for the intrinsic MOSFET is derived by first implementing this RC topology in the time domain. Modified state equations are then introduced to enforce charge conservation. Transient simulations with this approximate large-signal model yield results that are compared with reported exact numerical analysis for the long channel MOSFET for a wide range of bias conditions. This unified small- and large-signal model applies to both the three- and four-terminal intrinsic MOSFET in the region of the channel where the gradual channel approximation is applicable. A non-quasi-static small-signal equivalent circuit for the velocity-saturated MOSFET wave equation is also reported     

High-accuracy physical modeling of submicrometer MOSFET's

When short-channel MOSFET transistor models are compared to experimental data, the uncertainty in some of the physical input variables often requires that some of the input variables be adjusted to fit the data. This uncertainty is increased by a lack of knowledge of process sensitivity information on critical parameters. These uncertainties have been eliminated using a two-dimensional finite-element model of a MOSFET with no free parameters. The model is compared to four self-aligned silicon-gate n-channel MOSFET's with channel lengths of 0.80, 1.83, 2.19, and 8.17 µm. The 0.80, 1.83, and 8.17-µm devices have phosphorus sources and drains. The 2.19-µm device has an arsenic source and drain. These devices span the range of channel lengths from a short-channel device, totally dominated by velocity saturation and source-drain profile shape, to a long-channel device, well characterized by a long-channel model. Using the data obtained from the measurements described in this work, it is possible to model the drain current for all of the transistors studied without adjustable parameters. Transistors with 0.80-µm channel length differ in model input from those with 8.17-µm channel length only in the length of the polysilicon gate. If sufficiently accurate parameters are available, these methods allow the characteristics of submicrometer transistors to be predicted with ±5-percent accuracy. These simulations show that the observed short-channel effects can be accounted for by existing mobility data and a simple empirical model of these data. Triode and saturation effects are dominated by two-dimensional drain field penetration of the channel region. Subthreshold effects are caused by distortion of fields in the entire channel region by the drain field.     

MOSFET effective channel length, threshold voltage, and seriesresistance determination by robust optimization

MOSFET parameters, such as effective channel length, series resistance, and channel mobility, are important for process control and device design. These parameters are typically obtained from intercepts and slopes of plots of intermediate quantities, such as peak transconductance, derived from I-V data. Commonly, the intercept of a plot is found by extrapolation. However, the extrapolation process is sensitive to measurement errors. In addition, the plots often show nonlinear behavior, hence slopes and intercepts cannot be determined accurately. It is shown how these problems can be overcome by using a nonlinear optimization procedure to determine those MOSFET parameters, by explicitly identifying them as the parameters of a simple, widely used MOSFET model that is a good approximation in the triode region of operation. The results of five tests of robustness and accuracy that show that the method is significantly more accurate and robust than a number of other methods are presented     

Channel length independent subthreshold characteristics insubmicron MOSFETs

This work reports an anomalous subthreshold characteristic of the MOSFET for the first time. It is observed that the subthreshold characteristic does not change as the channel length decreases. The cause of channel length independent subthreshold characteristics is identified as the localized pileup of channel dopants near the source and drain ends of the channel. The low surface potential of this pileup region limits the subthreshold current of MOSFET. As a result, the ratio of on-current to off-current for this MOSFET increases as the channel length is reduced, which is an important parameter for low-voltage operation. It is found that a MOSFET with channel length independent subthreshold characteristic is more suitable for low-voltage operation     

Unified MOSFET Short Channel Factor Using Variational Method

It is well known that short channel effect is one of the most important constraints that determine the downscaling of MOSFET's.The relationship between the device structure configuration and short channel effect is first expressed empirically in Ref.[1].And recently,due to...     

Unified MOSFET Short Channel Factor Using Variational Method

A new natural gate length scale for MOSFET's is presented using Variational Method. Comparison of the short channel effects is conducted for the uniform channel doping bulk MOSFET, intrinsic channel doping bulk MOSFET, SOI MOSFET and double gated MOSFET. And the results are verified by the 2D numerical simulation. Taken all the 2-D effects on front gate dielectric, back gate dielectric and silicon film into account, the data validity of electrical equivalent oxide thickness is investigated by this model, as shows that it is valid only when the gate dielectric constant is relatively small.     

A simple and continuous MOSFET model

A simple CAD model is proposed for the short-channel enhancement-mode MOSFET. The conventional use of drain bias modulation of channel length to describe saturation characteristics has been discarded and replaced by drain bias enhancement of channel velocity. The model possesses continuity of current, transconductance and output conductance throughout the triode, and saturation ranges of operation. It has been tested against experimental transistors and against two-dimensional numerically simulated transistors, and has given satisfactory results in all cases. The model is based on good physics, is easy to understand, is straightforward to use, and is computationally efficient.     

一种深亚微米MOSFET高频噪声模型

基于深亚微米MOSFET的短沟道效应(迁移率退化、热载流子效应、体电荷效应、沟道长度调制效应等),提出了一种高频沟道噪声分析模型.该分析模型不仅具有较高的精确性,而且只包括MOSFET的工艺参数和电学参数,不含有微积分和拟合参数,较大地提高了MOSFET高频噪声模型的易用性.根据MOSFET的高频等效电路,得出了MOSFET的噪声系数模型.实验结果证明,提出的深亚微米MOSFET高频噪声模型的仿真结果与测试结果的平均误差不到0.4 dB,并与其他高频沟道噪声分析模型进行了比较.     

一种耗尽型短沟道MOS器件阈电压模型

本文研究了耗尽型MOS器件的短沟道效应,把Yau的电荷分配理论推广到耗尽型器件,并作了适当修正。提出一种简单而精确的耗尽型短沟道MOS器件阈电压分析模型,与实验数据吻合良好。该模型可以应用于这类器件及电路的CAD。     

Simple model for the saturation voltage and current of submicron MOSFETs

A simple but reasonably accurate model is presented for the saturation voltage and current of submicron MOSFETs in strong inversion. Relevant device physics such as the effects of short channel, narrow channel, and the voltage drop along the channel caused by the drain voltage are accounted for in a first-order manner. The conventional model is also derived from the present model by employing several approximations. It is shown that the present model compares more favourably with PISCES device simulation results and that the conventional model can overestimate the saturation I-V characteristics by about 30% for a typical submicron MOSFET. We further suggest that the error caused by the conventional model is smaller for a MOSFET having a shorter channel, a wider channel, or/and a lower impurity doping concentration.     

An analytic and accurate model for the threshold voltage of short channel MOSFETs in VLSI

Based on the two-dimensional Poisson equation, the surface potential distribution along the surface channel of a MOSFET has been analytically derived by assuming negligible source and drain junction depths and its minimum potential is then used to determine the threshold voltage. The existence of a minimum surface potential point along the channel of a MOSFET under an applied drain bias is consistent with the numerical results of the two-dimensional analysis. The effects of finite source and drain junction depths have been elegantly included by modifying the depletion capacitance under the gate and the resulted threshold voltage model has been compared to the results of the two-dimensional numerical analysis. It has been shown that excellent agreement between these results has been obtained for wide ranges of substrate doping, gate oxide thickness, channel length (< 1 μm), substrate bias, and drain voltage. Moreover, comparisons between the developed model and the existing experimental data have been made and good agreement has been obtained. The major advantages of the developed model are that no iterations and no adjustable fitting parameters are required. Therefore, this simple and accurate threshold voltage model will become a useful design tool for ultra short channel MOSFETs in future VLSI implementation.     

Threshold and subthreshold characteristics theory for a very small buried-channel mosfet using a majority-carrier distribution model

Simple expressions of threshold and subthreshold characteristics for a very small buried-channel MOSFET is derived from a model of majority-carrier distribution along the channel. The carrier distribution is determined from the Poisson equation for a high-low junction. The basic formula for the subthreshold characteristic is derived from the majority-carrier drift-current equation. The theory is compared with the measured threshold voltages and the measured inverse semilogarithmic slopes of subthreshold current. The theoretical curves are in a reasonable agreement with experimental results. It is shown for a buried-channel MOSFET having a channel length less than 1 μm that the threshold and subthreshold characteristics change abruptly as the channel length is reduced because the majority-carrier concentration increases through the carrier diffusion from the source and drain terminals. The theoretical estimation shows that buried-channel MOSFETs will have the less short-channel effect than surface-channel MOSFETs for a small drain voltage. The theory also predicts that the buried-channel MOSFET can be scaled down in the same way as the surface-channel MOSFET.     

A new approach to threshold voltage modelling of short-channel MOSFETS

A simple analytical model has been developed to predict the threshold voltage on drain bias dependence of an arbitrarily doped short-channel MOSFET. Based on an analytical solution of the two-dimensional Poisson equation, the potential distribution in the channel depletion region has been derived. The maximum surface field and the minimum surface potential are used to determine the threshold voltage. The influence of drain voltage on threshold voltage has been included by an equivalent shrinkage of the virtual channel length hereafter called “voltage-length transformation”. This simple but general procedure enables us to account for the drain effect and to extend other threshold voltage models derived under assumption of low drain-source voltage. Predictions for threshold voltage have been compared with results of two-dimensional numerical analysis and experimental data. The comparison has been made for a wide variety of doping profiles, channel length, substrate and drain bias, gate oxide thickness and junction depth. Excellent agreement has been obtained down to submicron channel length.     

Source-to-drain nonuniformly doped channel (NUDC) MOSFET structuresfor high current drivability and threshold voltage controllability

The source-to-drain nonuniformly doped channel (NUDC) MOSFET has been investigated to improve the aggravation of the V_th lowering characteristics and to prevent the degradation of the current drivability. The basic concept is to change the impurity ions to control the threshold voltage, which are doped uniformly along the channel in the conventional channel MOSFET, to a nonuniform profile of concentration. The MOSFET was fabricated by using the oblique rotating ion implantation technique. As a result, the V_th lowering at 0.4-μm gate length of the NUDC MOSFET is drastically suppressed both in the linear region and in the saturation region as compared with that of the conventional channel MOSFET. Also, the maximum carrier mobility at 0.4-μm gate length is improved by about 20.0%. Furthermore, the drain current is increased by about 20.0% at 0.4-μm gate length     

An effective channel length determination method for LDD MOSFETs

We propose a definition of MOSFET effective channel length (L_EFF), that provides a method of determining L_EFF as a constant, and external resistance (R_EXT) virtually as a constant, even for lightly doped drain (LDD) transistors. A unified relationship between this L_EFF and MOSFET drive current (linear and saturation) that is common to a wide range of drain structures was confirmed. Therefore, the L_EFF is useful, not only for compact analytical models, but also as an index of MOSFET performance applicable to both single drain and LDD devices. The dependence of the channel length on the source/drain structure was clarified by introducing the concept of local contribution to channel length. The L_EFF varies, even if the metallurgical channel length is fixed, depending on the design of the source/drain     

SPICE model and parameters for fully-depleted SOI MOSFET'sincluding self-heating

A simple methodology to accurately extract constant temperature model parameters from static measurements of fully-depleted SOI MOSFET current-voltage characteristics is demonstrated. Self-heating is included in an existing physically-based, short-channel bulk MOSFET model, PCIM, by allowing the temperature to change linearly with power dissipation at each bias point. Only a simple modification of the channel bulk charge in PCIM is necessary to adapt it for SOI. The temperature dependence of the physical parameters (mobility, flatband voltage, and saturation velocity) are also fitted and included in the model. Excellent fit to experimental fully-depleted SOI data is shown over a large range of bias conditions and channel lengths. Once the static SOI data is fitted, the constant temperature model parameters appropriate for circuit simulation are easily extracted     

Generalized guide for MOSFET miniaturization

As MOSFET dimensions are reduced, lower voltages, shallower junctions, thinner oxides, and heavier doping help to maintain long-channel behavior. A simple, empirical relation has been found between these parameters and the minimum channel length for which long-channel subthreshold behavior will be observed. This approximate relation provides an estimate for MOSFET parameters not requiring reduction of all dimensions by the same scale factor.     

Semi-empirical model for the threshold voltage of a double implanted MOSFET and its temperature dependence

A simple and accurate semi-empirical model for the threshold voltage of a small geometry double implanted enhancement type MOSFET, especially useful in a circuit simulation program like SPICE, has been developed. The effect of short channel length and narrow width on the threshold voltage has been taken into account through a geometrical approximation, which involves parameters whose values can be determined from the curve fitting experimental data. A model for the temperature dependence of the threshold voltage for the implanted devices has also been presented. The temperature coefficient of the threshold voltage was found to change with decreasing channel length and width. Experimental results from various device sizes, both short and narrow, show very good agreement with the model. The model has been implemented in SPICE as a part of the complete d.c. model.     

Channel length dependence of random telegraph signal in sub-micronMOSFET's

The channel length dependence of the random telegraph signal (RTS) in a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) has been investigated both theoretically and experimentally. The key result is that, for a given surface potential, the RTS amplitude is proportional to 1/L², where L is the channel length, provided the contribution of the mobility fluctuation is much smaller than that of the carrier number fluctuation. A special test structure, consisting of a series combination of MOSFET's, is used to experimentally determine this channel length dependence, and good agreement with our simple theory is obtained