Inkjet-Printed High Mobility Transparent–Oxide Semiconductors

In this paper, we report a general and low-cost process to fabricate high mobility metal–oxide semiconductors that is suitable for thin-film electronics. This process use simple metal halide precursors dissolved in an organic solvent and is capable of forming uniform and continuous thin films via inkjet-printing or spin-coating process. This process has been demonstrated to deposit a variety of semiconducting metal oxides include binary oxides (${hbox{ZnO}}, {hbox{In}}_{2}{hbox{O}}_{3}$ , ${hbox{SnO}}_{2}$ , ${hbox{Ga}}_{2}{hbox{O}}_{3}$ ), ternary oxides (ZIO, ITO, ZTO, IGO) and quaternary compounds (IZTO, IGZO). Functional thin film transistors with high field-effect mobility were fabricated successfully using channel layers deposited from this process. This synthetic pathway opens an avenue to form patterned metal oxide semiconductors through a simple and low-cost process and to fabricate high performance transparent thin film electronics via digital fabrication processes on large substrates.      

Electromigration Studies of Cu/Carbon Nanotube Composite Interconnects Using Blech Structure

The electromigration (EM) properties of pure Cu and Cu/carbon nanotube (CNT) composites were studied using the Blech test structure. Pure Cu and Cu/CNT composite segments were subjected to a current density of $hbox{1.2} times hbox{10}^{6} hbox{A/cm}^{2}$. The average void growth rate of Cu/CNT composite sample was measured to be around four times lower than that of the pure copper sample. The average critical current-density–length threshold products of the pure Cu and Cu/CNT composites were estimated to be 1800 and 5400 A/cm, respectively. The slower EM rate of the Cu/CNT composite stripes is attributed to the presence of CNT, which acts as trapping centers and causes a decrease in the diffusion of EM-induced migrating atoms.      

Effect of the Phase Shift in a Periodic Anode on the Emission Spectra of Top-Emitting Organic Light-Emitting Diodes

Top-emitting organic light-emitting diodes with an Al–Ag cathode and $hbox{Al}+(hbox{Ni}hbox{–}hbox{Au})_{n}$ anode were proposed and fabricated. The multiple layered anode results in a phase shift at the metal interfaces. It was also found that theoretically calculated peak wavelengths of the intensity spectra agree well with those experimentally measured from the fabricated devices. These results also indicate that the phase shift effect in periodic anode is important for microcavity devices.      

Low-Temperature-Processed Inorganic Gate Dielectrics for Plastic-Substrate-Based Organic Field-Effect Transistors

Low-temperature-processed inorganic gate dielectrics were employed here to yield high-performance organic field-effect transistors (FETs) on flexible plastic substrates. $hbox{SiN}_{x}$ dielectrics deposited at room temperature and $hbox{SiN}_{x}$ /sol–gel silica dielectric bilayer processed below 100 $^{ circ}hbox{C}$ were demonstrated to be viable gate dielectric materials, with the latter yielding effective field-effect mobilities of $sim!!hbox{1} hbox{cm}^{2}/hbox{V} cdothbox{s}$ at operating voltages of under $-$ 5 V with an on–off current ratio in the range of $hbox{10}^{5}$ . The enhancement in device performance was attributed to an improved semiconductor–dielectric interface and a larger grain size of the pentacene deposited on the bilayer dielectrics. The flexibility of FETs fabricated on polyester substrates was also demonstrated with insignificant changes in device performance upon subjecting the devices to strains of 2.27%.      

Very High-Temperature Joints Between Si and Ag–Copper Substrate Made at Low Temperature Using InAg System

We present a fluxless bonding process between silicon and Ag–copper dual-layer substrate using electroplated indium/silver solder. The nucleation mechanism of In plated over Ag layer is first investigated. It is interesting to discover that In atoms react with underlying Ag to from ${hbox {AgIn}}_{2}$ compound layer during electroplating. A novel Ag laminating technique on Cu substrates is developed. The Ag cladding functions as a strain buffer to manage the large mismatch in coefficient of thermal expansion (CTE) between semiconductors such as Si (3 ${hbox {ppm}}/^{circ}{hbox {C}}$) and Cu (17 ${hbox {ppm}}/^{circ}{hbox {C}}$) substrates. To bond Si chips to the Ag layer on copper substrates, In-based alloy (InAg) is used. A fluxless bonding process is developed between Si/Cr/Au/Ag and Cu/Ag/In/Ag. The process is performed in 50-militorr vacuum to suppress solder oxidation. No flux is used. The resulting joints consist of three distinct layers of Ag, ${hbox {Ag}}_{2}{hbox {In}}$ and Ag. Microstructure and composition of the joints are examined using scanning electron microscope (SEM) with energy dispersive X-ray spectroscopy (EDX). Bonded samples are further annealed to convert the ${hbox {Ag}}_{2}{hbox {In}}$ phase into solid solution phase (Ag). The joint has a melting temperature above 850 $^{circ}{hbox {C}}$. This technique presents our success in overcoming the very large CTE mismatch between silicon and copper. It can be applied to mounting numerous high-power silicon devices to Cu substrates for various industrial applications.      

Fabrication and Characterization of Carbon Nanotubes Integrated on Field-Emission Diode

Carbon nanotubes (CNTs) deposited by electrophoresis on a free-standing thin metal film edge are demonstrated. These CNTs act as electron field emitter which was integrated on the cathode of the field-emission vacuum diode. This diode exhibits a low reverse leakage current $(≪ hbox{10}^{-11} hbox{A})$ with high on-off ratio of $hbox{10}^{6}$ . Owing to the low turn-on voltage of the nanosized CNTs, the field-emission diode exhibited less power consumption compared with the conventional vacuum-tube diode. Electronic tests of this vacuum diode perform its fast switching speed ability and high voltage rectification. This approach presents a route to use nanomaterials with a microelectromechanical system process to develop high-speed vacuum microelectronics.      

Improved Stress Reliability of Analog Metal–Insulator–Metal Capacitors Using $hbox{TiO}_{2}/hbox{ZrO}_{2}$ Dielectrics

We have studied the stress reliability of high-$kappa$ $hbox{Ni/TiO}_{2}/hbox{ZrO}_{2}/hbox{TiN}$ metal–insulator–metal capacitors under constant-voltage stress. The increasing $hbox{TiO}_{2}$ thickness on $hbox{ZrO}_{2}$ improves the 125-$^{circ}hbox{C}$ leakage current, capacitance variation $(Delta C/C)$, and long-term reliability. For a high density of 26 $hbox{fF}/mu hbox{m}^{2}$ , good extrapolated ten-year reliability of small $Delta C/ break C sim hbox{0.71}%$ is obtained for the $ hbox{Ni/10-nm-}hbox{TiO}_{2}/hbox{6.5-nm-} hbox{ZrO}_{2}/break hbox{TiN}$ device at 2.5-V operation.      

High-Performance Al–Sn–Zn–In–O Thin-Film Transistors: Impact of Passivation Layer on Device Stability

We fabricated high-performance thin-film transistors (TFTs) with an amorphous-Al–Sn–Zn–In–O (a-AT-ZIO) channel deposited by cosputtering using a dual Al–Zn–O and In–Sn–O target. The fabricated AT-ZIO TFTs, which feature a bottom-gate and bottom-contact configuration, exhibited a high field-effect mobility of 31.9 $ hbox{cm}^{2}/hbox{V}cdothbox{s}$, an excellent subthreshold gate swing of 0.07 V/decade, and a high $I_{{rm on}/{rm off}}$ ratio of $≫hbox{10}^{9}$, even below the process temperature of 250 $^{circ}hbox{C}$. In addition, we demonstrated that the temperature and bias-induced stability of the bottom-gate TFT structure can significantly be improved by adopting a suitable passivation layer of atomic-layer-deposition-derived $hbox{Al}_{2} hbox{O}_{3}$ thin film.      

Flexible Full-Color AMOLED on Ultrathin Metal Foil

Full-color active-matrix organic light-emitting diode panels, driven by poly-Si thin-film transistors (poly-Si TFTs), were successfully fabricated on thin metal foil substrates. The p-channel poly-Si TFTs on metal foil showed a field-effect mobility of 82.9 $hbox{cm}^{2}/hbox{V}cdothbox{s}$ , subthreshold slope of 0.34 V/dec, threshold voltage of $-$ 1.67 V, and off-current of $ hbox{6.6} times hbox{10}^{-14} hbox{A}/muhbox{m}$. The 5.6-in panel had 160 $times$ RGB $times$ 350 pixels, each of which had a pixel circuit of two TFTs and one capacitor.      

AlGaN/GaN HEMT High Power Densities on $hbox{SiC/} hbox{SiO}_{2}$/poly-SiC Substrates

In this letter, successful operation at 10 GHz of T-gate HEMTs on epitaxial structures grown by metal–organic chemical vapor deposition (MOCVD) or MBE on composite substrates is demonstrated. The used device fabrication process is very similar to the process used on monocrystalline SiC substrate. High power density was measured on both epimaterials at 10 GHz. The best value is an output power density of 5.06 W/mm associated to a power-added efficiency (PAE) of 34.7% and a linear gain of 11.8 dB at $V_{rm DS} = hbox{30} hbox{V}$ for the components based on MOCVD-grown material. The output power density is 3.58 W/mm with a maximum PAE of 25% and a linear gain around 15 dB at $V_{rm DS} = hbox{40} hbox{V}$ for the MBE-grown material.      

Study of the Superconducting and Thermal Properties of ex situ GlidCop-Sheathed Practical $hbox{MgB}_{2}$ Conductors

In dc and ac practical applications of $hbox{MgB}_{2}$ superconducting wires, an important role is represented by the material sheath that has to provide, among other things, a suitable electrical and thermal stabilization. One way to obtain a large-enough amount of low-resistivity material into the conductor architecture is to use it as the external sheath. In this paper, we study ex situ multifilamentary $ hbox{MgB}_{2}$ wires fabricated with oxide-dispersion-strengthened copper (GlidCop) as the external sheath in order to reach a good compromise between critical current density and thermal properties. We prepared three GlidCop samples with different contents of dispersed submicroscopic $ hbox{Al}_{2}hbox{O}_{3}$ particles. We characterized the superconducting and thermal properties, and we showed that the good thermal conductivity, together with the good mechanical properties and a reasonable critical current density, makes the GlidCop composite wire a useful conductor for applications where high thermal conductivity is required at temperatures above 30 K, such as superconducting fault-current limiters.      

Forming Gas Annealing Characteristics of Germanium-on-Insulator Substrates

Large-area layer transfer of germanium-on-insulator (GeOI) substrates has been fabricated by ion-cut processes. Pseudo-MOSFET structure was employed to characterize interface trap density, interface fixed charge density, interface carrier mobility, and bulk carrier mobility of these GeOI substrates with various annealing conditions in forming gas ambient. High-temperature annealing in the vicinity of 500 $^{circ}hbox{C}$–600 $^{circ}hbox{C}$ has shown the best carrier mobilities, with the interface trap density and the interface fixed charge density as low as $hbox{10}^{10} hbox{q/cm}^{2}$. The extracted bulk hole mobility of the annealed GeOI is near 500 $hbox{cm}^{2}/( hbox{V} cdot hbox{s})$, which is higher than that of silicon [300 $hbox{cm}^{2}/(hbox{V} cdot hbox{s})$] at the same doping concentration level.      

High-Density and Low-Leakage-Current MIM Capacitor Using Stacked $hbox{TiO}_{2}/hbox{ZrO}_{2}$ Insulators

We have fabricated high-$kappa hbox{Ni}/hbox{TiO}_{2}/hbox{ZrO}_{2}/ hbox{TiN}$ metal–insulator–metal (MIM) capacitors. A low leakage current of $hbox{8} times hbox{10}^{-8} hbox{A/cm}^{2}$ at 125 $^{circ}hbox{C}$ was obtained with a high 38- $hbox{fF}/muhbox{m}^{2}$ capacitance density and better than the $hbox{ZrO}_{2}$ MIM capacitors. The excellent device performance is due to the lower electric field in 9.5-nm-thick $hbox{TiO}_{2}/ hbox{ZrO}_{2}$ devices to decrease the leakage current and to a higher $kappa$ value of 58 for $ hbox{TiO}_{2}$ as compared with that of $hbox{ZrO}_{2}$ to preserve the high capacitance density.      

High-Frequency ZnO Thin-Film Transistors on Si Substrates

Record microwave frequency performance was achieved with nanocrystalline ZnO thin-film transistors fabricated on Si substrates. Devices with 1.2-$muhbox{m}$ gate lengths and Au-based gate metals had current and power gain cutoff frequencies of $f_{T} = hbox{2.45} hbox{GHz}$ and $f_{max} = hbox{7.45} hbox{GHz}$ , respectively. Same devices had drain–current on/off ratios of $hbox{5} times hbox{10}^{10}$, exhibited no hysteresis effects and could be operated at a current density of 348 mA/mm. The microwave performances of devices with 1.2- and 2.1- $muhbox{m}$ gate lengths and 50- and 100-$muhbox{m}$ gate widths were compared.      

Bandgap-Engineered Ga-Rich GaZnO Thin Films for UV Transparent Electronics

Ga-rich GaZnO thin films were prepared by metal–organic chemical vapor deposition. The optical bandgap of GaZnO films can be engineered from 3.3 to 4.9 eV by varying the Ga content. The film is amorphortized and the resistivity increases with an increase of Ga content. The Ga-rich GaZnO alloy with lower resistivity is investigated as a UV transparent conductor, while the semi-insulating Ga-rich GaZnO film with high transparency at 280–900 nm is employed as the channel layer to fabricate deep UV transparent thin-film transistor. The transistor shows a typical n-channel field-effect characteristic with a current on/off ratio of $hbox{10}^{4}$–$ hbox{10}^{5}$, a threshold voltage of $sim$42 V, a saturated field-effect mobility of $sim!hbox{0.06} hbox{cm}^{2} cdot hbox{V}^{-1} cdot hbox{s}^{-1}$, and a subthreshold swing of $ sim!hbox{7.7} hbox{V} cdot hbox{decade}^{-1}$.      

Active Matrix OTFT Display With Anodized Gate Dielectric

A complete process for an active-matrix (AM) organic thin-film transistor (OTFT) polymer dispersed liquid crystal (PDLC) display is presented. Evaporated pentacene is used as semiconductor. The display comprises 64$times$64 pixel, each with a pixel pitch of $({hbox{312.5}} times {hbox{312.5}}) mu{hbox{m}}^2$. The AM display is fabricated with standard photolithographic processes. Since all process temperatures are below 180$^{circ}$C the processes for the AM backplane can be easily transferred to plastic substrates like PEN or PET. Due to the thin anodically oxidized ${hbox{Al}}_2$ ${hbox{O}}_3$ gate dielectric with a thickness of 60 nm and $varepsilon_{rm r}=9$, driving voltages between 10 and 12 V are sufficient. To protect the pentacene against the PDLC, it is encapsulated with sputtered ${hbox{Ta}}_2 {hbox{O}}_5$ layer. After the passivation a field effect mobility of 0.2 ${hbox{cm}}^{2}/{hbox{V}}cdot{hbox{s}}$ is obtained for the OTFTs.      

Fast PEALD ZnO Thin-Film Transistor Circuits

We report stable high-mobility ZnO thin-film transistors (TFTs) and fast circuits fabricated using a novel weak reactant plasma-enhanced atomic layer deposition (PEALD) process. This PEALD process is a highly scalable manufacturable process and is a faster and simpler alternative to conventional atomic layer deposition. Using PEALD, we have deposited highly crystalline (002) textured ZnO thin films at a low temperature (200 $^{circ}hbox{C}$). Using PEALD ZnO films, we have fabricated high-mobility TFTs (20–30 $hbox{cm}^{2}/hbox{V} cdot hbox{s}$ ), which have $≪$100-mV threshold voltage shifts after bias stress at 80 $^{circ}hbox{C}$ for 20 000 s. Using these high-performance TFTs, we have also fabricated simple 15-stage ring oscillator circuits with a propagation delay of 22 ns/stage for a supply voltage of 16 V, which, to the best of our knowledge, are the fastest ZnO TFT circuits reported to date.      

Test Structures for the Characterization of MEMS and CMOS Integration Technology

Test structures have been used to study the feasibility of bonding MEMS to CMOS wafers to create an integrated system. This involves bonding of prefabricated wafers and creating interconnects between the bonded wafers. Bonding of prefabricated wafers has been demonstrated using a chemical–mechanical polishing enabled surface planarization process and an oxygen plasma assisted low temperature wafer bonding process. Two interwafer connection approaches have been evaluated. For an oxide bonding approach, interconnects between wafers are established through contact vias, using a standard multilevel metallization process after the wafer bonding process. Resistances of 3.8–5.2 $Omega $ have been obtained from via chain test structures and an average specific contact resistivity of 1.7$,times ,$10$^{-8} Omega {hbox{cm}}^{2}$ , measured from the single via Kelvin structures. For a direct metal contact approach, electrical connections have been achieved during the bonding anneal stage due to stress relief of the aluminium film.      

High-Performance Metal/High-$k$ n- and p-MOSFETs With Top-Cut Dual Stress Liners Using Gate-Last Damascene Process on (100) Substrates

Newly proposed mobility-booster technologies are demonstrated for metal/high- $k$ gate-stack n- and pMOSFETs. The process combination of top-cut SiN dual stress liners and damascene gates remarkably enhances local channel stress particularly for shorter gate lengths in comparison with a conventional gate-first process. Dummy gate removal in the damascene gate process induces high channel stress, because of the elimination of reaction force from the dummy gate. PFETs with top-cut compressive stress liners and embedded SiGe source/drains are performed by using atomic layer deposition TiN/$ hbox{HfO}_{2}$ gate stacks with $T_{rm inv} = hbox{1.4} hbox{nm}$ on (100) substrates. On the other hand, nFETs with top-cut tensile stress liners are obtained by using $hbox{HfSi}_{x}/hbox{HfO}_{2}$ gate stacks with $T_{rm inv} = hbox{1.4} hbox{nm}$. High-performance n- and pFETs are achieved with $I_{rm on} = hbox{1300}$ and 1000 $muhbox{A}/muhbox{m} hbox{at} I_{rm off} = hbox{100} hbox{nA}/mu hbox{m}$, $V_{rm dd} = hbox{1.0} hbox{V}$, and a gate length of 40 nm, respectively.      

ZnO Thin-Film Transistor Ring Oscillators with 31-ns Propagation Delay

We have fabricated ring oscillators (ROs) using ZnO thin films deposited by using a spatial atomic layer deposition process at atmospheric pressure and low temperature (200 $^{circ} hbox{C}$). Bottom-gate thin-film transistors with aluminum source and drain contacts were fabricated with a field-effect mobility of $≫ hbox{15} hbox{cm}^{2}/hbox{V} cdot hbox{s}$. Seven-stage ROs operated at a frequency as high as 2.3 MHz for a supply voltage of 25 V, corresponding to a propagation delay of 31 ns/stage. These circuits also had propagation delays of $sim$100 ns/stage at a supply voltage of 15 V. To the best of our knowledge, these are the fastest ZnO circuits reported to date.