Growth of tin whiskers for lead-free plated leadframe packages in high humid environments and during thermal cycling

Growth behavior of tin whiskers from pure tin and tin-bismuth plated leadframe (LF) packages for elevated temperature and high humidity storages and during thermal cycling was observed. In the storage at 60 °C/93% relative humidity (RH) and 85 °C/85%RH the galvanic corrosion occurred at the outer lead toes and shoulders where the base LF material is exposed, forming tin oxide layers of SnO₂. The corroded layers spread inside the film and formed whiskers around the corroded islands. Many whiskers were observed to grow from grain boundaries for the Fe–42Ni alloy (alloy42) LF packages. It was confirmed that the corrosion tends to occur on the side surfaces of outer leads adjacent to the mold flash. The contribution of ionic contaminants in epoxy mold compound (EMC) to the corrosion was not identified. During thermal cycling between −65 °C and +150 °C whiskers grew out of as-deposited grains for pure tin plated alloy42 LF packages and they grew linearly with an increase of number of cycle. Growth mechanisms of the whiskers from grain boundaries and as-deposited grains were discussed from the deformation mechanism map for tin and mathematical calculation with a steady-state diffusion model.     

Effect of different temperature cycling profiles on the crack initiation and propagation of Sn–3.5Ag wave soldered solder joints

Temperature cycling of a test board with different electronic components was carried out at two different temperature profiles in a single-chamber climate cabinet. The first temperature profile ranged between −55 and 100 °C and the second between 0 and 100 °C. Hole mounted components and secondary side SMD components were wave soldered with an Sn–3.5Ag alloy. Joints of both dual in line (DIL) packages and ceramic chip capacitors were investigated. Crack initiation and propagation was analysed after every 500 cycles. In total, 6500 cycles were run at both temperature profiles and the observations from each profile were compared.For both kinds of components analysed, cracks were first visible for the temperature profile ranging between −55 and 100 °C. For this temperature profile, and for DIL packages, cracks were visible already after 500 cycles, whereas for the other temperature profile, cracks initiated between 1000 and 1500 cycles. The cracks observed after 1500 cycles were visibly smaller for the temperature profile ranging between 0 and 100 °C, concluding that crack initiation and propagation was slightly slower for this temperature profile. For the chip capacitors, cracks were first visible after 2000 cycles.     

Board level reliability assessment of chip scale packages

A large program had been initiated to study the board level reliability of various types of chip scale package (CSP). The results on six different packages are reported here, which cover flex interposer CSP, rigid interposer CSP, wafer level assembly CSP, and lead frame CSP. The packages were assembled on FR4 PCBs of two different thicknesses. Temperature cycling tests from −40°C to +125°C with 15 min dwell time at the extremes were conducted to failure for all the package types. The failure criteria were established based on the pattern of electrical resistance change. The cycles to failure were analyzed using Weibull distribution function for each type of package. Selected packages were tested in the temperature/humidity chamber under 85°C/85%RH for 1000 h. Some assembled packages were tested in vibration condition as well. In all these tests, the electrical resistance of each package under testing was monitored continuously. Test samples were also cross-sectioned and analyzed under a Scanning Electronic Microscope (SEM). Different failure mechanisms were identified for various packages. It was noted that some packages failed at the solder joints while others failed inside the package, which was packaging design and process related.     

Effects of different bonding parameters on the electrical performance and peeling strengths of ACF interconnection

The effects of different bonding parameters, such as temperature, pressure, curing time, bonding temperature ramp and post-processing, on the electrical performance and the adhesive strengths of anisotropic conductive film (ACF) interconnection are investigated. The test results show that the contact resistances change slightly, but the adhesive strengths increase with the bonding temperature increased. The curing time has great influence on the adhesive strength of ACF joints. The contact resistance and adhesive strength both are improved with the bonding pressure increased, but the adhesive strengths decrease if the bonding pressure is over 0.25 MPa. The optimum temperature, pressure, and curing time ranges for ACF bonding are concluded to be at 180–200 °C, 0.15–0.2 MPa, and 18–25 s, respectively. The effects of different Teflon thickness and post-processing on the contact resistance and adhesive strength of anisotropic conductive film (ACF) joints are studied. It is shown that the contact resistance and the adhesive strength both become deteriorated with the Teflon thickness increased. The tests of different post-processing conditions show that the specimens kept in 120 °C chamber for 30 min present the best performance of the ACF joints. The thermal cycling (−40 to 125 °C) and the high temperature/humidity (85 °C, 85% RH) aging test are conducted to evaluate the reliability of the specimens with different bonding parameters. It is shown that the high temperature/humidity is the worst condition to the ACF interconnection.     

A simple moisture diffusion model for the prediction of optimal baking schedules for plastic SMD packages

The moisture concentration at the chip surface is the important parameter for the moisture sensitivity of the P-MQFP80 product considered here. When the critical moisture concentration at the die surface is reached, delamination occurs after soldering shock, e.g at 240°C. This critical moisture concentration, which can be determined by experiments conducted at 30°C/60% relative humidity (RH) followed by soldering shock, allows to predict the product’s moisture performance at other ambient conditions. In the case studied here, prediction was done at a customer use condition of 30°C/85% RH. Furthermore, this work showed that preconditioning of plastic packages not only induces the onset of delamination at the die surface but it appears to weaken the adhesion at this interface as well. As a result, delamination failure starts to occur earlier (i.e. within shorter moisture exposure time) in the devices tested after subsequent thermal cycling stress test. A simple moisture diffusion analytical model is proposed here for predicting the optimal baking schedules for plastic SMD packages.     

Low-temperature carbon monoxide gas sensors based gold/tin dioxide

Tin dioxide nanocrystals were synthesized by a precipitation process and then used as the support for 2 wt.% gold/tin dioxide preparation via a deposition–precipitation method, followed by calcination at 200 °C. Thick films were fabricated from gold/tin dioxide powders, and the sensing behavior for carbon monoxide gas was investigated. The gold/tin dioxide was found to be efficient carbon monoxide gas-sensing materials under low operating temperature (83–210 °C). The Au/SnO₂ sensor with SnO₂ calcined at 300 °C exhibited better CO gas-sensing behavior than the SnO₂ calcined at other temperatures. The experimental results indicated the potential use of Au doped SnO₂ for CO gas sensing.     

Texture of electrodeposited tin layers and its influence on their corrosion behavior

Differences in the degree of corrosion of pure thin tin films electrodeposited on copper substrates were investigated in dependence on the layer thickness and the texture of the tin layers. The change of the preferred orientation of the tin layer deposited by applying different current densities was analyzed using X-ray diffraction. A graphical evaluation was used to determine the degree of corrosion after sample exposition to NaCl contaminations and humidity. Results show that a preferred orientation along the lattice planes (3 2 1) and (2 2 0) enhances the corrosion resistance of the tin layer by about one order of magnitude compared to a non-textured sample based on the corroded area. In contrast, a texture along (1 0 1) and (1 1 2) accelerates the oxidation of tin by a factor of about three to four compared with a randomly orientated specimen. The corrosion dependence on the preferred orientation decreases with increasing layer thickness. Moreover, scanning electron micrographs show no effect to the size of the tin grains on variations of the current density. In summary, changes in the process parameters of the electrodeposition lead to a variation of texture and thus modify the chemical and corrosion properties of the resulting tin layers. Consequently reliability properties like solderability or whisker growth in further applications depend on these parameters.     

Fatigue analysis of miniaturized lead-free solder contacts based on a novel test concept

The paper presents the method of generating lifetime-prediction-laws on special prepared very stiff specimen. The combination of thin- and thick-film technology allows building up test samples on ceramic very similar to electronic packages including the measurement issues. Influences of pad surface metallurgy, microstructure of solder, ineutectic solder alloys and assembly process parameter are regarded now. The investigation objects provide monitoring of electrical and mechanical damage process of SnAgCu solder bump. Different thermo-mechanical loads will be applied in temperature ranges of 0 to +80 °C, −40 to +125 °C and −50 to +150 °C, where the temperature gradient and cycle frequency also vary. A Variation of four different chip sizes allows the determination of fatigue laws for each temperature profile, to be able to compare in between them. The results of these tests will give universal lifetime-prediction laws for SnAgCu base solder joints. Main goals are to find coefficients for lifetime prediction models such as Coffin–Manson- or Norris–Landzberg-relation, which are transferable in between different electronic packages.     

Ball grid array reliability assessment for aerospace applications

Reliability of ball grid arrays (BGAs) was evaluated with special emphasis on space applications. This work was performed as part of a consortium led by the Jet Propulsion Laboratory (JPL) to help build the infrastructure necessary for implementing this technology. Nearly 200 test vehicles, each with four package types, were assembled and tested using an experiment design. The most critical variables incorporated in this experiment were package type, board material, surface finish, solder volume, and environmental condition. The packages used for this experiment were commercially available packages with over 250 I/Os including both plastic and ceramic BGA packages.The test vehicles were subjected to thermal and dynamic environments representative of aerospace applications. Two different thermal cycling conditions were used, the JPL cycle ranged from −30°C to 100°C and the Boeing cycle ranged from −55°C to 125°C. The test vehicles were monitored continuously to detect electrical failure and their failure mechanisms were characterized. They were removed periodically for optical inspection, scanning electron microscopy (SEM) evaluation, and cross-sectioning for crack propagation mapping. Data collected from both facilities were analyzed and fitted to distributions using the Weibull distribution and Coffin–Manson relationships for failure projection. This paper will describe experiment results as well as those analyses.     

Degradation behavior of 600 V–200 A IGBT modules under power cycling and high temperature environment conditions

One challenge for automotive hybrid traction application is the use of high power IGBT modules that can withstand high ambient temperatures, from 90 °C to 120 °C, for reliability purpose. The paper presents ageing tests of 600 V–200 A IGBT modules subjected to power cycling with 60 °C junction temperature swings at 90 °C ambient temperature. Failure modes are described and obtained results on the module characteristics are detailed. Especially, physical degradations are described not only at the package level, like solder attach delaminations, but also at the chip level, with a shift on electrical characteristics such as threshold voltage. Finally, numerical investigations are performed in order to assess the thermal and thermo-mechanical constraints on silicon dies during power cycling and also to estimate the effect of ambient temperature on the mechanical stresses.     

Properties of low temperature Sn–Ag–Bi–In solder systems

The metallurgical and mechanical properties of Sn–3.5 wt%Ag–0.5 wt%Bi–xwt%In (x = 0–16) alloys and of their joints during 85 °C/85% relative humidity (RH) exposure and heat cycle test (−40–125 °C) were evaluated by microstructure observation, high temperature X-ray diffraction analysis, shear and peeling tests. The exposure of Sn–Ag–Bi–In joints to 85 °C/85%RH for up to 1000 h promotes In–O formation along the free surfaces of the solder fillets. The 85°C/85%RH exposure, however, does not influence the joint strength for 1000 h. Comparing with Sn–Zn–Bi solders, Sn–Ag–Bi–In solders are much stable against moisture, i.e. even at 85 °C/85%RH. Sn–Ag–Bi–In alloys with middle In content show severe deformation under a heat cycles between −40 °C and 125 °C after 2500 cycles, due to the phase transformation from β-Sn to β-Sn + γ-InSn₄ or γ-InSn₄ at 125 °C. Even though such deformation, high joint strength can be maintained for 1000 heat cycles.     

Low temperature delamination of plastic encapsulated microcircuits

Plastic encapsulated microcircuits (PEMs) are increasingly being used in applications requiring operation at temperatures lower than the manufacturer’s recommended minimum temperature, which is 0°C for commercial grade components and −40°C for industrial and automotive grade components. To characterize the susceptibility of PEMs to delamination at these extreme low temperatures, packages with different geometries, encapsulated in both biphenyl and novolac molding compounds, were subjected to up to 500 thermal cycles with minimum temperatures in the range −40 to −65°C in both the moisture saturated and baked conditions. Scanning acoustic microscopy revealed there was a negligible increase in delamination at the die-to-encapsulant interface after thermal cycling for the 84 lead PQFPs encapsulated in novolac and for both 84 lead PQFPs and 14 lead PDIPs encapsulated in biphenyl molding compound. Only the 14 lead novolac PDIPs exhibited increased delamination. Moisture exposure had a significant effect on the creation of additional delamination.     

Thermal fatigue endurance of collapsible 95.5Sn4Ag0.5Cu spheres in LTCC/PWB assemblies

The behavior of thermomechanically loaded collapsible 95.5Sn4Ag0.5Cu spheres in LTCC/PWB assemblies with high (LTCC/FR-4; ΔCTE 10 ppm/°C) and low (LTCC/Arlon; ΔCTE < 10 ppm/°C) global thermal mismatches was studied by exposing the assemblies into two thermal cycling tests. The characteristic lifetimes of the LTCC/FR-4 assemblies, tested over the temperature ranges of 0–100 °C and −40 to 125 °C, were 1475 and 524 cycles, respectively, whereas the corresponding values of the LTCC/Arlon assemblies were 5424 and 1575 cycles. According to the typical requirements for the industrial lifetime duration of solder joints, the former values are inadequate, whereas the latter are at an acceptable level in a few cases. Furthermore, the global thermal mismatch affected the thermal fatigue behavior of the 95.5Sn4Ag0.5Cu spheres in the temperature range of −40 to 125 °C.     

Development of the green plastic encapsulation for high density wirebonded leaded packages

The push in the electronics industry toward miniaturization and high density wirebonds is a major driving force in integrated circuit (IC) package design. One problem has been the use of conventional mold compounds to encapsulate the high density wirebonded packages, due to performance issues, such as wire sweep and coplanarity. Additionally, in order to match lead-free solutions in the near future, antimony- and halogen-free molding compound must be developed because antimony (Sb) and halogens in current flame retardant systems pose environmental hazardous. This article, discusses a “green” compound that eliminated these environmentally hazardous elements, resolving moldability and reliability issues for high density wirebonded packages.The reliability assessment was conducted at the maximum reflow peak temperature of 240 °C after moisture soaking at 60 °C/60%RH for 40 h, followed by temperature cycle tests. The study aimed for good package integrity, process, and performance to meet the requirements of high volume production and an acceptable moisture sensitivity (level 3) with a reflow temperature of 240 °C. The study indicates that moldability and reliability involved separate issues and offers a solution for high volume production and field application.     

CCGA packages for space applications

Commercial-off-the-shelf (COTS) area array packaging technologies in high reliability versions are now being considered for applications, including use in a number of NASA electronic systems being utilized for both the Space Shuttle and Mars Rover missions. Indeed, recently a ceramic package version specifically tailored for high reliability applications was used to provide the processing power required for the Spirit and Opportunity Mars Rovers built by NASA-JPL. Both Rovers successfully completed their 3-months mission requirements and continued exploring the Martian surface for many more moths, providing amazing new information on previous environmental conditions of Mars and strong evidence that water exists on Mars.Understanding process, reliability, and quality assurance (QA) indicators for reliability are important for low risk insertion of these newly available packages in high reliability applications. In a previous investigation, thermal cycle test results for a non-functional daisy-chained peripheral ceramic column grid array (CCGA) and its plastic ball grid array (PBGA) version, both having 560 I/Os, were gathered and are presented here. Test results included environmental data for three different thermal cycle regimes (−55/125 °C, −55/100 °C, and −50/75 °C). Detailed information on these—especially failure type for assemblies with high and low solder volumes—are presented. The thermal cycle test procedure followed those recommended by IPC-9701 for tin–lead solder joint assemblies. Its revision A covers guideline thermal cycle requirements for Pb-free solder joints. Key points on this specification are also discussed.In a recent investigation a fully populated CCGA with 717 I/Os was considered for assembly reliability evaluation. The functional package is a field-programmable gate array that has much higher processing power than its previous version. This new package is smaller in dimension, has no interposer, and has a thinner column wrapped with copper for reliability improvement. This paper will also present thermal cycle test results for assemblies of this and its plastic package version with 728 I/Os, both of which were exposed to four different cycle regimes. Two of these cycle profiles are specified by IPC-9701A for tin–lead, namely, −55 to 100 °C and −55 to 125 °C. One is a cycle profile specified by Mil-Std-883, namely, −65/150 °C, generally used for ceramic hybrid packages screening and qualification. The last cycle is in the range of −120 to 85 °C, a representative of electronic systems directly exposed to the Martian environment without use in a thermal control enclosure. Per IPC-9701A, test vehicles were built using daisy chain packages and were continuously monitored and/or manually checked for opens at intervals. The effects of many process and assembly variables—including corner staking commonly used for improving resistance to mechanical loading such as drop and vibration loads—were also considered as part of the test matrix. Optical photomicrographs were taken at various thermal cycle intervals to document damage progress and behavior. Representative samples of these are presented along with cross-sectional photomicrographs at higher magnification taken by scanning electron microscopy (SEM) to determine crack propagation and failure analyses for packages.     

Compound semiconductor activation energy in humidity

Product reliability investigations typically include accelerated humidity testing. Originally, the “standard” test was a biased 85 °C/85% relative humidity (RH) lifetest for 1000 h. Recently, a substitute accelerated version of this test has been used. The accelerated version is called highly accelerated stress test (HAST). The HAST conditions are also biased, at 130 °C, 85%RH, and approximately 18 PSI overpressure. The duration of the HAST test is normally 96–100 h – to be equivalent to the 85/85 test. This study is intended to investigate thermal acceleration and show that equivalent HAST tests on compound semiconductors are more highly accelerated and could be conducted with much shorter durations.     

The effect of electroplating parameters and substrate material on tin whisker formation

Electroplated tin finishes are widely used in the electronics industry due to their excellent solderability, electrical conductivity and corrosion resistance. However, the spontaneous growth of tin whiskers during service can result in localised electrical shorting or other harmful effects. Until recently, the growth of tin whiskers was successfully mitigated by alloying the tin with lead. However, restriction in the use of lead in electronics as a result of EU legislation (RoHS) has led to renewed interest in finding a successful alternative mitigation strategy.Whisker formation has been investigated for a bright tin electrodeposit to determine whether whisker growth can, at least partially, be mitigated by control of electroplating parameters such as deposition current density and deposit thickness. The influence of substrate material and storage at 55 °C/85% humidity on whisker growth have also been investigated.Whisker growth studies indicate that deposition parameters have a significant effect on both whisker density and whisker morphology. As deposition current density is increased there is a reduction in whisker density and a transition towards the formation of large eruptions rather than potentially more harmful filament whiskers. Increasing the tin coating thickness also results in a reduction in whisker density. Results demonstrate that whisker growth is most prolific from tin deposits on brass, whilst that from tin deposits on rolled silver is greater than that observed for tin deposits on copper.     

Investigation of relation between intermetallic and tin whisker growths under ambient condition

The relation between the whisker growth and intermetallic on various lead-free finish materials that have been stored at ambient condition for 2 yrs (6.3 × 10⁷ s) is investigated. The matte Sn plated leadframe (LF) had the needle-shaped whisker and the nodule-shaped whisker was observed on the semi-bright Sn plated LF. Both the Sn plated LFs had a same columnar grain structure and both whiskers were grown in connection with the scalloped intermetallic compound (IMC) layer. The morphology of the IMC layer is similar, regardless of the area which has whisker or not. On the Sn–Bi finish and bright Sn plated LF, hillock-shaped and sparsely grown branch-shaped whiskers were observed, respectively. The IMC grew irregularly under both the areas with or without whisker. The IMC growth along the Sn grain boundaries generated inner compressive stress at the plating layer. Atomic force microscopy (AFM) profiling analysis is useful for characterization the IMC growth on the Sn and Cu interface. The measured root mean square (RMS) values IMC roughness on semi-bright Sn, matte Sn, and bright Sn plated LF were 1.82 μm, 1.46 μm, and 0.63 μm, respectively. However, there is no direct relation between whisker growth and the RMS value. Two layers of η′-Cu₆Sn₅ were observed using field emission transmission electron microscopy (FE-TEM): fine grains and coarse grains existed over the fine grains.     

Tin whisker formation of lead-free plated leadframes

This paper presents the evaluation results of whiskers on two kinds of lead-free finish materials at the plating temperature and under the reliability test. The rising plating temperature caused increasing the size of plating grain and shorting the growth of whisker. The whisker was grown under the temperature cycling the bent shaped in matte pure Sn finish and hillock shape in matte Sn–Bi. The whisker growth in Sn–Bi finish was shorter than that in Sn finish. In FeNi42 leadframe, the 8.0–10.0 μm diameter and the 25.0–45.0 μm long whisker was grown under 300 cycles. In the 300 cycles of Cu leadframe, only the nodule-shaped grew on the surface, and in the 600 cycles, a 3.0–4.0 μm short whisker grew. After 600 cycles, the 0.25 μm thin Ni₃Sn₄ formed on the Sn-plated FeNi42. However, we observed the amount of 0.76–1.14 μm thick Cu₆Sn₅ and 0.27 μm thin Cu₃Sn intermetallics were observed between the Sn and Cu interfaces. Therefore, the main growth factor of a whisker is the intermetallic compound in the Cu leadframe, and the coefficient of thermal expansion mismatch in FeNi42.     

Effect of primary creep and plasticity in the modeling of thermal fatigue of SnPb and SnAgCu solder joints

It has been conventional to simplify the thermo-mechanical modeling of solder joints by omitting the primary (transient) contributions to total creep deformation, assuming that secondary (steady-state) creep strain is dominant and primary creep is negligible. The error associated with this assumption has been difficult to assess because it depends on the properties of the solder joint and the temperature–time profile. This paper examines the relative contributions of plasticity, primary and secondary creep in Sn40Pb and Sn3.8Ag0.7Cu solders using the analysis of a trilayer solder joint structure with finite elements and a newly developed finite difference technique. The influences of temperature amplitude and ramp rate have been quantified. It was found that for the thermal profiles considered, the role of plasticity was negligible for trilayer assemblies with SnPb and SnAgCu solder interlayers. Furthermore, when primary creep was included for SnAgCu, the temperature-dependent yield strength was not exceeded and no plastic strains resulted. Neglect of primary creep can result in errors in the predicted stress and strain of the solder joint. Damage metrics based on the stabilized stress vs. strain hysteresis loop, for symmetric 5 min upper/lower dwell periods, differ widely when primary creep is considered compared to the secondary-only creep model. Creep strain energy density differences between the secondary-only and primary plus secondary creep models for SnPb were 32% (95 °C/min–Δ165 °C thermal profile), 32% (95 °C/min–Δ100 °C) and 35% (14 °C/min–Δ100 °C); similarly for SnAgCu, the differences were 29% (95 °C/min–Δ165 °C), 46% (95 °C/min–Δ100 °C) and 58% (14 °C/min–Δ100 °C). Accumulated creep strain differences between the secondary-only and primary plus secondary creep models for SnPb were 21% (95 °C/min–Δ165 °C), 25% (95 °C/min–Δ100 °C) and 25% (14 °C/min–Δ100 °C); similarly for SnAgCu the differences were 82% (14 °C/min–Δ100 °C), 89% (95 °C/min–Δ100 °C) and 100% (95 °C/min–Δ165 °C). In turn, these discrepancies can lead to errors in the estimation of the solder thermal fatigue life due to the changing proportion of primary creep strain to total inelastic strain under different thermal profiles, particularly for SnAgCu.