A wafer-level microcap array to enable high-yield microsystem packaging

Packaging represents a significant and expensive obstacle in commercializing microsystem technology (MST) devices such as microelectromechanical systems (MEMS), microopticalelectromechanical systems (MOEMS), microsensors, microactuators, and other micromachined devices. This paper describes a novel wafer-level protection method for MSTs which facilitate improved manufacturing throughput and automation in package assembly, wafer-level testing of devices, and enhanced device performance. The method involves the use of a wafer-sized microcap array. This array consists of an assortment of small caps molded onto a material with adjustable shapes and sizes to serve as protective structures against the hostile environments associated with packaging. It may also include modifications which enhance its adhesion to the MST wafer or increase the MST device function. Depending on the application, the micromolded cap can be designed and modified to facilitate additional functions, such as optical, electrical, mechanical, and chemical functions, which are not easily achieved in the device by traditional means. The fabrication and materials selection of the microcap device is discussed in this paper. The results of wafer-level microcap packaging demonstrations are also presented.     

High volume nanoimprint lithography on III/V substrates: Imprint fidelity and stamp lifetime

Nanoimprint lithography (NIL) has developed from an emerging nanoreplication technology into a mature and industrially viable manufacturing technology. It is now by far the fastest and most cost-efficient nanoreplication method available. This technology has been successfully implemented in the manufacturing of High Brightness LED’s. However, manufacturing of HBLED’s in high volume using nanoimprint lithography faces a few particular challenges. Perhaps the most significant is to produce perfectly imprinted nanostructures on the epitaxially grown substrates with high quality and yield. This is especially important since the substrates are expensive and since the imprint step is close to the end of the production process. This means that the value of the processed substrates is very high. In this work, 8000 imprints were produced. Measured data from the imprinted substrates shows consistent results. It is also shown that the 8000 imprints have been performed using the same stamp without significant degradation. After 8000 imprints, the yield from the nanoimprint lithography step is 99.15%.     

A Novel Wafer-Level Hermetic Packaging for MEMS Devices

Some emerging microelectromechanical systems (MEMS) devices such as high-performance inertial sensors and high-speed actuators must be operated in a high vacuum and in order to create this vacuum environment, specific packaging is required. To satisfy this demand, this paper presents a novel method for hermetic and near-vacuum packaging of MEMS devices. We use wafer-level bonding technology to combine with vacuum packaging, simultaneously. For this packaging solution, the wafers with air-guided micro-through-holes were placed on a custom-built design housed in a vacuum chamber maintained at a low-pressure environment of sub-10 mtorr. Packaging structure is then sealed by solder ball reflow process with the lower heating temperature of 300degC to fill up micro-through-hole. Experimental results shown the hermetical packaging technique using solder sealing is adapted to the wafer-level microfabrication process for MEMS devices and can achieve better yield and performance. Thus, this technique is very useful for many applications with high performance and low packaging cost can be obtained due to wafer-level processing.     

A review of silicon-based wafer bonding processes,an approach to realize the monolithic integration of Si-CMOS and Ⅲ-Ⅴ-on-Si wafers

The heterogeneous integration of Ⅲ-Ⅴ devices with Si-CMOS on a common Si platform has shown great promise in the new generations of electrical and optical systems for novel applications,such as HEMT or LED with integrated control cir-cuitry.For heterogeneous integration,direct wafer bonding(DWB)techniques can overcome the materials and thermal mis-match issues by directly bonding dissimilar materials systems and device structures together.In addition,DWB can perform at wafer-level,which eases the requirements for integration alignment and increases the scalability for volume production.In this paper,a brief review of the different bonding technologies is discussed.After that,three main DWB techniques of single-,double-and multi-bonding are presented with the demonstrations of various heterogeneous integration applications.Mean-while,the integration challenges,such as micro-defects,surface roughness and bonding yield are discussed in detail.     

Packaging multiple active and passive elements in a hybrid optical platform

The commercial market for telecom components has had an increasing demand for laser transmitter packages with higher functionality and smaller form factor. These higher levels of integration require an optical bench platform that can incorporate multiple active and passive elements and withstand stringent reliability requirements. Furthermore, the laser package must be compatible with high-volume manufacturing. We have developed an optical platform for building hybrid (multiple active elements) optoelectronic devices in a stable, hermetically sealed package. Two novel approaches to optical packaging have been developed: a localized laser soldering process and a flexure-based lens mount with large dynamic range. We present the optical bench and component design and the results of engineering reliability testing of the assembled package.     

Wafer-level packaging of silicon to glass with a BCB intermediate layer using localised laser heating

Adhesive wafer-level bonding is an excellent solution to meet the stringent requirements in micro-electro-mechanical systems (MEMS) packaging, one of the challenges in MEMS manufacturing, in a steadily growing micro-systems market. A range of bonding processes for commercially available substrate bonders have been developed, which apply global heating during the bonding procedure. This article, however, describes an approach where heating is kept to a minimum by combining the merits of laser joining, a truly localised heating technique, and adhesive wafer-level bonding. This unique bonding technique, which enables the use of temperature-sensitive materials within the package, is demonstrated for bonding of silicon to glass - materials commonly used in MEMS fabrication - with a benzocyclobutene (BCB) intermediate bonding layer. As a proof of concept for wafer-level packaging, bonding of two simplified patterns is demonstrated, one with five individual samples on the same wafer, and the other with nine samples. To verify the influence of this innovative bonding technique on the quality of the seal the devices are shear force tested and the results are compared with those of devices packaged at chip-level.     

C4NP-无铅倒装晶片焊凸形成生产工艺与可靠性数据

受控倒塌芯片连接新工艺是一种由IBM公司开发、由Suss Micro Tec公司推向商品化的新型焊凸形成技术。受控倒塌芯片连接新工艺采用各种无铅焊料合金致力于解决现有的凸台。形成技术限定,使低成本小节距焊凸形成成为可能。受控倒塌芯片连接新工艺是一种焊球转移技术,熔焊料被注入预先制成并可重复使用的玻璃模板(模具)。这种注满焊料的模具在焊料转入圆片之前先经过检查以确保高成品率。注满焊料的模具与圆片达到精确的接近后以与液态熔剂复杂性无关的简单工序转移在整个300mm(或300mm以下)圆片上。受控倒塌芯片连接新工艺技术能够在焊膏印刷中实现小节距凸台形成的同时提供相同合金选择的适应性。这种简单的受控倒塌芯片连接新工艺使低成本、高成品率以及快速封装周期的解决方法对于细节距FCiP以及WLCSP凸台形成均能适用。     

A cost-effective solution for packaging the arrayed waveguide grating (AWG) photonic components

Precision laser machining technology was used to cut arrayed waveguide grating (AWG) devices from 6-in wafers by following their complex profiles in a fully automatic way. A substantial cost saving in components manufacturing was achieved by an obtained device-cutting yield of 100%. The profile-cut AWG devices have smooth cutting edges and their optical performances were found unaffected by the cutting. These devices were processed in the subsequent packaging process easily without adding cost. They were proven mechanically stable in their packaging in meeting the telecommunication standards even though they have irregular geometry.     

一种小尺寸扁平型光缆护套挤塑工艺的改进

对于小尺寸扁平光缆提出了小型挤塑机加一体式免调模具工艺改进方法,有效解决了传统室外光缆挤塑方法其护套后成品外观结构尺寸及衰减、机械性能不达标问题.     

Automatic Vision-Based Optical Fiber Alignment Using Multirate Technique

Automatic optical fiber alignment is the key to reducing the cost of the packaging process for the manufacturing of fiber-optic devices. This paper develops a vision-based active optical fiber alignment technique for coarse positioning using a piezoactuated moving platform that is controlled to reduce the alignment difference to within a certain degree. To overcome the adverse effect of the delay time between the motion control system and the vision system, the methodology based on the multirate control scheme is presented. Experimental results verify the effectiveness of the proposed approach.      

多层圆片级堆叠THz硅微波导结构的制作

基于微电子机械系统(MEMS)工艺,提出一种多层圆片堆叠的THz硅微波导结构及其制作方法。为了验证该结构在制作THz无源器件中的优势,基于6层圆片堆叠的硅微波导结构,设计了一种中心频率365 GHz、带宽80 GHz的功率分配/合成结构,并对其进行了仿真。研究了制作该结构的工艺流程,攻克了工艺过程中的关键技术,包括硅深槽刻蚀技术和多层热压键合技术,并给出了工艺结果。最终实现了多层圆片堆叠功率分配/合成结构的工艺制作和测试。测试结果表明,尽管样品的插入损耗较仿真值增加3 dB左右,考虑到加工误差和夹具损耗等情况,样品主要技术指标与设计值较为一致。     

The effect of dynamic design processing for yield enhancement inthe fabrication of deep sub-micron MOSFET's

With the downscaling of microelectronic devices, tighter process control and more elaborate fabrication equipment need to be complemented by process correcting techniques if good quality and high yields are to be expected. Dynamic design processing-a forward correcting technique by which some recipe values are recalculated during manufacturing-is such a technique. In this paper the effect of dynamic design processing on deep sub-micron MOSFET's is presented. The results show that a parametric yield improvement in excess of 25% over conventional manufacturing can be achieved     

基于SiO2掩膜层的硅基微半球谐振子模具加工工艺

微半球模具的三维对称性对半球谐振子的性能有着决定性的影响。提出使用热氧化工艺生长的SiO2材料作为掩膜层,以达到在使用HNA腐蚀溶液制作微半球陀螺谐振子模具的过程中加快纵向腐蚀速率及实现半球模具三维对称的目的。详细研究了不同腐蚀窗初始半径下HNA腐蚀溶液对〈111〉单晶硅进行纵向和侧向腐蚀时,其腐蚀深度和腐蚀速率的演化规律,并在此基础上通过设置适当的腐蚀窗初始半径(5μm)以及腐蚀时间(15 min),成功制作出了半径为38.937 7μm的三维对称半球谐振子模具,通过球度拟合证明该模具整体半径方差为0.789 3μm,球度偏差为2%,为半球谐振子三维对称性的提升奠定了基础。     

A Level-Crossing Approach for the Analysis of RF Modulated Signals Using Only Digital Test Resources

The test of analog & RF circuits at wafer-level suffers from both quality and throughput limitations, especially due to probing issues and limited count of expensive instrumentation resources. Since final test after packaging guarantees product performances, constraints on wafer-level test can be relaxed. This paper investigates a signal acquisition protocol based on the use of digital tester channels to perform the demodulation of analog/RF signals. Due to the large availability of such hardware resources on most testers, this approach allows to setup a multi-site strategy, thus increasing the test throughput. The fundamental concept is to capture the signal through the 1-bit comparator available in a digital tester channel and to process the resulting bit stream to retrieve the analog/RF signal characteristics. In this paper, the proposed solution is illustrated for the demodulation of Frequency-Modulated (FM) and Amplitude-Modulated (AM) signals. Both simulation and experimental results obtained with a Verigy 93K platform are presented.     

Superconductive Traveling-Wave Photodetectors: Fundamentals and Optical Propagation

This paper studies the theory of superconductive traveling-wave photodector devices (STWPDs), as a general platform for ultrafast, ultrasensitive, and ultralow-noise optoelectronic functions such as detection, modulation, photomixing, high-frequency electrical signal generation and amplification. Principles of operation of STWPDs are discussed based on the kinetic-inductance theory of superconductive thin films and a thorough investigation of the guiding mechanism of light within this class of devices is presented. The transfer matrix method is introduced to model the superconductive optical waveguide in TWDs and an efficient numerical method based on the Cauchy integral method and the argument principle method are developed for the analysis and design of the waveguides. Moreover, several regimes of device operation will be distinguished in terms of the modal characteristics of the optical waveguide and their effects on the overall performance of the device will be highlighted.     

晶圆级封装非制冷大面阵红外探测器应用分析

红外成像系统已经应用到军事和民用领域多年,但一直没得到广泛应用,主要原因是其分辨率低、成本高、工艺不稳定和技术门槛高等。解决这些问题需要从传感器工艺、探测器封装、红外图像处理芯片等方面加以改进。红外技术未来会朝低成本、专用处理芯片、高分辨率等方向发展。目前,国内厂商陆续推出了晶圆级封装(Wafer-Level Package,WLP)、高分辨率探测器和专用图像处理芯片等方面的新产品。但采用这些新器件的红外成像系统却没有得到相应的研究。本文主要基于烟台艾睿光电科技有限公司新推出的晶圆级封装的1280×1024元红外探测器以及专用图像处理芯片的实际应用,在系统架构、结构散热、成像算法等方面对由新器件构建的红外成像系统进行了验证分析。     

二氧化硅平面光波导器件的研究进展

二氧化硅平面光波导(PLC)器件以其低损耗、高工艺容差,以及与CMOS工艺兼容和与单模光纤模场匹配良好等优点,在光通信、光互连和集成光学中得到了广泛的应用.文章综述了二氧化硅平面光波导器件及其应用的进展,重点针对分束器、阵列波导光栅、可调光衰减器及其集成器件的最新研究进行了介绍,对未来发展趋势进行了展望.     

Polymer-Waveguide-Based Board-Level Optical Interconnect Technology for Datacom Applications

On the basis of a realized 12$,times,$ 10 Gb/s card-to-card optical link demonstrator, the capabilities of a polymer-waveguide-based board-level optical interconnect technology are presented. The conception and realization of the modular building blocks required for this board-level optical interconnect technology are described in detail. In particular, we report on the fabrication and characterization of board-integrated optical low-loss polymer waveguides that are compatible with printed circuit board (PCB) manufacturing processes. We also explain our fully passive alignment technique, superseding time-consuming active positioning of components and connectors. To realize optical transceiver modules comprising vertical cavity surface emitting laser (VCSEL) arrays with laser drivers and photodetector arrays with transimpedance amplifiers (TIAs), a mass-production concept based on wafer-level processing has been elaborated and successfully implemented.      

Multiwavelength Bragg gratings and their application to optical MUX/DEMUX devices

A concept of synergetic multiwavelength Bragg gratings as a platform for planar integrated optical devices is proposed and used to make a planar multiplexer/demultiplexer for wavelength-division multiplexing. In first experiments, the devices with 4-16 channels were made on SiON planars with single-layer lithography. Almost flat-top transfer function and 28-dB isolation were achieved for a four-channel device. The gratings with custom designed bandgaps could be also used to connect multiple optical devices in lightwave integrated circuits.     

Theory of information transfer in optical fibers: A tutorial review

A tutorial and comprehensive review of theoretical development in information transfer in optical fibers is presented with particular emphasis on nonlinear effects and application of solitons. During the decade of 1990th, a remarkable progress has been achieved in the amount and distance of information transfer using optical fibers, thanks to progress in fiber manufacturing, ultra-high speed optical devices, and theoretical understanding of optical pulse propagation in fibers. The review covers basics of lightwave propagation in fibers, derivation of the master equation that describes information transfer in fibers, introduction of various practical problems, and solutions based on optical solitons.