Signal processing challenges for applying software radio principles in future wireless terminals: an overview

The general idea of software radio is to develop highly integrated radio transceiver structures with high degree of flexibility and multimode capabilities, achieved through increased role of digital signal processing software in defining the functionalities which have traditionally been implemented with analog RF techniques. This paper explores the software radio concept from the receiver architecture and signal processing points of view, with mainly the wireless terminal application in mind. We first discuss the critical issues in alternative receiver architectures with simplified analog parts and increased configurability. We also introduce certain advanced digital signal processing techniques which could potentially relieve some of the essential problems and pave the way towards DSP‐based, highly integrated, and highly configurable terminals. Big emphasis is on efficient digital multirate signal processing methods and complex (I/Q) signal processing. Copyright © 2002 John Wiley & Sons, Ltd.     

Adaptability and Configurability in Cognitive Radio Design on Small Form Factor Software Radio Platform

The recent advances in cognitive radio technology based on software defined radio platforms have extended the capabilities of wireless communication systems. The unique ability of cognitive radios to alter their communication protocols to meet changing system demands make them great candidates for wireless applications that are difficult to implement using conventional wireless terminals. Small form factor platforms make cognitive radio portable and easy to deploy. This paper discusses the design and implementation methodology to build a cognitive radio on small form factor platform with heterogeneous processing architecture. The result of this discussion is a configurable wireless transceiver that features two important concepts of cognitive radio, namely configurability and adaptability.     

Tackling 4G challenges with "TACT" - Design and optimization of 4G radio receivers with a transceiver architecture comparison tool (TACT)

Current integration trends imposed by the market are pushing toward the software radio paradigm. 4G radio receivers, where different wireless standards converge, make RF engineers face harder and harder challenges. Electronic design automation (EDA) tools play an increasing role in the design and verification of wireless system. This article presents a transceiver architecture comparison tool (TACT) which is a hierarchical, user-friendly, Matlab-based tool. It automates the design-space exploration procedure for 4G (fourth generation) wireless receivers. An example that considers a multistandard wideband code division multiple access (WCDMA)/wireless local area network (WLAN) receiver was also presented to illustrate the capabilities of TACT     

An overview of configurable computing machines for software radio handsets

The advent of software radios has brought a paradigm shift to radio design. A multimode handset with dynamic reconfigurability has the promise of integrated services and global roaming capabilities. However, most of the work to date has been focused on software radio base stations, which do not have as tight constraints on area and power as handsets. Base station software radio technology progressed dramatically with advances in system design, adaptive modulation and coding techniques, reconfigurable hardware, A/D converters, RF design, and rapid prototyping systems, and has helped bring software radio handsets a step closer to reality. However, supporting multimode radios on a small handset still remains a design challenge. A configurable computing machine, which is an optimized FPGA with application-specific capabilities, show promise for software radio handsets in optimizing hardware implementations for heterogeneous systems. In this article contemporary CCM architectures that allow dynamic hardware reconfiguration with maximum flexibility are reviewed and assessed. This is followed by design recommendations for CCM architectures for use in software radio handsets.     

Implementation of LTE system on an SDR platform using CUDA and UHD

In this paper, we present an implementation of a long term evolution (LTE) system on a software defined radio (SDR) platform using a conventional personal computer that adopts a graphic processing unit (GPU) and a universal software radio peripheral2 (USRP2) with a URSP hardware driver (UHD) to implement an SDR software modem and a radio frequency transceiver, respectively. The central processing unit executes C++ control code that can access the USRP2 via the UHD. We have adopted the Ettus Research UHD due to its high degree of flexibility in the design of the transceiver chain. By taking advantage of this benefit, a simple cognitive radio engine has been implemented using libraries provided by the UHD. We have implemented the software modem on a GPU that is suitable for parallel computing due to its powerful arithmetic and logic units. A parallel programming method is proposed that exploits the single instruction multiple data architecture of the GPU. We focus on the implementation of the Turbo decoder due to its high computational requirements and difficulty in parallelizing the algorithm. The implemented system is analyzed primarily in terms of computation time using the compute unified device architecture profiler. From our experimental tests using the implemented system, we have measured the total processing time for a single frame of both transmit and receive LTE data. We find that it takes 5.00 and 8.58 ms for transmit and receive, respectively. This confirms that the implemented system is capable of real-time processing of all the baseband signal processing algorithms required for LTE systems.     

Recent developments in enabling technologies for software definedradio

In response to the technical challenges surrounding the realization of software defined radio, high-performance digital signal processors and related software have emerged as key enabling technologies. This article focuses on high-performance digital signal processing architectures and devices. The partitioning of the transceiver functions between DSPs and programmable dedicated hardware is examined     

软件无线电及其实现技术

软件无线电是一种新兴技术，通过软件使多种业务、多种标准、多个频段与灵活的无线电系统的组合成为可重新配置和可重新编程的。介绍了软件无线电的概念及系统结构，并进一步讨论了现阶段软件无线电所面临的技术问题以及相应的实现方案。     

Two-step channel selection-a novel technique for reconfigurable multistandard transceiver front-ends

This paper starts with a review of the prevailing channel-selection techniques utilized so far in the design of wireless transceiver analog front-ends before describing a novel two-step channel-selection technique, which handles the traditionally unwanted image, in radio frequency-to-intermediate frequency (RF-to-IF) or IF-to-RF frequency conversion, as a useful adjacent channel of the desired one, and selects deliberately either of them from IF to baseband (or baseband to IF). Thus, one more channel-selection possibility is created for both low-IF receivers and two-step-up transmitters. The consequential benefits of introducing channel selection at IF consist of two. First, many design specifications (such as phase noise and settling time) of the RF frequency synthesizer and local oscillator can be substantially relaxed. Second, a low-IF/zero-IF reconfigurable receiver and a direct-up/two-step-up reconfigurable transmitter can be synthesized to match better with narrowband-wideband-mixed multistandard systems. The operating principles of such architectures are presented in easy-to-understand complex-signal spectral-flow illustrations, and their practicability is demonstrated in the design of a Bluetooth/IEEE 802.11FH/HomeRF multistandard receiver. SPECTRE simulation results validate the reconfigurable functionalities mainly implemented by a triple-mode channel-select filter and a multifunctional sampling-mixer scheme.     

基于SMS4的加密通信可编程片上系统设计实现

针对面向工业用、商用以及民用电子设备加密串行通信需求,通过基于SMS4的加密通信SOPC软硬件架构、SMS4加密通信控制器IP技术、SMS4加密通信软件技术等内容的研究,实现了基于SMS4加密算法的串行通信技术,并在非128位明文的加密传输数据控制和基于8位异步模式的128位数据串行收发上效率明显提升。基于SMS4的加密通信SOPC提高了系统的加密通信功能可定制能力,且使加密通信核心算法自主可控。     

Multistandard Analogue Baseband Filters for Software-Defined and Cognitive Radio Receivers

Analogue baseband filters are an important circuit for channel select and anti-aliasing in wireless and mobile communication systems. For software and cognitive radio, they must be widely tunable and reconfigurable to accommodate existing, emerging, and future wireless and mobile standards. In this paper, design considerations of tunable and programmable filters for highly integrated multistandard receivers are presented. General background of multistandard integrated receivers and design challenges of analogue baseband filters are given. Circuit techniques for baseband filter design including the widely used active-RC and Gm-C circuits are described. Filter structures and design methods for high-order baseband filters are reviewed. On-chip tuning issues and methods are discussed. Results and performances of some published design examples are summarized. Future directions are also pointed out.     

Design of a 270 MHz/340 mW processing element for high performance motion estimation systems application

Emerging architectures, technologies and strategies applied to the development of systems for video processing will alleviate the restrictions imposed by limited bandwidth in present communication channels. In this article, the use of GaAs technology together with the application of different techniques applied to existing architectures for motion estimation developed in the literature, are presented. Among the several possible searching methods to compute the block-matching algorithm (BMA), the full-search BMA (FBMA) has obtained great interest from the scientific community due to its regularity, optimal solution and low control overhead which simplifies its VLSI realization. On the other hand, its main drawback is the demand of an enormous amount of computation. There are different ways of overcoming this factor, being the use of advanced technologies, such as gallium arsenide (GaAs), the one adopted in this article together with different techniques to reduce area overhead. The implementation of a 270 MHz processing element (PE) for a FBMA scheme is presented in this paper. From the results obtained for this basic module, an implementation for MPEG applications is proposed, leading to an architecture running at 145 MHz with a power dissipation of 3.48 W and an area of 11.5 mm².     

Complexity of a software GSM base station

There is increasing interest in developing radio-based applications in software. The new architecture for implementing mobile telephony base stations has the potential of offering many benefits: great cost savings by using one transceiver per base transceiver station (BTS) instead of one per channel, tremendous flexibility by moving system-specific parameters to the digital part, and allowing the support of a wide range of modulation and coding schemes. A very important problem in designing software radio applications is the need to estimate the required complexity of processing to dimension systems. For example, with a software GSM BTS it is critical to estimate the number of channels that can be supported by a given processor configuration, and to predict the impact of future processor enhancements on its capacity. This article focuses on the design of a software implementation of a GSM BTS and proposes a platform-independent evaluation of its computational requirements based on SPEC benchmarks. It focuses on the design and performance of a library of software modules. Portability and computational requirements are discussed     

Software radio: The challenges for reconfigurable terminals

The Software Defined Radio (Sdr) has always been considered as a promising solution for the future of wireless communications because of its ability to provide flexible architecture, enabling multimode and multistandard devices. On the network side, this technology seems to be achievable in a short-term visibility (we even are currently knowing the very beginnings ofSdr solutions in the field of network equipments), but applied to terminals, this technology is likely to reach later its maturity because the embedded issue is synonymous with high constrained architecture. The implementation of software radio terminals requires, for instance, the use of high calculation capability Digital Signal Processors (Dsp) or deeply integrated multiband rf transceiver, whose power consumption quality acts as a brake for the current development of such solutions. Nevertheless, the microelectronic industry will still provide more and more powerful components and, within a few years, theSdr dream will come true for terminal manufacturers. Furthermore, software radio is also a good opportunity to merge computer science and telecommunications technologies, in order to develop smart terminals, which may integrate software components like an operating system or Java virtual machine, etc. Hence, the software radio concept within mobile terminal is still an R&D issue, which requires effort combination in different fields but which also represents a great opportunity for the future of terminals.     

DFC++ Processing Framework Concept

Development of modern Software Defined Radio (SDR) based communication systems can be accelerated significantly by the use of processing frameworks. The evolution of SDR and the involved departure from digital representations of classical radio architecture towards more abstract software systems raises new requirements of increased flexibility and versatility. The proposed Data Flow Control for C++ (DFC++) processing framework concept addresses those requirements by employing modern programming techniques and flow control mechanisms to allow for variable data rates, dynamic paths, and flexible component designs. Another important trend is the integration of various embedded platforms in the software radio domain. The rapidly increasing performance and efficiency of embedded processors enables the deployment of SDR systems in more space and power constrained environments. Therefore covering a heterogeneous hardware selection becomes increasingly important for processing frameworks. By relying exclusively on C++ and minimizing external dependencies, DFC++ is specifically aiming for excellent portability and adaptability to support a wide range of current and future software radio projects while maintaining high performance and ease of use. This paper introduces the key aspects of the DFC++ concept and implementation with focus on the reference pointer based data transport mechanisms responsible for the propagation of user data between different processing components.     

Extending the Field of View With Phased Array Techniques: Results of European SKA Research

The radio frequency window of the square kilometre array is planned to cover the wavelength regime from centimeters up to a few meters. For this range to be optimally covered, different antenna concepts are considered. At the lowest frequency range, up to a few gigahertz, it is expected that multibeam techniques will be used, increasing the effective field-of-view to a level that allows very efficient detailed and sensitive exploration of the complete sky. Although sparse narrow-band phased arrays are as old as radio astronomy, multioctave sparse and dense arrays now considered for the SKA require new low-noise design, signal processing, and calibration techniques. The successful implementation of these new array techniques has already been introduced for the use of phased array feeds upgrading existing telescopes: enhancing aperture efficiency as well as effective field-of-view. Especially the development of low-cost array antenna design will allow a cost-effective large-scale implementation for the SKA. This paper addresses these new capabilities, emphasizing the R&D work done in Europe and aims to provide insight into the status of enabling technologies and technical research on polarization, calibration, and side-lobe control that will unleash the potential of phased arrays for future growth of radio astronomy synthesis arrays.     

Flexible and efficient hardware platform and architectures for waveform design and proof-of-concept in the context of 5G

Several technical contributions are emerging nowadays to fulfill the new requirements foreseen in the 5th generation (5G) of mobile communication systems. Among these contributions, different variants of waveform design are proposed for the new radio air interface as alternative to orthogonal frequency-division multiplexing (OFDM) adopted in 4G. However, in order to prove the feasibility and the benefits of the proposed waveforms, practical hardware implementations are necessary. This paper presents one of the first flexible and efficient hardware platforms for waveform design and proof-of-concept. The proposed platform constitutes a complete hardware/software development environment, with digital processing, radio frequency boards, and all associated interfaces for control, communication, and display. Furthermore, the proposed platform allows the support of several communication scenarios as foreseen in 5G. Promising waveform candidates are implemented, in addition to OFDM, with careful architectural choices to allow fair comparisons. Particularly, this paper presents novel hardware architectures for the UF-OFDM transmitter and receiver.     

Two-dimensional optical processing using one-dimensional input devices

Two-dimensional optical processing architectures that are implemented with one-dimensional input spatial light modulators are reviewed. The advanced state of the art of available one-dimensional devices and the flexibility that exists in the design of two-dimensional architectures with one-dimensional transducers leads to the implementation of the most powerful and versatile optical processors. Signal and image processing architectures of this type are discussed.     

并行算法在软件无线电多DSP平台的应用

近年来，随着软件无线电的发展，用于软件无线电平台中的多DSP并行结构受到越来越多的关注，因为这种结构能提高数字信号处理的速度。提出了一种适合在该平台上并行运算的算法，以多阶FIR滤波器为例，验证了算法，并探讨算法的性能，给出了该算法在多处理器条件下，与单处理器处理结果的比较。对选取合适的软件无线电中频处理多处理器平台具有一定的参考价值，并对舰载软件无线电的实现提供了科学参考。     

软件无线电基站接收单元的实现

由于软件无线电使得通信系统具有很好的通用性、灵活性,并使系统互联和升级变得方便,它已成为个人移动通信发展的关键技术之一.文中基于软件无线电的思想,讨论了个人移动通信系统基站接收单元的实现方案.     

智能天线技术及应用研究评述

智能天线是提高无线传输性能的一项关键技术,是无线通信领域持续的研究热点之一,其中部分研究成果已经在无线通信、雷达、电子对抗等广泛的领域获得了成功的应用,并且未来无线系统设计中会越来越多的采用智能天线技术.为此,文章首先简要回顾了有关智能天线技术的发展历史,介绍了其中主要的阵列处理算法原理,给出了基于软件无线电和FPGA/DSP等可重配置软硬件系统设计参考方案,通过一些设计实例分析了应用中的实际问题和解决途径,最后提出了有关这一技术领域未来发展的展望.