Avalanche phenomena in 4H-SiC p-n diodes fabricated by aluminum orboron implantation

Characteristics of p-n junction fabricated by aluminum-ion (Al⁺) or boron-ion (B⁺) implantation and high-dose Al⁺-implantation into 4H-SiC (0001) have been investigated. By the combination of high-dose (4×10¹⁵ cm^-2) Al⁺ implantation at 500°C and subsequent annealing at 1700°C, a minimum sheet resistance of 3.6 kΩ/□ (p-type) has been obtained. Three types of diodes with planar structure were fabricated by employing Al+ or B+ implantation. B ⁺-implanted diodes have shown higher breakdown voltages than Al⁺-implanted diodes. A SiC p-n diode fabricated by deep B+ implantation has exhibited a high breakdown voltage of 2900 V with a low on-resistance of 8.0 mΩcm² at room temperature. The diodes fabricated in this study showed positive temperature coefficients of breakdown voltage, meaning avalanche breakdown. The avalanche breakdown is discussed with observation of luminescence     

SiC、GaAs和Si的高温特性比较

采用杂质半导体电导率的本征化和pn结热击穿方法研究了SiC、GaAs和Si材料的高温特性。理论计算表明Si、Ge、GaAs、3C－SiC和6H－SiC器件的最高工作温度分别为450、175、650、1500和2100℃。在室温至400℃以内，硅和砷化镓器件由于工艺成熟、性能稳定而成为主流，SiC材料的器件在大于500℃的特高温区和高温大功率方面则有巨大的优势。     

Silicon carbide high-power devices

In recent years, silicon carbide has received increased attention because of its potential for high-power devices. The unique material properties of SiC, high electric breakdown field, high saturated electron drift velocity, and high thermal conductivity are what give this material its tremendous potential in the power device arena. 4H-SiC Schottky barrier diodes (1400 V) with forward current densities over 700 A/cm² at 2 V have been demonstrated. Packaged SITs have produced 57 W of output power at 500 MHz, SiC UMOSFETs (1200 V) are projected to have 15 times the current density of Si IGBTs (1200 V). Submicron gate length 4H-SiC MESFETs have achieved f_max=32 GHz, f_T=14.0 GHz, and power density=2.8 W/mm @ 1.8 GHz. The performances of a wide variety of SiC devices are compared to that of similar Si and GaAs devices and to theoretically expected results     

A 475-V high-voltage 6H-SiC lateral MOSFET

High-voltage lateral MOSFET's on 6H- and 4H-SiC have been fabricated with 400-475 V breakdown voltage using the RESURF principle. An MOS electron inversion layer mobility of about 50 cm²/V-s is obtained on 6H-SiC wafers. This mobility is high enough such that the specific on-resistance of the 6H-SiC MOSFET's (~0.29-0.77 Ω-cm²) is limited by the resistance of the drift layer, as desired. However, the implanted drift layer resistance is about ten times higher than expected for the implant dose used. Design and process changes are described to decrease the on-resistance and increase the breakdown voltage. For 4H-SiC, extremely low mobility was obtained, which prevents satisfactory device operation     

Greatly improved 3C-SiC p-n junction diodes grown by chemical vapordeposition

The fabrication and initial electrical characterization of greatly improved 3C-SiC (β-SiC) p-n junction diodes are reported. These diodes, which were grown on commercially available 6H-SiC (α-SiC) substrates by chemical vapor deposition, demonstrate rectification to -200 V at room temperature, representing a fourfold improvement in reported 3C-SiC diode blocking voltage. The reverse leakage currents and saturation current densities measured on these diodes also show significant improvement compared to previously reported 3C-SiC p-n junction diodes. When placed under sufficient forward bias, the diodes emit significantly bright green-yellow light. These results should lead to substantial advancements in 3C-SiC transistor performance     

The planar 6H-SiC ACCUFET: a new high-voltage power MOSFETstructure

A novel planar accumulation channel SiC MOSFET structure is reported in this paper. The problems of gate oxide rupture and poor channel conductance previously reported in SiC UMOSFETs are solved by using a buried P⁺ layer to shield the channel region. The fabricated 6H-SiC unterminated devices had a blocking voltage of 350 V with a specific on-resistance of 18 mΩ.cm² at room temperature for a gate bias of only 5 V. This measured specific on-resistance is within 2.5× of the value calculated for the epitaxial drift region (10¹⁶ cm^-3, 10 μm), which is capable of supporting 1500 V     

Nitrogen Implantation to Improve Electron Channel Mobility in 4H-SiC MOSFET

Normally off 4H-SiC MOSFET devices have been fabricated on a p-type semiconductor and electrically characterized at different temperatures. A gate oxide obtained by nitrogen ion implantation performed before the thermal oxidation of SiC has been implemented in n-channel MOSFET technology. Two samples with a nitrogen concentration at the SiO₂/SiC interface of 5 X 10¹⁸ and 1.5 X 10¹⁹ cm^-3 and one unimplanted sample have been manufactured. The sample with the highest N concentration at the interface presents the highest channel mobility and the lowest threshold voltage. For increasing temperature, in all the samples, the threshold voltage decreases, and the electron channel mobility increases. The latter case attains a maximum value of about 40 cm²/V ldr s at 200degC for the sample with the highest N concentration. These trends are explained by the reduction of interface electron traps in the upper half of the band gap toward the conduction band edge. These results demonstrate that N implantation can be effectively used to improve the electrical performances of an n-type surface channel 4H-SiC MOSFET.     

A p-Ge1-xCx/n-Si heterojunction diode grownby molecular beam epitaxy

We report on the fabrication and characterization of the first p-n diode made from a heterojunction of epitaxial p-type Ge_0.998C _0.002 on an n-type Si substrate. Epitaxial Ge_0.998C_0.002 was grown on a (100) Si substrate by solid source molecular beam epitaxy. The p-GeC/n-Si junction exhibits diode rectification. The I-V characteristics of the p-GeC/n-Si diode indicate a reasonable reverse saturation current of 89 pA/μm² at -1 V and a high reverse breakdown voltage in excess of -40 V. Photoresponse from the Ge_0.998C_0.002 p-n diode was observed from 1.3-μm laser excitation resulting in an external quantum efficiency of 1.4%     

3300V碳化硅肖特基二极管及混合功率模块研制

基于数值仿真结果,采用结势垒肖特基(JBS)结构和多重场限环终端结构实现了3 300 V/50 A 4H-SiC肖特基二极管(SBD),所用4H-SiC外延材料厚度为35 μm、n型掺杂浓度为2× 1015cm-3.二极管芯片面积为49 mm2,正向电压2.2V下电流达到50 A,比导通电阻13.7 mΩ· cm2;反偏条件下器件的雪崩击穿电压为4 600 V.基于这种3 300 V/50 A 4H-SiC肖特基二极管,研制出3 300 V/600 A混合功率模块,该模块包含24只3 300 V/50 A Si IGBT与12只3 300 V/50 A 4H-SiC肖特基二极管,SiC肖特基二极管为模块的续流二极管.模块的动态测试结果为:反向恢复峰值电流为33.75 A,反向恢复电荷为0.807 μC,反向恢复时间为41 ns.与传统的Si基IGBT模块相比,该混合功率模块显著降低了器件开关过程中的能量损耗.     

Characterization of inversion and accumulation layer electrontransport in 4H and 6H-SiC MOSFETs on implanted P-type regions

The silicon carbide double implanted vertical MOSFET (SiC DIMOS) is a promising candidate for high power switching applications due to the absence of high electric field corners and compatibility with planar IC technology. In this work, we report on the channel mobility behavior in 4H and 6H-SiC MOSFETs fabricated with a low thermal budget process sequence, on implanted p-type regions which mirror the lateral carrier transport region in the DIMOS device. Channel mobilities are higher by an order of magnitude in 6H-SiC compared to 4H-SiC MOSFET's suggesting the 6H-SiC polytype is better suited for fabricating the DIMOS structure in spite of the superior vertical bulk conduction in 4H-SiC. Moreover, channel mobility on accumulated surfaces is higher than values obtained on inverted surfaces. A strong correlation between the observed threshold voltages and channel mobilities is consistently explained by a modified MOSFET conductance formulation in the presence of slowly decaying bandtail states toward the SiC band edges     

Characteristics of inversion-channel and buried-channel MOS devicesin 6H-SiC

Inversion-channel and buried-channel gate-controlled diodes and MOSFET's are investigated in the wide bandgap semiconductor 6H-SiC. These devices are fabricated using thermal oxidation and ion implantation. The gate-controlled diodes allow room temperature measurement of surface states, which is difficult with MOS capacitors due to the 3 eV bandgap of 6H-SiC. An effective electron mobility of 20 cm²/Vs is measured for the inversion-channel devices and a bulk electron mobility of 180 cm²/Vs is found in the channel of the buried-channel MOSFET. The buried-channel transistor is the first ion-implanted channel device in SIC and the first buried-channel MOSFET in the 6H-SiC polytype     

High frequency performance of SiC heterojunction bipolartransistors

A compact heterojunction bipolar transistor (HBT) model was employed to simulate the high frequency and high power performances of SiC-based bipolar transistors. Potential 6H-SiC/3C-SiC heterojunction bipolar transistors (6H/3C-HBT's) at case temperatures of 27°C (300 K) through 600°C (873 K) were investigated. The high frequency and high power performance was compared to AlGaAs/GaAs HBT's. As expected, the ohmic contact resistance limits the high frequency performance of the SiC HBT. At the present time, it is only possible to reliably produce 1×10^-4 Ω-cm² contact resistances on SiC, so an f_T of 4.4 GHz and an f_max of 3.2 GHz are the highest realistic values. However, assuming an incredibly low 1×10^-6 Ω-cm² contact resistance for the emitter, base, and collector terminals, an f_T of 31.1 GHz and an f_max of 12.7 GHz can be obtained for a 6H/3C-SiC HBT     

Characterization of polycrystalline 3C-SiC thin film diodes for extreme environment applications

This paper describes the fabrication and characteristics of polycrystalline (poly) 3C-SiC thin film diodes for extreme environment applications, in which the poly 3C-SiC thin film was deposited onto oxidized Si wafers by APCVD using HMDS as a precursor. In this work, the optimized growth temperature and HMDS flow rate were 1100 °C and 8 sccm, respectively. A Schottky diode with a Au, Al/poly 3C-SiC/SiO₂/Si(n-type) structure was fabricated and its threshold voltage (V_d), breakdown voltage, thickness of depletion layer, and doping concentration (N_D) values were measured as 0.84 V, over 140 V, 61 nm, and 2.7 × 10¹⁹ cm³, respectively. To produce good ohmic contact, Al/3C-SiC were annealed at 300, 400, and 500 °C for 30 min under a vacuum of 5.0 × 10⁻⁶ Torr. The obtained p-n junction diode fabricated by poly 3C-SiC had similar characteristics to a single 3C-SiC p-n junction diode.     

SiC和GaN电力电子器件的研究进展

与传统的Si基器件相比,SiC和GaN器件具有工作温度高、击穿电压高、开关速度快等优势,因此SiC和GaN材料是制备电力电子器件的理想材料。总结了近年来SiC和GaN电力电子器件的研究进展,包括二极管,MOSFET,JFET和BJT结构的SiC器件,以及SBD,PN结二极管,HEMT和MOSFET结构的GaN器件。     

Excellent effects of hydrogen postoxidation annealing on inversionchannel mobility of 4H-SiC MOSFET fabricated on (112¯0) face

Effects of hydrogen postoxidation annealing (H₂ POA) on 4H-silicon carbide (SiC) MOSFETs with wet gate oxide on the (112¯0) face have been investigated. As a result, an inversion channel mobility of 110 cm²/Vs was successfully achieved using H₂ POA at 800°C for 30 min. H₂ POA reduces the interface trap density by about one order of magnitude compared with that without H₂ POA, resulting in considerable improvement of the inversion channel mobility to 3.5 times higher than that without H₂ POA. In addition, 4H-SiC MOSFET with H₂ POA has a lower threshold voltage of 3.1 V and a wide gate voltage operation range in which the inversion channel mobility is more than 100 cm²/Vs     

Characterization, Modeling, and Application of 10-kV SiC MOSFET

Ten-kilovolt SiC MOSFETs are currently under development by a number of organizations in the United States, with the aim of enabling their applications in high-voltage high-frequency power conversions. The aim of this paper is to obtain the key device characteristics of SiC MOSFETs so that their realistic application prospect can be provided. In particular, the emphasis is on obtaining their losses in various operation conditions from the extensive characterization study and a proposed behavioral SPICE model. Using the validated MOSFET SPICE model, a 20-kHz 370-W dc/dc boost converter based on a 10-kV 4H-SiC DMOSFET and diodes is designed and experimentally demonstrated. In the steady state of the boost converter, the total power loss in the 15.45- $hbox{mm}^{2}$ SiC MOSFET is 23.6 W for the input power of 428 W. The characterization study of the experimental SiC MOSFET and the experiment of the SiC MOSFET-based boost converter indicate that the turn-on losses of SiC MOSFETs are the dominant factors in determining their maximum operation frequency in hard-switched circuits with conventional thermal management. Replacing a 10-kV SiC PiN diode with a 10-kV SiC JBS diode as a boost diode and using a small external gate resistor, the turn-on loss of the SiC MOSFET can be reduced, and the 10-kV 5-A SiC MOSFET-based boost converter is predicted to be capable of a 20-kHz operation with a 5-kV dc output voltage and a 1.25-kW output power by the PSpice simulation with the MOSFET model. The low losses and fast switching speed of 10-kV SiC MOSFETs shown in the characterization study and the preliminary demonstration of the boost converter make them attractive in high-frequency high-voltage power-conversion applications.      

Comparison of GaN and 6H-SiC p-i-n photodetectors with excellentultraviolet sensitivity and selectivity

We fabricated GaN and 6H-SiC p-i-n photodetectors and compared their electrical and optical characteristics. The GaN diodes suffered from significant leakage current of 37 μA/mm² at -5 V, while the SiC diode leakage current was below the noise level at 10 pA/mm² at -20 V. The built-in potentials and the unintentional “i-layer” doping densities were obtained from capacitance-voltage (C-V) measurements. The SiC detectors exhibited a broad spectral response in contrast to the abrupt cutoff observed in the GaN detectors. The peak responsivities of the GaN and SiC photodetectors corresponded to internal quantum efficiencies of 57% at 3.42 eV and 82% at 4.49 eV, respectively. Furthermore, both detectors exhibited excellent visible rejection ratios which is needed for solar-blind applications. The response times at zero bias were 18 and 102 ns for the GaN and SiC detectors, respectively     

碳化硅MOSFET反型沟道迁移率的研究

SiC MOSFET是制作高速、低功耗开关功率器件的理想材料，然而，制作反型沟道迁移率较高的SiC MOSFET工艺尚未取得满意结果。通过在N0中高温退火可以显著地提高4H—SiC MOSFET的有效沟道迁移率；采用H2中退火制作的4H—SiC MOSFET阈值电压为3．1V，反型沟道迁移率高于100cm^2／Vs的栅压的安全工作区较宽。N20退火技术由于其的安全性而发展迅速并将取代N0。     

无坑洞n-3C-SiC/p-Si(100)的LPCVD外延生长及其异质结构特性

在MBE/CVD高真空系统上,利用低压化学气相淀积(LPCVD)方法在直径为50mm的单晶Si(100)衬底上生长出了高取向无坑洞的晶态立方相碳化硅(3C-SiC)外延材料,利用反射高能电子衍射(RHEED)和扫描电镜(SEM)技术详细研究了Si衬底的碳化过程和碳化层的表面形貌,获得了制备无坑洞3C-SiC/Si的优化碳化条件,采用霍尔(Hall)测试等技术研究了外延材料的电学特性,研究了n-3C-SiC/p-Si异质结的I-V、C-V特性及I-V特性对温度的依赖关系.室温下n-3C-SiC/p-Si异质结二极管的最大反向击穿电压达到220V,该n-3C-SiC/p-Si异质结构可用于制备宽带隙发射极SiC/Si HBTs器件.     

An 1800 V triple implanted vertical 6H-SiC MOSFET

6H silicon carbide vertical power MOSFETs with a blocking voltage of 1800 V have been fabricated. Applying a novel processing scheme, n ⁺ source regions, p-base regions and p-wells have been fabricated by three different ion implantation steps. Our SiC triple ion implanted MOSFETs have a lateral channel and a planar polysilicon gate electrode. The 1800 V blocking voltage of the devices is due to the avalanche breakdown of the reverse diode. The reverse current density is well below 200 μA/cm² for drain source voltages up to 90% of the breakdown voltage. The MOSFETs are normally off showing a threshold voltage of 2.7 V. The active area of 0.48 mm² delivers a forward drain current of 0.3 A at Y_GS=10 V and V _DS=8 V. The specific on resistance was determined to 82 mΩdcm² at 50 mV drain source voltage and at V_GS =10 V which corresponds to an uppermost acceptable oxide field strength of about 2.7 MV/cm. This specific on resistance is an order of magnitude lower than silicon DMOSFET's of the same blocking capability could offer