Characterization of interface states at Au/SnO2/n-Si (MOS) structures

The purpose of this paper is to characterize the interface states in Au/SnO₂/n-Si (MOS) structures. The characteristic parameters of the interface states are derived from capacitance-voltage (C-V) and conductance-voltage (G/ω-V) measurements as a function of frequency. The C-V and G/ω-V measurements have been carried out in the frequency range of 1 kHz to 1 MHz at room temperature. At each frequency, the measured capacitance and conductance decrease with increasing frequency due to a continuous distribution of the interface states. The frequency dispersion in capacitance and conductance can be interpreted in terms of the interface state density (N_ss) and series resistance (R_s). Especially at low frequencies, the interface states can follow the ac signal and yield an excess capacitance. Due to a continuous density distribution of interface states, the C and G/ω values decrease in depletion region with increasing frequencies. At high frequencies, the effect of series resistance on the capacitance is found appreciable due to the interface state capacitance decreasing with increasing frequency. Experimental results show that the locations of interface states between SnO₂/Si and series resistance have a significant effect on electrical characteristics of MOS structures.     

Electrical characteristics of Au/n-GaAs Schottky barrier diodes with and without SiO2 insulator layer at room temperature

In this study, our main goal is fabricated with and without insulator layer Au/n-GaAs Schottky barrier diodes (SBDs) to explain whether or not the insulator layer is effective on some electric parameters such as Φ_B, n, N_ss, and R_s. The current-voltage (I-V) and capacitance-voltage (C-V) characteristics of metal-semiconductor (Au/n-GaAs) are investigated and compared with metal-insulator-semiconductor (Au/SiO₂/n-GaAs) Schottky diodes. From the room temperature I-V characteristics of these devices, the main electrical parameters such as, ideality factor (n) and zero bias barrier height (Φ_bo) values of 1.25 and 0.73 eV for Au/n-GaAs, and 1.51 and 0.75 eV for Au/SiO₂/n-GaAs, were obtained. The interface distribution profile (N_ss) as a function of (E_c − E_ss) was extracted from the forward-bias I-V measurements by taking into account the bias dependence of the effective barrier height (Φ_e) and series resistance (R_s) for the Schottky diodes. The N_ss values obtained taking into account the series resistance values are lower than those obtained without considering the series resistance. The diodes show non-ideal I-V behavior with ideality factor greater than unity. This behavior is attributed to the interfacial insulator layer and the interface states. The I-V characteristics confirmed that the distribution of N_ss, R_s, and interfacial insulator layer are important parameters that influence the electrical characteristics of metal-semiconductor and metal-insulator-semiconductor Schottky diodes.     

A comparative study regarding effects of interfacial ferroelectric Bi4Ti3O12 (BTO) layer on electrical characteristics of Au/n-Si structures

Present study focuses on the effects of interfacial ferroelectric BTO layer on the electrical characteristics of Au/n-Si structures, hence Au/n-Si (MS) and Au/BTO/n–Si (MFS) structures were fabricated and admittance measurements (capacitance–voltage: C–V and conductance–voltage: G/ω–V) of both structures were conducted between 10 kHz and 1 MHz at room temperature. Results showed that C–V and G/ω–V characteristics were affected not only by frequency but also through deposition of BTO layer. Some effects can be listed as sharper peaks in C–V plots, higher capacitance and conductance values. Structure’s series resistance (R _s) also decreased due to BTO layer. Interface states (N _ss) profiles of the structures were obtained using Hill–Coleman and high-low frequency capacitance (C _HF–C _LF). Some of the main electrical parameters were extracted from C ^?2–V plots using depletion capacitance approach. Furthermore, current–voltage characteristics of MS and MFS structures were presented.     

Similar admittance behavior of amorphous silicon carbide and nitride dielectrics within the MIS structure

PECVD grown a-SiNx:H and a-SiCx:H films were investigated as dielectric films in the form of metal/insulator/p-silicon (MIS) structures. AC admittance of MIS structures was measured as a function of dc gate bias voltages and frequencies (1-1000 kHz) of the superimposed ac bias voltage (10 mV). For each applied bias voltage (from accumulating to inverting bias regimes), temperature (T) dependence of both capacitance (C) and conductance (G/ω) were measured to investigate majority/minority carrier behavior under various frequencies ω (kHz-MHz) as parameters. C and G/ω-T-ω measurements reveal that observed pairs of capacitance steps and conductance peaks are related to traps lying on the same energy value, residing in the insulator and at the interface of insulator/semiconductor structure and differing only through capture cross-sections. On the other hand, surface band bending (ψ_s) of silicon and activation energy (E_A) deduced from the Arrhenius plot of the frequency vs. reciprocal temperature as a function of gate bias (V_G) seem linearly dependent, implying that E_A reflects the ψ_s variation.     

Thermal stability of GdScO3 and LaLuO3 films prepared by liquid injection MOCVD

We have studied thermal stability of GdScO₃ and LaLuO₃ films prepared by liquid injection metal-organic chemical vapour deposition (MOCVD). In the present work, we report on the characterization of LaLuO₃ and GdScO₃ thin dielectric films by SIMS and capacitance-voltage (C-V) measurements. In both GdScO₃ and LaLuO₃ films, SIMS analysis revealed the presence of a silicate interfacial layer. The C-V characteristics were found to be shifted after thermal treatment to negative and positive voltages for GdScO₃ and LaLuO₃ films, respectively. Furthermore we have observed that LaLuO₃ films exhibit C-V characteristics more stable to annealing conditions compared with GdScO₃ films.     

Analysis of surface states and series resistance in Au/n-Si Schottky diodes with insulator layer using current-voltage and admittance-voltage characteristics

In order to good interpret the experimentally observed Au/n-Si (metal-semiconductor) Schottky diodes with thin insulator layer (18 Å) parameters such as the zero-bias barrier height (Φ_bo), ideality factor (n), series resistance (R_s) and surface states have been investigated using current-voltage (I-V), capacitance-frequency (C-f) and conductance-frequency (G-f) techniques. The forward and reverse bias I-V characteristics of Au/n-Si (MS) Schottky diode were measured at room temperature. In addition, C-f and G-f characteristics were measured in the frequency range of 1 kHz-1 MHz. The higher values of C and G at low frequencies were attributed to the insulator layer and surface states. Under intermediate forward bias, the semi-logarithmic Ln (I)-V plot shows a good linear region. From this region, the slope and the intercept of this plot on the current axis allow to determine the ideality factor (n), the zero-barrier height (Φ_bo) and the saturation current (I_S) evaluated to 2.878, 0.652 and 3.61 × 10⁻⁷ A, respectively. The diode shows non-ideal I-V behavior with ideality factor greater than unity. This behavior can be attributed to the interfacial insulator layer, the surface states, series resistance and the formation barrier inhomogeneity at metal-semiconductor interface. From the C-f and G-f characteristics, the energy distribution of surface states (N_ss) and their relaxation time (τ) have been determined in the energy range of (E_c − 0.493E_v)-(E_c − 0.610) eV taking into account the forward bias I-V data. The values of N_ss and τ change from 9.35 × 10¹³ eV⁻¹ cm⁻² to 2.73 × 10¹³ eV⁻¹ cm⁻² and 1.75 × 10⁻⁵ s to 4.50 × 10⁻⁴ s, respectively.     

Ferroelectric properties of Bi3.4Dy0.6Ti3O12 thin films crystallized in N2

Bi_3.4Dy_0.6Ti₃O₁₂ (BDT) ferroelectric thin films were deposited on Pt/Ti/SiO2/Si substrates by chemical solution deposition (CSD) and annealed in an N₂ environment after pre-annealing in air at 400 °C. The effect of crystallization temperature on the structural and electrical properties of the BDT films was studied. The BDT films annealed in N₂ in the temperature range of 600 °C to 750 °C were crystallized well and the average grain size increased with increasing crystallization temperature, while the remanent polarization of the films is not a monotonic function of the crystallization temperature. The BDT films crystallized at 650 °C have the largest remanent polarization value of 2P_r = 39.4 μC/cm², and a fatigue-free characteristic.     

Analysis of temperature dependent electrical characteristics of Au/n-GaAs/GaAs structures in a wide temperature range

The temperature dependence of some electrical parameters of Au/n-GaAs/GaAs structures obtained from the forward bias current-voltage (I-V) and reverse bias capacitance-voltage (C-V) characteristics is studied in the temperature range of 79-400 K. The forward bias current I is found to be proportional to I_o(T)exp(AV), where A is the slope of Ln(I)-V curves and almost independent of the voltage and temperature, and I_o(T) is relatively a weak function of temperature. The semi-logarithmic Ln(I)-V characteristics based on the thermionic emission (TE) mechanism showed a decrease in the ideality factor (n) and an increase in the zero-bias barrier height (Φ_Bo) with increasing temperature. These behaviors don't obey the pure thermionic emission (TE) theory. However, the barrier height Φ_B(C-V) determined from the C⁻²-V plot at high frequency decreased linearly with the temperature. Analysis of the data indicated that the predominant current conduction mechanism of our sample was a trap-assisted multistep tunneling rather than the other mechanisms.     

Effects of Bi2O3 and Cr2Ti3O9 Co-doping on dielectric properties in BaTiO3-based ceramics

A microwave ceramic with general composition (1-x-y) BaTiO₃ + x Cr₂Ti₃O₉ + y Bi₂O₃ has been prepared by solid state synthesis at 1300-1400 °C. The phase composition, perovskite structural parameters and dielectric properties have been obtained by X-ray diffraction and dielectric measurements as a function of chemical composition and temperature. At low doping levels the formation of BaTiO₃-based solid solution has been found. The precipitation of BaCrO₃ has been detected at x = y = 2.0 mol%. A model of the incorporation of Cr³⁺ and Bi³⁺ ions into BaTiO₃-based crystal lattice has been proposed. Diffused phase transition in the temperature range 100-140 °C have been revealed by dielectric measurements for different ceramic composition. As high dielectric constant as 7311 and as low dielectric loss as 0.02 have been found for the composition of 0.98BaTiO₃-0.01Cr₂Ti₃O₉-0.01Bi₂O₃.     

Analysis of interface states in Au/ZnO/p-InP (MOS) structure

Zinc oxide (ZnO) film was deposited on p-type InP substrate by means of radio frequency magnetron sputtering technique and thus the Au/ZnO/p-InP (MOS) structure was fabricated. The crystal structure and surface morphology of ZnO film deposited on InP were characterized by X-ray diffraction and atomic force microscopy, respectively. The analysis of interface states of the structure is studied using admittance (Y?=?G?+?iωC) measurements at room temperature. It is observed that the capacitance and conductance measurements change with frequency. This change is attributed to the presence of interface states. To determine the interface state density (N_ss), the high-low frequency (C_HF–C_LF) capacitance, Hill–Coleman and conductance methods were used. The N_ss values obtained from these methods are in agreement with each other. Furthermore, the effect of the series resistance (R_s) on admittance measurements was investigated. Thus, the obtained results suggest that the prepared structure can be used in various electronic applications.     

New substitutions and novel derivatives of the Aurivillius phases, Bi5TiNbWO15 and Bi4Ti3O12

We investigated isomorphous substitution of several metal atoms in the Aurivillius structures, Bi₅TiNbWO₁₅ and Bi₄Ti₃O₁₂, in an effort to understand structure-property correlations. Our investigations have led to the synthesis of new derivatives, Bi₄LnTiMWO₁₅ (Ln = La, Pr; M = Nb, Ta), as well as Bi₄PbNb₂WO₁₅ and Bi₃LaPbNb₂WO₁₅, that largely retain the Aurivillius (n = 1) + (n = 2) intergrowth structure of the parent oxide Bi₅TiNbWO₁₅, but characteristically tend toward a centrosymmetric/tetragonal structure for the Ln-substituted derivatives. On the other hand, coupled substitution, 2Ti^IV → M^V + Fe^III in Bi₄Ti₃O₁₂, yields new Aurivillius phases, Bi₄Ti_3−2xNb_xFe_xO₁₂ (x = 0.25, 0.50) and Bi₄Ti_3−2xTa_xFe_xO₁₂ (x = 0.25) that retain the orthorhombic noncentrosymmetric structure of the parent Bi₄Ti₃O₁₂. Two new members of this family, Bi₂Sr₂Nb₂RuO₁₂ and Bi₂SrNaNb₂RuO₁₂ that are analogous to Bi₂Sr₂Nb₂TiO₁₂, possessing tetragonal (I4/mmm) Aurivillius structure have also been synthesized.     

Enhancement of remnant polarization in multilayered Bi4Ti3O12/(Bi3.25La0.75)Ti3O12 films obtained by chemical solution deposition

Enhancement of remnant polarization was observed in artificially multilayered Bi₄Ti₃O₁₂ (BT)/(Bi_3.25La_0.75)Ti₃O₁₂ (BLT) films_. The multilayer were prepared on platinum coated silicon substrate by chemical solution deposition and compared with the single-phase BT, BLT and (Bi_3.5La_0.5)Ti₃O₁₂ films_. The multilayered film with a stacking periodicity of 60 nm BLT/30 nm BT shows a remnant polarization (2Pr) of about 61 μC/cm², which is much higher than those of the single-phase films. In addition, the multilayered films show a good fatigue-endurance character. After post-annealing the multilayered films at 700 °C for a long time (20 h), its remnant polarization decreased to a value close to the corresponding uniform film. Some possible mechanisms behind the polarization enhancement were proposed.     

Structure, dielectric and ferroelectric anisotropy of Sr2−xCaxBi4Ti5O18 ceramics

Sr_2−xCa_xBi₄Ti₅O₁₈(x = 0, 0.05) powders synthesized by solid state route were uniaxially pressed and sintered at 1225 °C for 2 h. The obtained dense ceramics exhibited crystallographic anisotropy with a dominant c axis parallel to the uniaxial pressing direction which was quantified in terms of the Lotgering factor. Microstructure anisotropy of both compositions (x = 0, 0.05) consisted of plate like grains exhibiting their larger surfaces mostly perpendicular to the uniaxial pressing direction. Dielectric and ferroelectric properties of Sr_2−xCa_xBi₄Ti₅O₁₈ ceramics were measured under an electric field (E) applied parallel and perpendicularly to uniaxial pressing direction. The obtained dielectric ?_R(T) and polarization (P-E) curves depended strongly on E direction thus denoting a significant effect from microstructure and crystallographic texture. Sr_2−xCa_xBi₄Ti₅O₁₈ properties were also significantly affected by Ca content (x): Curie temperature increased from 280 °C (x = 0) to 310 °C (x = 0.05) while ?_R and remnant polarization decreased for x = 0.05. The present results are discussed within the framework of the processing and crystal structure-properties relationships of Aurivillius oxides ceramics.     

Ferroelectric and pyroelectric properties of (Na0.5Bi0.5)TiO3-BaTiO3 based trilayered thin films

Trilayered Bi_3.25La_0.75Ti₃O₁₂ (25 nm)/(Na_0.5Bi_0.5)_0.94Ba_0.06TiO₃ (300 nm)/Bi_3.25La_0.75Ti₃O₁₂ (25 nm) and Pb(Zr_0.4Ti_0.6)O₃ (25 nm)/(Na_0.5Bi_0.5)_0.94Ba_0.06TiO₃ (300 nm)/Pb(Zr_0.4Ti_0.6)O₃ (25 nm) thin films without undesirable phases have been deposited on Pt/Ti/SiO₂/Si substrates. It was found that the Bi_3.25La_0.75Ti₃O₁₂ and Pb(Zr_0.4Ti_0.6)O₃ layers are very effective to inhibit the charge transport in the trilayered films. Much better insulating properties than those of (Na_0.5Bi_0.5)_0.94Ba_0.06TiO₃ films have been achieved in the trilayered films. The trilayered films show good dielectric, ferroelectric and pyroelectric properties. Remnant polarizations 2P_r of 16 µC/cm² and 34 µC/cm², pyroelectric coefficients of 4.8 × 10^− 4 C m^− 2 K^− 1 and 7.0 × 10^− 4 C m^− 2 K^− 1 have been obtained for the Bi_3.25La_0.75Ti₃O₁₂/(Na_0.5Bi_0.5)_0.94Ba_0.06TiO₃/Bi_3.25La_0.75Ti₃O₁₂ and Pb(Zr_0.4Ti_0.6)O₃/(Na_0.5Bi_0.5)_0.94Ba_0.06TiO₃/Pb(Zr_0.4Ti_0.6)O₃ thin films, respectively. The trilayered films are promising candidates for sensor and actuator applications.     

Large-scale synthesis of single-crystalline platelet Bi3.25La0.75Ti3O12

The single-crystalline Bi_3.25La_0.75Ti₃O₁₂ micro-platelets were directly synthesized in the NaCl-KCl medium at the relative low temperature by means of molten salt synthesis method (MSS). The as-prepared Bi_3.25La_0.75Ti₃O₁₂ solid solution exhibits the monoclinic symmetry (P1a1) which was revealed by the X-ray and electron diffractions. In the NaCl-KCl medium, the square platelet of single-crystal Bi_3.25La_0.75Ti₃O₁₂ grew along its crystal habit plane (001), and its thickness increased layer by layer. The growth mechanism could be that it was an edge nucleation, grew in amorphous as early stage, and then preferentially crystallized along (001) plane.     

V-doping effects on ferroelectric properties of K0.5Bi4.5Ti4O15 thin films

V-doped K_0.5Bi_4.5Ti₄O₁₅ (K_0.5Bi_{4.5 − x/3}Ti_4 − xV_xO₁₅, KBTiV-x, x = 0.00, 0.01, 0.03, and 0.05) thin films were prepared on a Pt(111)/Ti/SiO₂/Si(100) substrate by a chemical solution deposition method. The thin films were annealed by using a rapid thermal annealing process at 750 °C for 3 min in an oxygen atmosphere. Among them, KBTiV-0.03 thin film exhibited the most outstanding electrical properties. The value of remnant polarization (2P_r) was 75 μC/cm² at an applied electric field of 366 kV/cm. The leakage current density of the thin film capacitor was 5.01 × 10⁻⁸ at 100 kV/cm, which is approximately one order of magnitude lower than that of pure K_0.5Bi_4.5Ti₄O₁₅ thin film capacitor. We found that V doping is an effective method for improving the ferroelectric properties of K_0.5Bi_4.5Ti₄O₁₅ thin film.     

Hysteresis in metal insulator semiconductor structures with high temperature annealed ZrO2/SiOx layers

Hysteresis behaviour in sandwich structure — zirconium oxide/chemical silicon oxide, annealed at temperature of 850 °C in oxygen ambient, was studied. Formation of thin ZrSi_xO_y layer due to the high temperature annealing was found. Metal-insulator-semiconductor (MIS) capacitors using ZrO₂/ZrSi_xO_y/SiO_x insulator were studied. High-frequency capacitance-voltage (HF C-V), current-voltage (I-V) and current-time (I-t) measurements were carried out on the Al/ZrO₂/ZrSi_xO_y/SiO_x/Si capacitors.Two leakage current components were identified — tunneling current component at high electric fields and transient current component at low fields. The transient leakage currents are due to charge trapping phenomena. The measured I-t characteristics are related with charging/discharging and dielectric relaxation phenomena. A counter-clockwise HF C-V hysteresis, larger than 2 V at thickness of the stack structure of about 50 nm was observed.Metal-insulator-semiconductor field effect transistors (MISFETs) using ZrO₂/ZrSi_xO_y/SiO_x-gate insulator were studied. P-channel MISFETs with aluminum gate electrode were fabricated on standard n-type silicon substrates. Due to charging/discharging phenomena in the gate dielectric the transistors can be switched between On- and Off-state with the polarity of applied stress voltage.     

Processing, dielectric properties and impedance characteristics of Na0.5Bi0.5Cu3Ti4O12 ceramics

Na_0.5Bi_0.5Cu₃Ti₄O₁₂ (NBCTO) ceramics were prepared by conventional solid-state reaction method. The phase structure, microstructure and dielectric properties of NBCTO ceramics sintered at various temperatures with different soaking time were investigated. Pure NBCTO phase could be obtained with increasing the temperature and prolonging the soaking time. High dielectric permittivity (13,495) and low dielectric loss (0.031) could be obtained when the ceramics were sintered at 1000 °C for 7.5 h. The ceramics sintered at 1000 °C for 7.5 h also showed good temperature stability (−4.00 to −0.69%) over a large temperature range from −50 to 150 °C. Complex impedances results revealed that the grain was semiconducting and the grain boundaries was insulating. The grain resistance (R_g) was 12.10 Ω cm and the grain boundary resistance (R_gb) was 2.009 × 10⁵ Ω cm when the ceramics were sintered at 1000 °C for 7.5 h.     

The effect of stress on the dielectric constants of Bi4Ti3O12 films

Both experiment and theory have shown that the stress has a notable impact on the polarization of Nd-doped Bi₄Ti₃O₁₂ films. In this paper, thermodynamic theory is used to study the effect of stress on the dielectric constants of Bi₄Ti₃O₁₂ films at room temperature with a two-dimensional model. Results indicate that the change of the dielectric constant for a-phase induced by the lattice distortion is far greater than that for c-phase. Considering the domain reorientation, the external tensile stress may lead to an obvious decrease in the effective dielectric constant of Bi₄Ti₃O₁₂ films.     

Ac conductivity and dielectric properties of Ge20Se75In5 films

Amorphous films of Ge₂₀Se₇₅In₅ chalcogenide glass were prepared using a thermal evaporation technique. The chemical composition of the deposited films was examined using energy dispersive X-ray spectroscopy (EDX). The ac conductivity and dielectric properties of the prepared films have been studied as a function of temperature in the range from 300 to 423 K and frequency in the range from 10² to 10⁵ Hz. The experimental results indicate that ac conductivity σ_ac(ω) is proportional to ω^s where s equals 0.902 at room temperature and decreases with increasing temperature. The results obtained are discussed in terms of the correlated barrier hopping (CBH) model. The density of localized states N(E_F) at the Fermi level is found to have values of the order 10¹⁹ eV⁻¹ cm⁻³, which increase with temperature. The dielectric constant ?₁ and dielectric loss ?₂ were found to decrease with increasing frequency and to increase with increasing temperature over the ranges studied. The maximum barrier height W_m was estimated from an analysis of the dielectric loss ?₂ according to Giuntini equation. Its value for the deposited films (0.43 eV) agrees with that proposed by the theory of hopping of charge carrier over a potential barrier as suggested by Elliott for chalcogenide glasses.