Thermal resistance evaluation of high-speed VCSELs: an isothermaloptical transient technique

A new method for the estimation of the overall thermal resistance of high-speed vertical-cavity surface-emitting lasers (VCSELs) is presented. The method is based on an isothermal optical transient (IOT) approach heavily relying on the following two basic features: 1) the high-speed VCSELs have an optical-electrical transient response much faster than their thermal response, and 2) each operating point, defined by the driving current, the emitted optical power, and the internal temperature of the VCSEL is unique. As a proof of concept, the IOT procedure has been simulated using accurate VCSEL models. These simulations have clearly demonstrated the potential of the IOT method to achieve accurate estimates of the overall thermal resistance of VCSELs     

Innovative methodology to extract dynamic compact thermal models: Application to power devices

This paper presents a new and innovative methodology for power components manufacturers to generate accurate boundary condition independent dynamic Compact Thermal Models (“BCI” DCTMs). The originality of this methodology is summarized by taking into account the thermal behavior of electronic components containing several cooling surfaces, and representing the non-linear properties of materials, while keeping a simple and recurring structure of generated models. Moreover, the proposed method makes it possible to obtain DCTMs with a limited number of measurements or 3D thermal simulations. The methodology to construct the DCTM is based on the construction of an equivalent thermal RC network. The precision of the RC thermal network is improved using variable resistances and capacitances related to the heat fluxes so that the compact model can adapt automatically with boundary conditions.     

Multi-port dynamic compact thermal models of dual-chip package using model order reduction and metaheuristic optimization

Delphi-like boundary condition independent (BCI) compact thermal models (CTMs) are the standard for modelling single die packages. However their extraction, particularly in the transient case, will be time consuming due to complex numerical simulations for a large number of external conditions. Lately, new approaches to extract a BCI dynamical CTM (DCTM), based on model order reduction (MOR) were developed. Despite the numerous advantages of this recent method, the lack of numerical tools to integrate reduced-order models (ROM) makes it difficult to use at board level. In this study, a novel process flow for extracting Delphi-inspired BCI DCTMs is proposed. Thus a detailed three-dimensional model is replaced by a BCI-ROM model using FANTASTIC matrix reduction code to generate the data used in the creation of a Delphi-style BCI DCTM. That hybrid reduction method has been applied, at first on a single-chip package (QFN16) then on a dual-chip package (DFN12). Their derived CTM and DCTM have been compared in term of accuracy and creation time using, or not, MOR reduction technique. The results show that for a similar accuracy, the integration of MOR technique allows minimizing the time-consuming numerical simulations and consequently reduce the thermal network creation time by 80%.     

Design of low-power single-stage operational amplifiers based on an optimized settling model

Settling behavior of operational amplifiers (opamps) is important in many analog signal-processing applications. In this paper, the analysis of single-stage opamps based on settling time has been performed. A simple yet accurate model for the settling response of first-order opamps that modifies conventional models is proposed to revise the equations. The presented approach leads to a new simple settling-based design methodology for single-stage operational amplifiers. Circuit-level simulations demonstrate the effectiveness of the procedure.     

A novel algorithm to study the impact of the mismatch on analog building blocks: a case study in basic 35 nm CMOS amplifiers

In this paper, the context of modeling of the impact of mismatch and statistical variations on analogue circuit building blocks is emphasized. The aim is to develop a new algorithm which predicts the statistical behavior of important parameters of an amplifier including output resistance, voltage gain and trans-conductance. The relative error of standard deviation of statistical parameters will remain less than 5% compared with the most accurate Monte-Carlo (MC) simulations using atomistic library model-cards. In comparison with other models which are based on the normal distribution of parameters, the proposed model does not need this limiting presumption. On the other hand, the proposed algorithm is more efficient compared with time consuming MC atomistic simulations.     

Self-heating characterization and extraction method for thermal resistance and capacitance in HV MOSFETs

This letter reports on the self-heating effect (SHE) characterization of high-voltage (HV) DMOSFETs and the accurate extraction of the equivalent thermal impedance of the device (thermal resistance, R/sub TH/, and capacitance, C/sub TH/) needed for advanced device and IC simulation. A simple pulsed-gate experiment is proposed and the influence of its parameters (pulse duration and duty factor) are analyzed. It is demonstrated that in our 100 V DMOSFET, SHE is cancelled by using pulses with duration less that 2 /spl mu/s and duty factor lower that 1:100. The new extraction method exploits analytical modeling and dedicated extraction plots for thermal resistance and capacitance using the measurements of output characteristics at various applied pulses and the gradual reduction of SHE with pulse duration and duty factor. Both R/sub TH/ and C/sub TH/ are extracted in saturation region considering their dependence on SHE and external temperature. In DMOSFETs, the thermal resistance is shown to be a significant linear function of the device temperature (in our device, R/sub TH/ could increase by more than 100% over 100/spl deg/C). The thermal capacitance appears to decrease with the injected power and shows a plateau at high V/sub D/. SPICE simulations with the extracted thermal network R/sub TH/-C/sub TH/ circuit are finally used to fully validate the proposed method.     

Non-linear thermal simulation at system level: Compact modelling and experimental validation

In this work, a general methodology to extract compact, non-linear transient thermal models of complex thermal systems is presented and validated. The focus of the work is to show a robust method to develop compact and accurate non-linear thermal models in the general case of systems with multiple heat sources. A real example of such a system is manufactured and its thermal behaviour is analyzed by means of Infra-Red thermography measurements. A transient, non-linear Finite-Element-Method based model is therefore built and tuned on the measured thermal responses. From this model, the transient thermal responses of the system are calculated in the locations of interest. From these transient responses, non-linear compact transient thermal models are derived. These models are based on Foster network topology and they can capture the effect of thermal non-linearities present in any real thermal system, accounting for mutual interaction between different power sources. The followed methodology is described, verification of the model against measurements is performed and limitations of the approach are therefore discussed. The developed methodology shows that it is possible to capture strongly non-linear effects in multiple-heat source systems with very good accuracy, enabling fast and accurate thermal simulations in electrical solvers.     

Electro-thermal simulation including a temperature distribution inside power semiconductor devices

The idea of including non-uniform temperature distribution into power semiconductor device models is not new, as accurate electro-thermal simulations are required for designing compact power electronic systems (as integrated circuits or multi-chip modules). Electro-thermal simulations of a PIN-diode based on the finite-element method, show a non-uniform temperature distribution inside the device during switching transients. Hence the implicit assumption of a uniform temperature distribution when coupling an analytical electrical model and a thermal model yields inaccurate electro-thermal behaviour of the PIN-diode so far. If literature reports procedures regarding complex thermal network modelling, few papers address the problem of mixing adequately electrical and thermal issues. Instead of using a one-dimensional finite difference or element method, the bond graphs and the hydrodynamic method are used to build a 1D electro-thermal model of the PIN-diode. The paper focuses on electrical issues and the proper expression and localization of power losses to feed the thermal network model. The results by this original technique are compared with those given by a commercial finite-element simulator. The results are similar but the computation effort attached to the proposed technique is a fraction of that required by finite-element simulators. Moreover the proposed technique may be applied easily to other power semiconductor devices.     

Thermal-ADI - a linear-time chip-level dynamic thermal-simulation algorithm based on alternating-direction-implicit (ADI) method

Due to the dramatic increase of clock frequency and integration density, power density and on-chip temperature in high-end very large scale integration (VLSI) circuits rise significantly. To ensure the timing correctness and the reliability of high-end VLSI design, efficient and accurate chip-level transient thermal simulations are of crucial importance. In this paper, we develop and present an efficient transient thermal-simulation algorithm based on the alternating-direction-implicit (ADI) method. Our algorithm, thermal-ADI, not only has a linear run time and memory requirement , but is also unconditionally stable, which ensures that time step is not limited by any stability requirement. Extensive experimental results show that our algorithm is not only orders of magnitude faster than the traditional thermal-simulation algorithms, but also highly accurate and efficient in memory usage.     

Performance analysis of a new real-time elastographic time constant estimator

New elastographic techniques such as poroelastography and viscoelasticity imaging aim at imaging the temporal mechanical behavior of tissues. These techniques usually involve the use of curve fitting methods being applied to noisy data to estimate new elastographic parameters. As of today, however, current elastographic implementations of poroelastography and viscoelasticity imaging methods are in general too slow and not optimized for clinical applications. Furthermore, image quality performance of these new elastographic techniques is still largely unknown due to a paucity of data and the lack of systematic studies that analyze their performance limitations. In this paper, we propose a new elastographic time constant (TC) estimator, which is based on the use of the least square error (LSE) curve-fitting method and the Levenberg-Marquardt (LM) optimization rule as applied to noisy elastographic data obtained from a material in a creep-type experiment. The algorithm is executed on a massively parallel general purpose graphics processing unit (GPGPU) to achieve real-time performance. The estimator's performance is analyzed using simulations. Experimental results obtained from poroelastic phantoms are presented as a proof of principle of the new estimator's technical applicability on real experimental data. The results of this study demonstrate that the newly proposed elastographic estimator can produce highly accurate and sensitive elastographic TC estimates in real-time and at high signal-to-noise ratios.     

A closed-form formula for 2-D ohmic losses calculation in SMPStransformer foils

A new formula aimed at calculating ohmic losses in switch-mode power supply (SMPS) transformers is presented. It is based on intensive two-dimensional (2-D) finite element method (FEM) simulations, the results of which have been summarized in a closed-form formula following a “semi-empirical” approach. The main benefit of this new formula, specifically intended for industrial designers, is to combine the precision of 2-D models with the ease-of-use and speed of calculation of one-dimensional (1-D) models, on the whole frequency range. It accurately covers cases where the classical Dowell's formula significantly underestimated the losses, specifically those with significant edge effect in foil windings. Experimental validation and discussion of accuracy is provided. At the moment, the formula is only valid for one layer of foil located between a zero and a maximum of the magnetomotive force but a similar approach could be applied with success to other types of windings. Furthermore, the analytical expression proposed in the article, based on Maxwell equations, can be used as a stand-alone tool to model the real behavior of any type of winding. More accurate understanding of the 2-D field is also possible thanks to the direct link established between the losses and the geometrical data of the winding     

A time-domain method for the analysis of thermal impedance responsepreserving the convolution form

The study of the thermal behavior of complex packages such as multichip modules (MCMs) is usually carried out by measuring the so-called thermal impedance response, that is: the transient temperature after a power step. From the analysis of this signal, the thermal frequency response can be estimated, and consequently, compact thermal models may be extracted. We present a method to obtain an estimate of the time constant distribution underlying the observed transient. The method is based on an iterative deconvolution that produces an approximation to the time constant spectrum while preserving a convenient convolution form. This method is applied to the obtained thermal response of a microstructure as analyzed by finite element method as well as to the measured thermal response of a transistor array integrated circuit (IC) in a SMD package     

Simulated annealing-based algorithms for the studies of thethermoelastic scaling behavior

Simulated annealing is a robust and easy-to-implement algorithm for material simulation. However, it consumes a huge amount of computational time, especially on the studies of percolation networks. To reduce the running time, we parallelize the simulated annealing algorithm in our studies of the thermoelastic scaling behavior of percolation networks. The critical properties of the thermoelastic moduli of percolation networks near the threshold p_c are investigated by constructing a square percolation network. The properties are tested by simulations of a series of two-dimensional (2-D) percolation networks near p_c. The simulations are performed using a novel parallelizing scheme on the simulated annealing algorithm. To further accelerate the computational speed, we also propose a new conjectural method to generate better initial configurations, which speeds up the simulation significantly. Preliminary simulation results show surprisingly that the percolating phenomenon of thermal expansion does exist under certain conditions. The behavior seems to be governed by the elastic properties of a percolation network     

A novel simulation methodology for full chip-package thermo-mechanical reliability investigations

A methodology for simulating the accurate 3D structural details of a non-planarized technology chips is presented. FEM is a powerful tool used for electrical, thermal and mechanical analysis in the microelectronics industry. Manual geometry and finite element mesh generation of a 3D non-planar chip topology is extremely tedious and time consuming. Therefore, a new method, which is automatic or semi-automatic, is required to drastically reduce the pre-processing effort required for finite element simulations. Our proposed approach uses a virtual semiconductor fabrication technique to create geometry and finite element mesh on complex chip topology features. A microscopic power metal stack of a power IC was simulated to demonstrate this new simulation methodology and the results are presented. These numerical simulations, which included the non-linear behavior in the matrix, show that the detailed information of the large stress and strain gradients in the micro-fields can be obtained.     

A comprehensive circuit-level model of vertical-cavitysurface-emitting lasers

The increasing interest in vertical-cavity surface-emitting lasers (VCSEL's) requires the corresponding development of circuit-level VCSEL models for use in the design and simulation of optoelectronic applications. Unfortunately, existing models lack either the computational efficiency or the comprehensiveness warranted by circuit-level simulation. Thus, in this paper we present a comprehensive circuit-level model that accounts for the thermal and spatial dependence of a VCSEL's behavior. The model is based on multimode rate equations and empirical expressions for the thermal dependence of the active-layer gain and carrier leakage, thereby facilitating the simulation of VCSEL's in the context of an optoelectronic system. To confirm that our model is valid, we present sample simulations that demonstrate its ability to replicate typical dc, small-signal, and transient operation, including temperature-dependent light-current (LI) curves and modulation responses, multimode behavior, and diffusive turn-off transients. Furthermore, we verify our model against experimental data from four devices reported in the literature. As the results will show, we obtained excellent agreement between simulation and experiment     

热成像系统静态性能模型研究的进展

性能模型及其计算机模拟是热成像技术的重要环节，它可为系统设计、分析、论证以及新思想的产生提供理论依据和分析工具，世界各国都将其作为一个重点研究的课题，美国已陆续提出几个模型版本，随着我国热成像技术的发展，性能模型研究也取得一些进展。本文综述了国内外热成像系统静态性能模型研究的进展，分析了部分模型的思想和技术处理特点，提出了需要注意的动向。     

Wafer level measurements and numerical analysis of self-heating phenomena in nano-scale SOI MOSFETs

We present an experimental technique and a Finite Element thermal simulation for the determination of the temperature elevation in Silicon on Insulator (SOI) MOSFETs due to self-heating. We evaluate the temperature elevation in two steps, as we calibrate the gate resistance over temperature with the transistor at off state at a first stage, and then we deduce the temperature elevation through gate resistance measurements. We simulate the self-heating phenomena in a Finite Elements Method (FEM) environment, both with 2D and 3D models. In order to set up the simulations, we weight the effects of several parameters, such as thermal material properties, the modeling of heat generation and a careful setting of boundary conditions. We present typical temperature fields and local heat fluxes, thus giving concrete indications for solving thermal reliability issues. Simulation results show temperature elevations up to approximately 120 K in the hot spot, 70 K in the gate and 7 K in the Back End of Line (BEoL). The 3D model gives results that are satisfying over the whole set of MOSFETs we consider in this work. Temperature elevation strongly depends on physical dimensions, where transistors endowed with shorter gates suffer from more severe self-heating. We propose a simplified model based on geometrical parameters that predict maximum and gate temperatures, obtaining satisfying results. Since correlation with measurements confirms the correctness of our model, we believe that our simulations could be a useful tool to determine accurate reliability rules and in a context of thermal aware design.     

Qualitative models of molecular function: linking genetic polymorphisms of tRNA to their functional sequelae

The exponential growth in the volume of biological information available makes it difficult for researchers to assemble the details into coherent models. Although an accurate model is ideal, full details are not generally available and are gained only incrementally. Therefore, as a first step toward integration of information, we propose a knowledge model for the qualitative representation of the relationships between mutations in genes and their effects at molecular cellular and clinical phenotypic levels. Our framework combines and extends two components: 1) a workflow model that allows hierarchical process and participant specifications; 2) Transparent Access to Multiple Bioinformatics Information Sources and the Unified Medical Language System, which serve as controlled biological and medical terminologies. By mapping our framework to Petri nets, we can perform qualitative simulations to validate models, and aid in predicting system behavior in the presence of dysfunctional components. This can be a step toward accurate quantitative models. Our application domain is the role of transfer ribonucleic acid molecules in protein translation-related disease. As an initial evaluation, we show that Petri nets derived from the historic and current views of the translation process yield different dynamic behavior. Our model is available at http://smi.stanford.edu/projects/helix/pubs/process-model/.     

Numerical simulation of thermal wave propagation during laser processing of thin films

A numerical model is developed to represent the thermal wave propagation during ultrashort pulsed laser processing of thin films. The model developed is based on the solution of non-Fourier heat conduction problem with temperature and thermal flux delays using discontinuous finite-element method. The mathematical formulation is described and computational procedures are given. The computer model is validated using the analytical solution for one-dimensional (1-D) thermal wave equations. Numerical simulations are performed to study the thermal wave propagation in a GaAs thin film exposed to ultrashort laser pulses. A wavelike behavior of the thermal signal propagation is observed, and the diffusive effect of the time relaxation in the temperature gradient is calculated and discussed. The thermal behavior of thin films under laser radiation is also studied as a function of various process parameters including pulse duration, laser pulse shapes and characteristic times of heat fluxes.