n-GaAs Schottky diodes metallized with Ti and Pt/Ti

The electrical characteristics and interdiffusion in n-GaAs Schottky diodes containing Ti and Pt/Ti have been studied using I-V, C-V, X-ray diffraction and Rutherford backscattering measurements. Thermal aging of the diodes was carried out in vacuo at 350 and 500°C. The Ti/n-GaAs diodes show near-ideal forward I-V characteristics with the ideality parameter $\text{n ? 1·03}$ and the barrier height φ_B ～ 0·84V. C-V data yield the same φ_B. No interdiffusion was observed at 350°C. At 500°C, TiAs forms but the φ_B remains unchanged. Pt/Ti/n-GaAs diodes behave “Pt-like” upon aging at 500°C with φ_B ～ 0·9V and n ～ 1·1. The TiAs formed at 500°C is ineffective in preventing a subsequent Pt/GaAs interaction which leads to a layered arrangement of reaction products consisting of Pt₃Ga/TiAs/PtAs₂/n-GaAs.     

High performance n/p and p/n germanium diodes at low-temperature activation annealing

In this work we demonstrate the fabrication and characterization of high performance junction diodes using annealing temperatures within the temperature range of 300-350 °C. The low temperature dopant activation was assisted by a 50 nm platinum layer which transforms into platinum germanide during annealing. The fabricated diodes exhibited high forward currents, in excess of 400 A/cm² at ∼|0.7| V for both p⁺/n and n⁺/p diodes, with forward to reverse ratio I_F/I_R greater than 10⁴. Best results for the n⁺/p junctions were obtained at the lower annealing temperature of 300 °C. These characteristics compare favorably with the results of either conventional or with Ni or Co assisted dopant activation annealing. The low-temperature annealing in combination with the high forward currents at low bias makes this method suitable for high performance/low operating power applications, utilizing thus high mobility germanium substrates.     

Electron bombardment effect on the reverse I–V characteristics and tensosensibility of p+-nGaAs diodes

The effect of ≈2 MeV electron bombardment on the reverse characteristics and tensoelectric properties in p⁺-nGaAs diodes is investigated. The reverse breakdown voltage showed a weak increase due to irradiation and an anomalous temperature dependence in the range 77–300 K. The I–V characteristics in electron-irradiated diodes revealed a high pressure sensitivity (tensosensibility) to the external hydrostatic pressure (up to 6 · 10⁸ Pa). The peculiarities in the reverse I–V characteristics of diodes investigated point to the presence of a radiation-induced deep trap (acceptor-type level at about E₀ ? 0.3 + 0.4 eV), which is attached to the Γ₁₅^V-maximum of the valence band.     

Characterization of aluminum/LPCVD polysilicon Schottky barrier diodes

The I-V characteristics of aluminum Schottky diodes made on LPCVD deposited polysilicon with a wide range of doping concentration (8.5 × 10¹⁵−1.7 × 10²⁰ cm⁻³) have been investigated. Diodes with ideality factor n = 1.12 at room temperature were obtained with doping concentration ≤ 8.5 × 10¹⁶ cm⁻³. In contrast to large grain polysilicon, uniform I-V characteristics can be obtained across the wafer on fine grain LPCVD polysilicon. A barrier height of qφ_B0.73 eV at 300 K was consistently determined from both the I-V measurements and the specific contact resistance measurements. The contact resistance of aluminum/polysilicon contacts is well described by present theory except in the intermediate doping range.     

Characteristics of RF reactive sputter-deposited Pt/SiO2/n-InGaN MOS Schottky diodes

All RF sputtering-deposited Pt/SiO₂/n-type indium gallium nitride (n-InGaN) metal–oxide–semiconductor (MOS) diodes were investigated before and after annealing at 400 °C. By scanning electron microscopy (SEM), the thickness of Pt, SiO_2, n-InGaN layer was measured to be ~250, 70, and 800 nm, respectively. AFM results also show that the grains become a little bigger after annealing, the surface topography of the as-deposited film was smoother with the rms roughness of 1.67 nm and had the slight increase of 1.92 nm for annealed sample. Electrical properties of MOS diodes have been determined by using the current–voltage (I–V) and capacitance–voltage (C–V) measurements. The results showed that Schottky barrier height (SBH) increased slightly to 0.69 eV (I–V) and 0.82 eV (C–V) after annealing at 400 °C for 15 min in N₂ ambient, compared to that of 0.67 eV (I–V) and 0.79 eV (C–V) for the as-deposited sample. There was the considerable improvement in the leakage current, dropped from 6.5×10⁻⁷ A for the as-deposited to 1.4×10⁻⁷ A for the 400 °C-annealed one. The annealed MOS Schottky diode had shown the higher SBH, lower leakage current, smaller ideality factor (n), and denser microstructure. In addition to the SBH, n, and series resistance (R_s) determined by Cheungs׳ and Norde methods, other parameters for MOS diodes tested at room temperature were also calculated by C–V measurement.     

Electrical and photovoltaic properties of a n-Si/chitosan/Ag photodiode

The electrical and photovoltaic properties of AuSb/n-Si/chitosan/Ag diode have been investigated. The ideality factor, barrier height and Richardson constant values of the diode at room temperature were found to be 1.91, 0.88 eV and 121.4 A/cm² K², respectively. The ideality factor of the diode is higher than unity, suggesting that the diode shows a non-ideal behaviour due to series resistance and barrier height inhomogeneities. The barrier height and ideality factor values of Ag/CHT/n-Si diode at room temperature are significantly larger than that of the conventional Ag/n-Si Schottky diode. The φ_B value obtained from C-V measurement is higher than that of φ_B value obtained from I-V measurement. The discrepancy between φ_B(C-V) and φ_B(I-V) barrier height values can be explained by Schottky barrier height inhomogeneities. AuSb/n-Si/chitosan/Ag diode indicates a photovoltaic behaviour with open circuit voltage (V_oc = 0.23 V) and short-circuit current density (J_sc = 0.10 μA/cm⁻²) values.     

Device processing and characterisation of high temperature silicon carbide Schottky diodes

High temperature silicon carbide diodes with nickel silicide Schottky contacts were fabricated by deposition of titanium-nickel metal film on 4H-SiC epitaxial wafer followed by annealing at 550 °C in vacuum. Room temperature boron implantation have been used to form single zone junction termination extension. 4H-SiC epitaxial structures designed to have theoretical parallel-plain breakdown voltages of 1900 and 3600 V have been used for this research. The diodes revealed soft recoverable avalanche breakdown at voltages of 1450 and 3400 V, respectively, which are about 80% and 95% of theoretical values. I-V characteristics of fabricated 4H-SiC Schottky diodes have been measured at temperatures from room temperature up to 400 °C. The diodes revealed unchangeable barrier heights and ideality factors as well as positive coefficients of breakdown voltage.     

Effect of thermal annealing on the sensitivity of Si-based MOS diodes to reducing gases

We study the effect of thermal annealing in the range of 200–610°C on the sensitivity and time dependences of the response of the Pd-SiO₂-n-Si diodes to hydrogen and ammonia. The postannealing surface of a Pd electrode was examined using atomic force microscopy. The high-frequency C-V characteristics were measured in air and gas mixtures H₂-air and NH₃-air. It is shown that, after annealing at 200°C for 10 min, the response of diode capacitance to hydrogen is higher than that to ammonia. After annealing at 300°C and higher, the sensitivity of MOS diodes to hydrogen nearly vanishes. The response to ammonia still remains high, although it gradually weakens as the annealing temperature is increased. A decrease in sensitivity of the Pd-SiO₂-n-Si diodes to ammonia with increasing temperature is attributed to worsening of the electrical characteristics of the Pd electrode.     

Analysis of interface states and series resistance of MIS Schottky diodes using the current-voltage (I-V) characteristics

The purpose of this paper is to analyze interface states in Al/SiO₂/p-Si (MIS) Schottky diodes and determine the effect of SiO₂ surface preparation on the interface state energy distribution. The current-voltage (I-V) characteristics of MIS Schottky diodes were measured at room temperature. From the I-V characteristics of the MIS Schottky diode, ideality factor (n) and barrier height (Φ_B) values of 1.537 and 0.763 eV, respectively, were obtained from a forward bias I-V plot. In addition, the density of interface states (N_ss) as a function of (E_ss-E_v) was extracted from the forward bias I-V measurements by taking into account both the bias dependence of the effective barrier height (Φ_e), n and R_s for the MIS Schottky diode. The diode shows non-ideal I-V behaviour with ideality factor greater than unity. In addition, the values of series resistance (R_s) were determined using Cheung’s method. The I-V characteristics confirmed that the distribution of N_ss, R_s and interfacial insulator layer are important parameters that influence the electrical characteristics of MIS Schottky diodes.     

Thermally annealed Ni/n-GaAs(Si)/In Schottky barrier diodes

We have identically prepared as many as eight Ni/n-GaAs/In Schottky barrier diodes (SBDs) using an n-type GaAs substrate with a doping density of about 7.3 × 10¹⁵ cm⁻³. The thermal stability of the Ni/n-GaAs/In Schottky diodes has been investigated by means of current-voltage (I-V) techniques after annealed for 1 min in N₂ atmosphere from 200 to 700 °C. For Ni/n-GaAs/In SBDs, the Schottky barrier height Φ_b and ideality factor n values range from 0.853 ± 0.012 eV and 1.061 ± 0.007 (for as-deposited sample) to 0.785 ± 0.002 eV and 1.209 ± 0.005 (for 600 °C annealing). The ideality factor values remained about unchanged up to 400 °C annealing. The I-V characteristics of the devices deteriorated at 700 °C annealing.     

The effect of annealing temperature on the electronic parameters and carrier transport mechanism of Pt/n-type Ge Schottky diode

The Pt nano-film Schottky diodes on Ge substrate have been fabricated to investigate the effect of annealing temperature on the characteristics of the device. The germanide phase between Pt nano-films and Ge substrate changed and generated interface layer PtGe at 573 K and 673 K, Pt₂Ge₃ at 773 K. The current–voltage(I - V) characteristics of Pt/n-Ge Schottky diodes were measured in the temperature range of 183–303 K. Evaluation of the I - V data has revealed an increase of zero-bias barrier height Φ_B0 but the decrease of ideality factor n with the increase in temperature. Such behaviors have been successfully modeled on the basis of the thermionic emission mechanism by assuming the presence of Gaussian distributions. The variation of electronic transport properties of these Schottky diodes has been inferred to be attributed to combined effects of interfacial reaction and phase transformation during the annealing process. Therefore, the control of Schottky barrier height at metal/Ge interface is important to realize high performance Ge-based CMOS devices.     

Diode characteristics and edge effects of metal-semiconductor diodes

When investigating metal-semiconductor barriers, measured I–V-characteristics are often used for deducing barrier height, origin of current components etc. This paper discusses under what conditions errors may be caused by edge-generated currents, and the influence of guard rings is investigated. The system studied was gold on chemically prepared silicon. Investigating reverse characteristics, it was shown that, for diodes having diameters of a few mm, edge effects are important when the silicon resistivity is $\text{? 100 Ω}\text{cm}$, but negligible for lower ?. Diodes with no guard rings (NGR) had currents several times those surrounded by rings held at the same voltage (balanced guard ring, BGR), at low voltages, and the excess increased with voltage. Studies of activation curves for the current revealed that the current in the BGR case essentially obeyed a Schottky barrier expression (barrier height 0·75–0·80 V) while NGR curves showed appreciably smaller activation energies, indicating contribution of surface- and volume-generated currents at the edge. For diodes of low resistivity avalanche effects are important at high voltages. The main features of the current variation with voltage for higher resistivity BGR diodes (up to $\text{30}\text{k}\text{Ω}\text{cm}$) are in agreement with the image-force lowering effect and the influence of bulk generation current.     

Electrical behavior of Np AlGaAs/GaAs heterojunctions with high acceptor concentrations

The electrical behavior of molecular-beam-epitaxy grown Np⁺ AlGaAs/GaAs heterojunction diodes with acceptor concentration as high as 4 × 10¹⁹/cm³ and abrupt conduction band spike was studied. The behavior of the heterojunction diodes has been compared to that obtained for the similar Np AlGaAs/GaAs structure diode with acceptor concentration of 2 × 10¹⁸/cm³. The latter was reported by the other authors recently. The studies were made by both experimental measurements and simulation based on simple assumptions. Experimentally obtained I-V characteristics at large forward-bias voltages gave the ideality factor n = 1.25–1.30 with fairly good agreement with previously reported data. Meanwhile, it was found that a shift of the bias voltage by about −0.2 V was necessary in order to get a coincidence of I-V characteristics at high forward-bias voltages with those given in the reported paper. This shift was ascribed to the difference of the acceptor concentration N_A of p-GaAs region for both specimens. Namely, one is 4 × 10¹⁹/cm³ and the other one is 2 × 10¹⁸/cm³. This was reasonably confirmed by the energy band diagrams for both specimens deduced by means of the simulation. The I-V characteristics obtained by the simulation for the diodes with the various N_A values also supported the observed bias voltage shift. It was suggested that the optimum value of N_A should be chosen to obtain the high performance HBTs with Np⁺ AlGaAs/GaAs heterojunction emitter.     

Effect of annealing in argon on the properties of thermally deposited gallium-oxide films

The effect of the annealing temperature on the I–V, C–I, and G–V characteristics and transparency of gallium-oxide films is investigated. The films are fabricated by the thermal evaporation of Ga₂O₃ powder on n-GaAs wafers. It is shown that the films which are amorphous after deposition crystallize upon annealing at temperatures T _an ≥ 800°C. The electrical characteristics and photoresponse of the V/Ni-GaAs-GaAs-Ga _x O _y -V/Ni samples to visible radiation depend on the structure and phase composition of the films.     

Temperature dependent current-voltage characteristics of n-MgxZn1−xO/p-GaN junction diodes

This study investigates the temperature dependence of the current-voltage (I-V) characteristics of n-Mg_xZn_1−xO/p-GaN junction diodes. The n-Mg_xZn_1−xO films were deposited on p-GaN using a radio-frequency (rf) magnetron sputtering system followed by annealing at 500, 600, 700, and 800 °C in nitrogen ambient for 60 s, respectively. The n-Mg_xZn_1−xO/p-GaN diode at a substrate temperature of 25 °C had the lowest leakage current in reverse bias. However, the leakage current of the diodes increased with an increase in annealing temperatures. The temperature sensitivity coefficients of the I-V characterizations were obtained at different substrate temperatures (25, 50, 75 100, and 125 °C) providing extracted values of 26.4, 27.2, 17.9, and 0.0 mV/°C in forward bias and 168.8, 143.4, 84.6, and 6.4 mV/°C in reverse bias, respectively. The n-Mg_xZn_1−xO/p-GaN junction diode fabricated with Mg_xZn_1−xO annealed at 800 °C demonstrated the lowest temperature dependence. Based on these findings, the n-Mg_xZn_1−xO/p-GaN junction diode is feasible for GaN-based heterojunction bipolar transistors (HBTs).     

A study of the conduction properties of a rectifying nGaAs-n(Ga,Al)As heterojunction

The I–V characteristics of a rectifying nGaAs-nAl_xGa_1-xAs heterojunction (x ≈ 0.28) have been measured over a temperature range of 145–300°K and compared with theory. The non-saturating behavior of the reverse current can be explained by using the graded gap model for the heterojunction. The conduction band-edge step at the interface, determined from these measurements, is 280 meV, in good agreement with existing evidence. This model however fails to account for the forward current, which exhibits an anamolous “pseudo-saturation” behavior. The forward characteristics are qualitatively explained by including in the model deep-level states near the interface, which become negatively charged under forward bias.     

Effect of annealing on the Richardson constant of Al-GaAs Schottky diodes

Effect of heat-treatment on near-ideal Al-GaAs Schottky barrier diodes has been studied. Forward current-voltage and capacitance-voltage characteristics are used to determine Richardson constant and barrier height. It is shown that due to annealing at 250°C, the Richardson constant reduces by a factor of 2–3. Also, the difference between barrier heights measured from I–V and C–V characteristics is found to increase after heat-treatment. The results are interpreted in terms of an interfacial Al_xGa_1-xAs layer which gets formed during annealing.     

Characterization of interface states at Ni/nCdF2 Schottky barrier type diodes and the effect of CdF2 surface preparation

Two Schottky diodes were fabricated by evaporation of nickel on to an n-type CdF₂:YF₃ semiconductor. Diode A was prepared on a slightly etched polished surface and diode B on an unpolished strongly etched surface. The current-voltage (I-V), capacitance-voltage (C-V), and conductance-voltage (G-V) characteristics were determined at room temperature. Both diodes showed non-ideal I-V behaviour with ideality factors 1.5 and 2.0, respectively and are thought to have a metal-interface layer-semiconductor configuration. Under forward bias, the admittance showed large frequency dispersion possibly caused by the interface states in thermal equilibrium with the semiconductor. Analysis of the C-V data in terms of Lehovec's model of an interface state continuum required the supposition of two time constants differing by 2 to 3 orders of magnitude. The characteristic parameters of the interface states (energy position, density, time constant and capture cross-section) were obtained for the values of the forward bias in the range 0.0 V ≦ V ≦ 0.2 V. The diode B is found to have the interface state densities about two orders of magnitude higher than the diode A which may be attributed to the different surface treatments. The C-V measurements at 100 kHz also indicated the presence of a deep donor trap about 0.6 eV below the conduction band edge in diode A.     

CdHgTe heterostructures for new-generation IR photodetectors operating at elevated temperatures

The parameters of multilayer Cd_xHg_1–xTe heterostructures for photodetectors operating at wavelengths of up to 5 μm, grown by molecular-beam epitaxy (MBE) on silicon substrates, are studied. The passivating properties of thin CdTe layers on the surface of these structures are analyzed by measuring the C–V characteristics. The temperature dependences of the minority carrier lifetime in the photoabsorption layer after growth and thermal annealing are investigated. Samples of p ⁺–n-type photodiodes are fabricated by the implantation of arsenic ions into n-type layers, doped with In to a concentration of (1–5) × 10¹⁵ cm^–3. The temperature dependences of the reverse currents are measured at several bias voltages; these currents turn out to be almost two orders of magnitude lower than those for n ⁺–p-type diodes.     

Ta/Si Schottky diodes fabricated by magnetron sputtering technique

Electrical properties of Ta/n-Si and Ta/p-Si Schottky barrier diodes obtained by sputtering of tantalum (Ta) metal on semiconductors have been investigated. The characteristic parameters of these contacts like barrier height, ideality factor and series resistance have been calculated using current voltage (I-V) measurements. It has seen that the diodes have ideality factors more than unity and the sum of their barrier heights is 1.21 eV which is higher than the band gap of the silicon (1.12 eV). The results have been attributed the effects of inhomogeneities at the interface of the devices and native oxide layer. In addition, the barrier height values determined using capacitance-voltage (C-V) measurements have been compared the ones obtained from I-V measurements. It has seen that the interface states have strong effects on electrical properties of the diodes such as C-V and R_s-V measurements.