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1.
The expression for free carrier Faraday rotation θ and for ellipticity Δ, as the function of the applied parallel static electric field \(\mathop {E_0 }\limits_ \to \) and static magnetic field \(\mathop {B_0 }\limits_ \to \) for a given value of wave angular frequency and electron concentration N0, are obtained and theoretically analyzed with the aid of one-dimensional linearized wave theory and Kane's non-parabolic isotropic dispersion law. It is shown that the maximum Faraday rotation occurs near the cyclotron resonance condition, which can be expressed as \(\chi \omega = \omega _{ce} \) , where \(\chi = 1{1 \mathord{\left/ {\vphantom {1 {\sqrt {1 - ({{v_0 } \mathord{\left/ {\vphantom {{v_0 } {v_c }}} \right. \kern-0em} {v_c }})^2 } }}} \right. \kern-0em} {\sqrt {1 - ({{v_0 } \mathord{\left/ {\vphantom {{v_0 } {v_c }}} \right. \kern-0em} {v_c }})^2 } }}\) , \(v_c = \sqrt {{{\varepsilon _g } \mathord{\left/ {\vphantom {{\varepsilon _g } {2m}}} \right. \kern-0em} {2m}}} *\) , and \(\omega _{ce} = ({{eB_0 } \mathord{\left/ {\vphantom {{eB_0 } {m*}}} \right. \kern-0em} {m*}})\) . Here m* and e denote the effective mass and charge of electron, respectively. ?g is the forbidden bandgap of semiconductor. v0 is the carrier drift velocity, which is a non-linear function of E0 in high field condition. A possibility of a simple way of determining the non-linear “v0 vs E0” characteristics of semiconductors by the measurement of Faraday rotation is also discussed.  相似文献   

2.
Because of the extremely low amplitude of the input signal, the design of electro-neuro-graph (ENG) amplifiers involves a special care for flicker and thermal noise reduction. The task becomes really challenging in the case of implantable electronics, because power consumption is restricted to few hundreds μW. In this work, two different circuit techniques aimed to reduce flicker and thermal noise, in ultra-low noise amplifiers for implantable medical devices, are demonstrated. The circuit design, and measurement results are presented, in both cases showing an excellent performance, and noise to power consumption trade-off. In the first circuit, a very simple low-pass Gm–C chopper amplifier is used for flicker noise cancellation. It consumes only 28 mW, with a measured input referred noise and offset of 2  $ {{{\text{nV}}} \mathord{\left/ {\vphantom {{{\text{nV}}} {\sqrt {{\text{Hz}}} }}} \right. \kern-0em} {\sqrt {{\text{Hz}}} }} $ , and 2.5 μV, respectively. In the second circuit, a ultra-low noise amplifier, a energy-efficient DC–DC down-converter, and low voltage design techniques are combined, for the reduction of thermal noise with a minimum power consumption. Measured input referred noise in this case was 5.5  $ {{{\text{nV}}} \mathord{\left/ {\vphantom {{{\text{nV}}} {\sqrt {{\text{Hz}}} }}} \right. \kern-0em} {\sqrt {{\text{Hz}}} }} $ at only 380 μW power consumption. Both circuits were fabricated in a 1.5 μm technology.  相似文献   

3.
This paper deals with the problem of delay-dependent robust $H_{\infty }$ H ∞ filtering for uncertain two-dimensional (2-D) continuous systems described by Roesser state space model with time-varying delays, with the uncertain parameters assumed to be of polytopic type. A sufficient condition for $H_{\infty }$ H ∞ noise attenuation is derived in terms of linear matrix inequalities, so a robust $H_{\infty }$ H ∞ filter can be obtained by solving a convex optimization problem. Finally, some examples are provided to illustrate the effectiveness of the proposed methodology.  相似文献   

4.
We have measured the thermopower and the thermal conductivity of individual silicon and indium arsenide nanowires (NWs). In this study, we evaluate a self-heating method to determine the thermal conductivity λ. Experimental validation of this method was performed on highly n-doped Si NWs with diameters ranging from 20 nm to 80 nm. The Si NWs exhibited electrical resistivity of $\rho = (8\pm4)\, \hbox{m}\Upomega\,\hbox{cm}$ ρ = ( 8 ± 4 ) m Ω cm at room temperature and Seebeck coefficient of ?(250 ± 100) μV/K. The thermal conductivity of Si NWs measured using the proposed method is very similar to previously reported values; e.g., for Si NWs with 50 nm diameter, λ = 23 W/(m K) was obtained. Using the same method, we investigated InAs NWs with diameter of 100 nm and resistivities of $\rho = (25\pm5)\, \hbox{m}\Upomega\,\hbox{cm}$ ρ = ( 25 ± 5 ) m Ω cm at room temperature. Thermal conductivity of λ = 1.8 W/(m K) was obtained, which is about 20 to 30 times smaller than in bulk InAs. We analyzed the accuracy of the self-heating method by means of analytical and numerical solution of the one-dimensional (1-D) heat diffusion equation taking various loss channels into account. For our NWs suspended from the substrate with low-impedance contacts the relative error can be estimated to be ≤25%.  相似文献   

5.
In an earlier paper [1], we reported the observation of photoconductivity from free-carrier absorption in [Hg, Cd]Te. By using samples of [Hg, Cd]Te with different electrical and alloy properties, we have improved the near-millimeter-wave (NMMW) responsivity by over two orders of magnitude. At 1.6 K a best sample responsivity of about 185 V/W and a bandwidth of over 5 MHz have been measured. This responsivity corresponds to a Johnson-noise-limited noise-equivalent-power (NEP) of 1.6 × 10?12 \({W \mathord{\left/ {\vphantom {W {\sqrt {Hz} }}} \right. \kern-0em} {\sqrt {Hz} }}\) . Another sample of similar compposition yielded an NEP of 1.8 × 10?12 \({W \mathord{\left/ {\vphantom {W {\sqrt {Hz} }}} \right. \kern-0em} {\sqrt {Hz} }}\) and a 25 MHz bandwidth. These results coupled with a wide spectral sensitivity [1] indicate that [Hg, Cd]Te NMMW detectors compare very favorably with similar InSb detectors [2].  相似文献   

6.
In this paper we investigate δ-bit serial addition in the context of feed-forward linear threshold gate based networks. We show that twon-bit operands can be added in $2\left\lceil {\sqrt n } \right\rceil $ overall delay with a feed-forward network constructed with $\left\lceil {\sqrt n } \right\rceil + 1$ linear threshold gates and $\frac{1}{2}\left( {5\left\lceil {\sqrt n } \right\rceil ^2 + 9\left\lceil {\sqrt n } \right\rceil } \right) + 2$ latches. The maximum weight value is $2^{\left\lceil {\sqrt n } \right\rceil } $ and the maximum fan-in is $3\left\lceil {\sqrt n } \right\rceil + 1$ . We also investigate the implications our scheme have to the performance and the cost under small weights and small fan-in requirements. We deduce that if the weight values are to be limited by a constantW, twon-bit operands can be added in $\left[ {\log W} \right] + \tfrac{n}{{\left[ {\log W} \right]}}$ overall delay with a feed-forward network that has the implementation cost [logW]+1, in terms of linear threshold gates, $\tfrac{1}{2}(5[\log W]^2 + 9[\log W]) + 2$ in terms of latches and a maximum fan-in of 3[logW]+1. We also prove that, if the fan-in values are to be limited by a constantF+1, twon-bit operands can be added in $[\tfrac{F}{3}] + \tfrac{n}{{[\tfrac{F}{3}]}}$ overall delay with a feed-forward network that has the implementation cost $[\tfrac{F}{3}] + 1$ , in terms of linear threshold gates, $\tfrac{1}{2}(5[\tfrac{F}{3}]^2 + 9[\tfrac{F}{3}]) + 2$ in terms of latches, and a maximum weight value of $2^{[\tfrac{F}{3}]} $ . An asymptotic bound of $O(\tfrac{n}{{\log n}})$ is derived for the addition overall delay in the case that the weight values have to be linearly bounded, i.e., in the order ofO(n). The implementation cost in this case is in the order ofO(logn), in terms of linear threshold gates, and in the order ofO(log2 n), in terms of latches. The maximum fan-in is in the order ofO(logn). Finally, a partition technique, that substantially reduces the overall cost of the implementation for all the schemes in terms of delay, latches, weights, and fan-in with some few additional threshold gates, is also presented.  相似文献   

7.
The CAD oriented closed-form models are presented to compute frequency and conductor thickness dependent effective relative permittivity and characteristic impedance of a slot-line with finite conductor thickness in the range 3 μm–50 μm. The models have average accuracy about 2% against the full-wave results from different sources in the frequency range 2 GHz–60 GHz, \( 2.22 \leqslant {\varepsilon_r} \leqslant 20 \), \( {{0.02 \leqslant {\text{w}}} \mathord{\left/{\vphantom {{0.02 \leqslant {\text{w}}} {\text{h}}}} \right.} {\text{h}}} \leqslant 1.0 \), \( {{{{0.01 \leqslant h} \mathord{\left/{\vphantom {{0.01 \leqslant h} {{\lambda_0} \leqslant 0.25}}} \right.} {{\lambda_0} \leqslant 0.25}}} \mathord{\left/{\vphantom {{{{0.01 \leqslant h} \mathord{\left/{\vphantom {{0.01 \leqslant h} {{\lambda_0} \leqslant 0.25}}} \right.} {{\lambda_0} \leqslant 0.25}}} {\sqrt {\left( {{\varepsilon_{\text{r}}} - 1} \right)} }}} \right.} {\sqrt {\left( {{\varepsilon_{\text{r}}} - 1} \right)} }} \). The models to compute the dielectric and conductor losses are also presented that show close agreement with the results of the spectral domain analysis. The average deviations for the dielectric and conductor losses are 0.011 Np/m and 0.143 Np/m against the results of SDA in the frequency range 2 GHz–30 GHz for narrow to wide slot-width.  相似文献   

8.
The electronic structures of Co-based potential thermoelectric (TE) oxides, including $\hbox{Ca}_3\hbox{Co}_4\hbox{O}_9$ and $\hbox{Bi}_{2}\hbox{Sr}_{2}\hbox{Co}_2\hbox{O}_{y}$ (y = 8 + δ) single crystals and polycrystalline $\hbox{Ca}_3\hbox{Co}_2\hbox{O}_6$ , have been investigated by employing soft x-ray absorption spectroscopy (XAS) and photoemission spectroscopy (PES). Co 2p XAS measurements show that Co ions are nearly trivalent ( $\hbox{Co}^{3+}$ ) in all of these Co-based TE oxides with a small mixture of $\hbox{Co}^{4+}$ ions in $\hbox{Bi}_{2}\hbox{Sr}_{2}\hbox{Co}_2\hbox{O}_{y}$ . Valence-band PES and O 1s XAS measurements show that the occupied Co 3d states are located at the top of the valence bands and that the lowest unoccupied states have the primarily Co 3d character, respectively. These findings suggest the importance of the Co 3d electronic structures in determining TE properties of these Co-based oxides.  相似文献   

9.
The alternating-current (ac) conductivity and dielectric properties of Se85Te15?x Sb x (x = 0 at.%, 2 at.%, 4 at.%, and 6 at.%) films are reported in this work. Thin films were deposited by thermal evaporation under base pressure of 10?5 Torr. The films were well characterized by x-ray diffraction, differential scanning calorimetry, and energy-dispersive x-ray spectroscopy. The ac conductivity and dielectric properties have been investigated for the studied films in the temperature range from 297 K to 333 K and over the frequency range from 102 Hz to 105 Hz. The experimental results indicate that the ac conductivity $ \sigma_{\rm{ac}} (\omega ) $ and the dielectric constant depend on temperature, frequency, and Sb content. The frequency dependence of $ \sigma_{\rm{ac}} (\omega ) $ was found to be linear with a slope lying very close to unity and is independent of temperature. This behavior can be explained in terms of correlated barrier hopping between centers forming intimate valence-alternation pairs. The density of localized states N(E F) at the Fermi level is estimated. The activation energy $ \Updelta E(\omega ) $ was found to decrease with increasing frequency. The dielectric constant ε 1 and dielectric loss ε 2 were found to decrease with increasing frequency and increased with increasing temperature over the ranges studied. The maximum barrier height W m for the studied films was calculated from an analysis of the dielectric loss ε 2 according to the Guintini equation. The values agree with that proposed by the theory of hopping of charge carriers over a potential barrier as suggested by Elliott for chalcogenide glasses. The variation of the studied properties with Sb content was also investigated.  相似文献   

10.
One of the main results is a proposition to the effect that under some typically mild conditions finite sums of the form $$\sum\limits_\ell {K_\ell \sigma } \left[ {\sum\limits_m {\eta _{\ell m} Q_m (\cdot) + \rho _\ell } } \right]$$ are dense in an important sense in the set of shift-invariant approximately-finite-memory mapsG(·) that take a certain type of subsetU ofR intoR, whereR is the set of real-valued functions defined onR n orZ n . Here theQ m (·) are linear, σ is any element of a certain set of nonlinear maps fromR toR, and the κ?, ρ?, and η?m are real constants. Approximate representations comprising only affine elements and lattice nonlinearities are also presented.  相似文献   

11.
Surface radio refractivity studies are being carried out in Akure, \((7.15^{\circ }\hbox {N}, 5.12^{\circ }\hbox {E})\) South-Western Nigeria, by in-situ measurement of atmospheric pressure, temperature, and relative humidity using Wireless Weather Station (Integrated Sensor Suit, ISS). Five years of measurement (January, 2007–December, 2011) were used to compute the surface radio refractivity and its diurnal, daily, seasonal and yearly variations are analyzed. The results were then used to compute radio horizon distance \((\hbox {R}_\mathrm{DH})\) and examine the field strength (FSV) variability. Results obtained show that the surface radio refractivity, \(\hbox {N}_\mathrm{s}\) , varies with the time of the day as well as the seasons of the year. High values of \(\hbox {N}_\mathrm{s}\) were recorded in the morning and evening hours while the values were minima around 1,500 h local time. An average value of surface radio refractivity of 364.74 N-units was obtained for this location. The annual maximum mean of FSV is 15.24 dB and the minimum is 2.20 dB. This implies that the output of a receiving antenna in Akure may generally be subject to variations not less than 2 dB in a year, but can be as high as 15 dB.  相似文献   

12.
A new method that compensates for low DC gain in operational amplifiers (Op-Amps) used in discrete time $\Sigma\Delta$ Σ Δ modulators is described. Measuring and buffering the error at the Op-Amps inverting terminals enables a complete cancellation of the phase error. Nanometer Op-Amps that achieve low gain but very high bandwidth become usable at oversampling rates that still present DC gain limitation. Simulations at behavioral and 65 nm CMOS transistor level implementation verify the effectiveness of the proposed technique.  相似文献   

13.
In this paper, we investigate the most appropriate ADC for an array of probe storage devices. Power consumption and area are crucial in this application, since one ADC is associated with each read channel. The read-channel specifications of the probe storage device require an ADC with seven bits of resolution at a rate of 100 kSample/s. Five different ADC architectures have been implemented for the desired specifications: a first- and a second order discrete-time $\Sigma\Delta,$ Σ Δ , a second order continuous-time $\Sigma\Delta$ Σ Δ and a cyclic ADC. The system and circuit design methods of each architecture are presented. The different architectures are compared based on the measurement results of the five fabricated circuits.  相似文献   

14.
Recently introduced MOS-FGMOS split length cell has been used to increase the DC gain of a fully differential op amp. Resultant proposed opamp structure exhibits gain of 97 dB and unity gain bandwidth of 400 MHz with power consumption of 1.2 mW. An opamp design has been verified with Cadence Spectre using a 130 nm technology at 1.2 V and has a slew rate of \(53\,\hbox {V}/\mu \hbox {s}\) with a phase margin of \(78^{\circ }\) .  相似文献   

15.
We propose an explanation for the high electrical conductivity of the ferroelectric strontium-barium niobate. As the temperature T approaches the ferroelectric transition T c, the static dielectric constant $\varepsilon(0)$ diverges when a soft mode occurs. This divergence of $\varepsilon(0)$ reduces the donor binding energy, and increases the effective Bohr radius of the donor. The electrons bound to the donors become unbound, and the material becomes conductive.  相似文献   

16.
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18.
We propose an ultra-low power memory design method based on the ultra-low ( \(\sim \) 0.2 V) write-bitline voltage swing to reduce the write power dissipation for read-decoupled SRAM (RD-SRAM) cells. By keeping the write bitlines at ground level (0 V) during standby and charging them to a low voltage \(V_\mathrm{L}\) ( \(\sim \) 0.2 V) during write operations, the power dissipation for the write bitlines is greatly reduced (0.2 V/ \(V_\mathrm{DD})^{ 2 }\,\times \) 100 %) due to reduced voltage swing (from \(V_\mathrm{DD }\)  = 1.2 to 0.2 V) on the write bitlines. The proposed method is applicable to both dual-voltage and single-voltage operations. We analyze the proposed ultra-low write-bitline voltage swing method and investigate its reliability based on 10K Monte-Carlo simulations. We further verify the functionality and performance of our proposed design through measurements on the fabricated prototypes based on the 65 nm CMOS process. By means of a \(256 \times 64\) bit RD-SRAM memory implementation, we show that our proposed method reduces 87 % write power dissipation when compared to a conventional design.  相似文献   

19.
Log-domain Delta-Sigma ( $\Delta \Sigma$ ) modulators are attractive for implementing analog-to-digital (A/D) converters (ADCs) targeting low-power low-voltage applications. Previously reported log-domain $\Delta \Sigma$ modulators were limited to 1-bit quantization and, hence, could not benefit from the advantages associated with multibit quantization (namely, reduced in-band quantization noise, and increased modulator stability). Unlike classical $\Delta \Sigma$ modulators, directly extending a log-domain $\Delta \Sigma$ modulator with a 1-bit quantizer to a log-domain $\Delta \Sigma$ modulator with a multibit quantizer is challenging, in terms of CMOS circuit implementation. Additionally, the realization of log-domain $\Delta \Sigma$ modulators targeting high-resolution applications necessitates minimization of distortion and noise in the log-domain loop-filter. This paper discusses the challenges of multibit quantization and digital-to-analog (D/A) conversion in the log-domain, and presents a novel multibit log-domain $\Delta \Sigma$ modulator, practical for CMOS implementation. SIMULINK models of log-domain $\Delta \Sigma$ modulator circuits are proposed, and the effects of various circuit non-idealities are investigated, including the effects of log-domain compression–expansion mismatch. Furthermore, this paper proposes novel low-distortion log-domain analog blocks suitable for high-resolution analog-to-digital (A/D) conversion applications. Circuit simulation results of a proposed third-order 3-bit class AB log-domain $\Delta \Sigma$ loop-filter demonstrate 10.4-bit signal-to-noise-and-distortion-ratio (SNDR) over a 10 kHz bandwidth with a $0.84\,V_{pp}$ differential signal input, while operating from a 0.8 V supply and consuming a total power of $35.5\,\upmu \hbox {W}.$   相似文献   

20.
This paper proposes a 9.9 V ASK demodulator for the high-impedance micro-stimulating electrode. In order to receive the 9.9 V ASK modulated signal, a cascoded HV rectifier is utilized to rectify the HV (high voltage) ASK modulated signal and generates a miniature rectified signal with voltage \(<\) 3.3 V, such that the reliability problem can be avoided. Besides, a differential generator and a differential shaper are employed to amplify the miniature rectified signal. The theoretical analysis and the condition are given to guarantee the proposed ASK demodulator functionally working in all process and temperature corners. Besides, the aspect ratios of the MOS transistors can be easily found according to the analysis results. The simulation and measurement results are also given to verify the analysis results. Thus, the HV modulated signal could be demodulated easily without any off-chip step-down circuit, boost circuit and HV process required. The proposed design is carried out using TSMC 0.35  \(\upmu \) m CMOS process. The core area is \(109.515 \times 56.925\,\upmu {\text {m}}^2\) . The maximum data rate is measured to be 1.25 Mbps with the carrier frequency of 12.5 MHz.  相似文献   

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