Erratum

Calculations have been made that show how severely areal inhomogeneity can degrade solar-cell conversion efficiency. Two general types of areal inhomogeneity are discussed. In the first type, the emitter recombination current controls the I-V characteristics for voltages near the maximum power voltage, and areal variations in the structural or material parameters of the emitter are assumed to occur. For this type of areal inhomogeneity, if no more than 5% of the area is much inferior to the rest of the cell area, then the cell efficiency is nearly as poor as it would be if the entire area were of inferior quality. In the second type of areal inhomogeneity, the base recombination current controls the dark I-V characteristics, and areal variations in the base minority-carrier lifetime are assumed to occur. For this type, the poor-quality area again dominates in determining the conversion efficiency, though less strongly than for the first type of areal inhomogeneity. An extension of the method used to demonstrate this behavior can provide a first-order solution of the general three-dimensional boundary-value problem resulting from areal inhomogeneity; this extension is briefly described.     

Noise associated with recombination in the emitter space charge region of transistors

We have measured the noise associated with the recombination current I_R in the emitter space charge region of a p-n-p transistor at 100°K and find I_EQ = ζI_R, where ξ lies above 0.75 and increases with increasing emitter current. Lauritzen's theory predicts ζ = 0.75; the reasons for this relatively small discrepancy are discussed.     

Some aspects of current gain variations in bipolar transistors

This paper deals with the study of the main mechanisms involved in the bipolar transistor current-gain variations.In the first part, we describe some properties of characteristic parameters N_S and I_SR of the surface “diode”; an attempt is made to explain the strong correlation between N_S and I_SR.In a second part, we analyse the influence of emitter current crowding, high injection in the base region, and base widening effects on the high level bias current gain value. Critical current densities beyond which each of these effects takes place are defined, allowing us to evaluate their comparative importance at a given collector current value. Our study shows that, on the one hand, for transistors affected by emitter-current crowding, the surface currents play an essential part in the high level bias current gain fall off and, on the other hand, the base widening effect has a very great influence on the static (I_C, V_EB) characteristic and on the emitter injection efficiency value.In the third part, the experimental results obtained are reported and compared with previously proposed analytical relations.     

Characterization of current-voltage (I-V) and capacitance-voltage-frequency (C-V-f) features of Al/SiO2/p-Si (MIS) Schottky diodes

The current-voltage (I-V) characteristics of metal-insulator-semiconductor Al/SiO₂/p-Si (MIS) Schottky diodes were measured at room temperature (300 K). In addition, capacitance-voltage-frequency (C-V-f) characteristics are investigated by considering the interface states (N_ss) at frequency range 100 kHz to 1 MHz. The MIS Schottky diode having interfacial insulator layer thickness of 33 Å, calculated from the measurement of the insulator capacitance in the strong accumulation region. At each frequency, the measured capacitance decreases with increasing frequency due to a continuous distribution of the interface states. From the I-V characteristics of the MIS Schottky diode, ideality factor (n) and barrier height (Φ_b) values of 1.766 and 0.786 eV, respectively, were obtained from a forward bias I-V plot. In addition, the interface states distribution profile as a function of (E_ss − E_v) was extracted from the forward bias I-V measurements by taking into account the bias dependence of the effective barrier height (Φ_e) for the Schottky diode. The diode shows non-ideal I-V behaviour with ideality factor greater than unity. This behaviour is attributed to the interfacial insulator layer, the interface states and barrier inhomogeneity of the device. As expected, the C-V curves gave a barrier height value higher than those obtained from I-V measurements. This discrepancy is due to the different nature of the I-V and C-V measurement techniques.     

Temperature dependence of barrier height parameters of inhomogeneous Schottky diodes

We have shown by numerical simulations of I-V-T curves that the ideality factor of inhomogeneous Schottky diodes does not increase for decreasing temperature to such extent as is commonly observed for Schottky diodes in experiment. The main consequence of such a result is that in spite of the fact that the barrier height inhomogeneities fullfil the conditions for barrier height lowering for decreasing temperature they might not be a general or the only reason for occuring of this effect in experimental structures. We found out much slower ideality factor temperature dependence than reported in the literature and the dependence was even not monotonous for simulation conditions used. We conclude that some other reason as barrier inhomogeneity is responsible for ideality factor temperature dependence.     

Open circuit voltage decay in p-n junction diodes at high levels of injection

The open circuit voltage decay (OCVD) in p-n junction diodes at high levels of injection is discussed in this paper. Theoretical results are given for thick base diodes and for BSF solar cells including the effect of recombination in the emitter. It is found that the recombination in the emitter becomes important at high levels of injection and makes the voltage decay faster. The experimental results in BSF solar cells at high levels of injection are also reported and found to be in good agreement with the theoretical results derived in this paper.     

Electrical behavior of an NPN GaAlAs/GaAs heterojunction transistor

This paper deals with a theoretical and experimental study of GaAlAs/GaAs heterojunction transistors fabricated by liquid phase epitaxy.Starting from the general transport equations in a structure of variable composition, the expressions for the injection efficiency and for the transfer characteristic (I_C, V_BE) are first established. Using reasonable simplifying assumptions, allowed by the physical characteristics of the base and emitter regions, the major role played by the zone including the conduction band spike is clearly shown. In particular, it appears that the presence of such a spike entails a substantial decrease of the injection efficiency and also modifies, over a wide bias range, the (I_C, V_BE) characteristic which then follows a non ideal law.The experimental behaviour of devices fabricated by liquid phase epitaxy are described. The measurements were carried out at temperatures ranging from 77 to 316°K. The results obtained are compared with those predicted by the theoretical model.     

Minority carrier injection characteristics of the diffused emitter junction

For the double-diffused transistor, a one-dimensional analysis is presented on the minority carrier injection properties of a diffused emitter junction. This junction is bounded on one side by a reverse biased collector and on the other by an ohmic contact of arbitrary recombination velocity. Furthermore, arbitrary magnitudes of minority carrier lifetime are assumed in both the emitter and base regions of this semiconductor device. Injection efficiency characteristics are graphically illustrated throughout a wide range of physical and geometrical parameters. Assuming, for example, variations in the emitter junction depth, injection properties are demonstrated for transistors exhibiting a fixed collector location and also for transistors exhibiting a fixed base width. A comparison is also shown between the calculated minority carrier injection from this analysis and from other, more approximate, methods.     

On the current-voltage characteristics of epitaxial Schottky barrier diodes

The J-V characteristics of epitaxial Schottky barrier diodes are analyzed. Based on the assumption of negligible recombination in the epitaxial layer, formal solution from which the J-V characteristics can be calculated is derived. The solution is valid for all injection levels and reduces to the form I = I_s[exp (q(V?IR)/kT) ? 1], where R is the series resistance of the epitaxial layer, under C12 C12V low-injection conditions. The analysis is justified by very close correspondence with exact numerical calculations using the Finite Element Device Analysis Program (FIELDAY) in which thermionic emission boundary conditions are implemented for both electrons and holes. It is shown that for low barrier Schottky diodes the minority carrier injection is negligible and the expression I = I_s[exp (q(V?IR)/kT) ? 1] describes the I-V characteristics over large bias range. For high barrier C12 C12 V Schottky diodes the exact solution must be used as minority carriers are injected and the series resistance is decreased due to conductivity modulation effect.     

Low optical power characterization of a base current-biased four-terminal dual-emitter heterojunction phototransistor

This paper reports on a four-terminal dual-emitter heterojunction phototransistor (4T-DEPT) with a base biased by a current source in comparison with a three-terminal dual-emitter heterojunction phototransistor (3T-DEPT). While only voltage can be used to tune the optical performance of the 3T-DEPT, voltage- and current-control modes are considered for the 4T-DEPT. One emitter (E2) serves as the voltage (V_E21)-controlled terminal at a fixed base biasing current while the other one (E1) is at the ground state. On the other hand, the base terminal controls the operation by applying an additional current (I_Bdc) bias when the V_E21 is constant. Therefore, voltage- and current-dependent characteristics will be detailed. Four operating regions exist in the voltage-dependent characteristics for both 3T- and 4T-DEPTs: negative-saturation, negative-tuning, positive-tuning, and positive-saturation regions. When the 4T-DEPT operates at the bias condition of V_E21 = 0.4 V, I_Bdc = 0.001 μA, and the incident optical power (P_in) of 0.423 μW, it shows the maximum current-dependent current-tuning efficiency and gain-tuning efficiency of 21.40 and 73.87 μA⁻¹, respectively. In addition to the power- and voltage-tunable optical gains, a current-tunable one is also available in the 4T-DEPT.     

Extraction of electronic parameters of Schottky diode based on an organic Orcein

An Au/Orcein/p-Si/Al device was fabricated and the current-voltage measurements of the devices showed diode characteristics. Then the current-voltage (I-V), capacitance-voltage (C-V) and capacitance-frequency (C-f) characteristics of the device were investigated at room temperature. Some junction parameters of the device such as ideality factor, barrier height, and series resistance were determined from I-V and C-V characteristics. The ideality factor of 2.48 and barrier height of 0.70 eV were calculated using I-V characteristics. It has been seen that the Orcein layer increases the effective barrier height of the structure since this layer creates the physical barrier between the Au and the p-Si. The interface state density N_ss were determined from the I-V plots. The capacitance measurements were determined as a function of voltage and frequency. It was seen that the values of capacitance have modified with bias and frequency.     

Fabrication and characterization of in situ polymerized n-polyaniline films grown on p-Si heterojunctions

This work presents a study on the fabrication and the electrical transport mechanism of the in situ polymerized n-type polyaniline (PANI) grown on p-type Si to form n-polyaniline/p-Si heterojunction devices. The current-voltage-temperature (I-V-T) characteristics of n-PANI/p-Si devices were investigated in the temperature range of 298-373 K. These devices showed good rectifying behavior and the temperature dependence of the I-V characteristics were successfully explained by the thermionic mechanism in the narrow potential range, V ? 0.4 V. The barrier height, ideality factor and the series resistance values of this structure were obtained from the forward bias I-V characteristics. The capacitance-voltage-temperature (C-V-T) characteristics of n-PANI/p-Si devices were also investigated. The barrier height values obtained from the C-V measurements were found to be higher than that obtained from the I-V measurements at various temperatures. From the capacitance-voltage-frequency (C-V-f) characteristics, it was found that the capacitance remained almost constant up to a certain values of the frequency in the lower and higher sides of the frequency scale. The higher values of capacitance at low frequencies were attributed to the excess capacitance resulting from the interface states in equilibrium with the p-Si side that can follow the AC signal.     

Some aspects of LEC transistor behaviour

Some properties of bipolar transistors with low emitter concentrations are investigated both theoretically and experimentally. It turns out that the base current of LEC transistors at medium and high injection levels is the same as in double diffused transistors and can be explained by Auger recombination in the emitter n⁺ region. The cut-off frequency f_T is rather low, due to extra charge storage in the lightly doped emitter region. Small n⁺ emitter areas, surrounded by a p-ring may introduce anomalies such as kinks in the (_cb, V_be) characteristics and negative resistances.     

Mobility models for the I–V characteristics of buried-channel MOSFETs

This paper presents two separate carrier-mobility models for the I-V characteristics of buried-channel MOSFETs. One model considers oxide-semiconductor interface scattering for carrier motion in the surface accumulation layer; the other model considers the scattering of carrier motion within the finite thickness of the neutral buried channel. Based on these two carrier-mobility models, the I-V characteristic model of buried-channel MOSFETs is derived analytically without considering the small-geometry effects. Comparisons between the developed I-V characteristic model and the experimental results of the fabricated buried-channel MOSFETs have been made. It has been shown that the mobility models developed enable us to accurately simulate the I-V characteristics of buried-channel MOSFETs operated over wide ranges of gate-source and back-gate biases.     

A prognostic approach for non-punch through and field stop IGBTs

Development of prognostic approaches for insulated gate bipolar transistors (IGBTs) is of interest in order to improve availability, reduce downtime, and prevent failures of power electronics. In this study, a prognostic approach was developed to identify anomalous behavior in non-punch through (NPT) and field stop (FS) IGBTs and predict their remaining useful life. NPT and FS IGBTs were subjected to electrical–thermal stresses until their failure. X-ray analysis performed before and after the stress tests revealed degradation in the die attach. The gate–emitter voltage (V_GE), collector–emitter voltage (V_CE), collector–emitter current (I_CE), and case temperature were monitored in situ during the experiment. The on-state collector–emitter voltage (V_CE(ON)) increased and the on-state collector–emitter current (I_CE(ON)) decreased during the test. A Mahalanobis distance (MD) approach was implemented using the V_CE(ON) and I_CE(ON) parameters for anomaly detection. Upon anomaly detection, the particle filter algorithm was triggered to predict the remaining useful life of the IGBT. The system model for the particle filter was obtained by a least squares regression of the V_CE(ON) at the mean test temperature. The failure threshold was defined as a 20% increase in V_CE(ON). The particle filter approach, developed using the system model based on the V_CE(ON), was demonstrated to provide mean time to failure estimates of IGBT remaining useful life with an error of approximately 20% at the time of anomaly detection.     

The theoretical and experimental study on double-Gaussian distribution in inhomogeneous barrier-height Schottky contacts

We have considered multi-Gaussian distribution of barrier-heights for non-interactive barrier inhomogeneities in the inhomogeneous Schottky diodes, and we have shown the presence of the intersecting behavior in the forward-bias current-voltage (I-V) curves for the double-Gaussian distribution model at low temperatures. We have tried to eliminate this effect by generating I-V curves at lower temperatures with the bias-dependent barrier-height expression which leads to the ideality factors greater than unity. For this calculation, we have obtained the expressions for the barrier-height change and ideality factor, and for bias-dependency of the BH for the multi-Gaussian model by following the literature. We have shown that the experimental forward-bias I-V curves coincide with the theoretical ones using the bias-dependent inhomogeneous BH expression at low and high temperatures in the double-Gaussian distribution of BHs.     

Mechanism of light production in metal-insulator-semiconductor diodes; GaN:Mg violet light-emitting diodes

The mechanism of electroluminescence in MIN GaN:Mg violet light-emitting diodes was analyzed by considering observed structural features of the diodes as well as their electrical and optical characteristics. Comparison of the observed I–V characteristic, including dependence upon temperature and upon film thickness, with all possible mechanisms for conduction in insulators lead to a proposed conduction mechanism of quantum mechanical tunneling, with the I–V characteristic being well represented by the Fowler-Nordheim equation. The proposed mechanism of light production involved impact ionization of luminescent centers near the i-n junction, with subsequent radiative recombination. This proposed mechanism was supported by measurements of carrier multiplication in the device and a steep voltage gradient at the i-n junction. The impact ionization process occurs in discrete regions coincident with sub-grain boundaries in the GaN film.     

On the profile of frequency and voltage dependent interface states and series resistance in (Ni/Au)/Al0.22Ga0.78N/AlN/GaN heterostructures by using current-voltage (I-V) and admittance spectroscopy methods

In order to explain the experimental effect of interface states (N_ss) and series resistance (R_s) of device on the non-ideal electrical characteristics, current-voltage (I-V), capacitance-voltage (C-V) and conductance-voltage (G/ω-V) characteristics of (Ni/Au)/Al_0.22Ga_0.78N/AlN/GaN heterostructures were investigated at room temperature. Admittance measurements (C-V and G/ω-V) were carried out in frequency and bias voltage ranges of 2 kHz-2 MHz and (−5 V)-(+5 V), respectively. The voltage dependent R_s profile was determined from the I-V data. The increasing capacitance behavior with the decreasing frequency at low frequencies is a proof of the presence of interface states at metal/semiconductor (M/S) interface. At various bias voltages, the ac electrical conductivity (σ_ac) is independent from frequencies up to 100 kHz, and above this frequency value it increases with the increasing frequency for each bias voltage. In addition, the high-frequency capacitance (C_m) and conductance (G_m/ω) values measured under forward and reverse bias were corrected to minimize the effects of series resistance. The results indicate that the interfacial polarization can more easily occur at low frequencies. The distribution of N_ss and R_s is confirmed to have significant effect on non-ideal I-V, C-V and G/ω-V characteristics of (Ni/Au)/Al_0.22Ga_0.78N/AlN/GaN heterostructures.     

Temperature dependences of surface recombination DC current–voltage characteristics in MOS structures

Temperature dependences of recombination current at interface traps in MOS transistor structure are investigated using the Shockley–Read–Hall Recombination DC current–voltage (R-DCIV) characteristics. Results include the effects of energy distribution of the interface traps (discrete, constant and U-shaped energy distributions) on the temperature dependence of the base terminal current-vs-gate-voltage lineshape (I_B–V_GB), the peak current and voltage (I_B-peak, V_GB-peak) and their thermal activation energy E_A, and the reciprocal slope n of the I_B-peak vs base/drain (or base/source) p/n junction forward voltage V_BD. Surface impurity concentration and oxide thickness are varied. Temperature dependence of E_A, V_GB-peak and n is small while I_B-peak and R-DCIV linewidth, large. This small temperature dependence simplifies the experimental implementation and data analysis of R-DCIV methodology applied at room temperatures without using expensive temperature controlled wafer-probe station.     

Annealing temperature effect on electrical and structural properties of Cu/Au Schottky contacts to n-type GaN

Schottky contacts were fabricated on n-type GaN using a Cu/Au metallization scheme, and the electrical and structural properties have been investigated as a function of annealing temperature by current-voltage (I-V), capacitance-voltage (C-V), Auger electron spectroscopy (AES) and X-ray diffraction (XRD) measurements. The extracted Schottky barrier height of the as-deposited contact was found to be 0.69 eV (I-V) and 0.77 eV (C-V), respectively. However, the Schottky barrier height of the Cu/Au contact slightly increases to 0.77 eV (I-V) and 1.18 eV (C-V) when the contact was annealed at 300 °C for 1 min. It is shown that the Schottky barrier height decreases to 0.73 eV (I-V) and 0.99 eV (C-V), 0.56 eV (I-V) and 0.87 eV (C-V) after annealing at 400 °C and 500 °C for 1 min in N₂ atmosphere. Norde method was also used to extract the barrier height of Cu/Au contacts and the values are 0.69 eV for the as-deposited, 0.76 eV at 300 °C, 0.71 eV at 400 °C and 0.56 eV at 500 °C which are in good agreement with those obtained by the I-V method. Based on Auger electron spectroscopy and X-ray diffraction results, the formation of nitride phases at the Cu/Au/n-GaN interface could be the reason for the degradation of Schottky barrier height upon annealing at 500 °C.