1/f noise in n-channel silicon-gate MOS transistors

It is found that equivalent gate noise power for l/f noise in n-channel silicon-gate MOS transistors at near zero drain voltage at room temperature is empirically described by two noise terms, which vary asK_{1}(q/C_{ox}) (V_{G} -V_{T})/f and K_{2}(q/C_{ox})^{2}/f, where V_{G}is gate voltage, VTis threshold Voltage, and Coxis gate-oxide capacitance per unit area. Unification of carrier-density fluctuation (McWhorter's model)and mobility fluctuation (Hooge's model) can account for the experimental data. The comparison between the theory and experiment shows that the carrier fluctuation term K2is proportional to oxide-trap density at Fermi-level. The mobility fluctuation term K1is correlated to K2, being proportional toradic K_{2}. The origin of this correlation is yet to be clarified.     

101-Stage 2 µm gate ring oscillators in laser-grown silicon islands embedded in SiO2

E/D MOS test transistors and 101-stage 2 µm gate E/D MOS ring oscillators were fabricated in laser-grown single- and multicrystal islands embedded in oxide substrates. Most transistors showed goodI-Vcharacteristics, short-channel effects, and kink effects. Ring oscillators had a switching delay per stage (τPd) of 0.4 ns and a power-delay product (τ_{Pd} middot P_{d}) of 2.5 PJ at a supply voltage (VDD) of 10-15 V. It was noted that different crystal orientations of the islands posed no difficulty in processing and VTcontrol when applied to short channel devices, and that enhanced boundary diffusion results in occasional malfunctional transistors and erroneous high surface electron mobilities (µse).     

Multiplication in collector junctions of silicon n-p-n and p-n-p transistors

The values 1-1/Mfor both electrons and holes, whereMis the multiplication factor, have been calculated in three different silicon p-n junctions. The logarithmic plot of 1 - 1/Mversus the normalized voltageV/V_{B}is well approximated by a straight line for 0.1 > 1 -1/M> 0.005. This range corresponds to the useful range of α0for most bipolar transistors. An empirical expression has been obtained for the ratioV_{CEO}/V_{CBO}within this range.     

Electron mobility in n-channel depletion-type MOS transistors

It is found that surface electron mobility can exceed electron mobility in bulk. Field-effect mobilities of n-channel depletion-type MOS transistors were measured, comparing transistorG_{m} - V_{g}and diodeC - V_{g}characteristics. Electron mobility in a highly doped n-type channel layer exceeds that in bulk at around the onset of surface accumulation. This can be explained by reduction in ionized impurity scattering under accumulation conditions. In accumulation conditions, excessive electrons screen the Coulombic field from ionized impurities. This is confirmed by theoretical calculation based on the Maxwell-Boltzmann distribution of electrons and electron-concentration-dependent electron mobility.     

Two-dimensional dynamic analysis of short-channel thin-film MOS transistors using a minicomputer

A computer program is described for simulating two-dimensional thin-film MOS transistors on a minicomputer. Data are presented showing the variation of internal carrier density with time until a steady-state condition is reached. These data show the formation of a drain-induced back channel whose conduction properties depend on the back-channel length and carrier mobility. For channel length below 2.0 µm, the two-dimensional steady-state drain current is shown to fit the expressionI_{D}/W = frac{micro_{0}C_{0}}{L[1+(micro_{0}/upsilon_{s} V_{D}{L})^{2}]^{1/2}}(V_{G} - V_{T} - V_{D/2})V{D}for values of drain voltage below a specific saturation value (V_{DM}); andI_{D}/W = frac{10^{-8)(V_{G} - V_{T})^{1/2}}{(T_{ox})^{1/2}L}.(V_{D} - V_{DM}) + I_{DM}for drain voltages above the saturation value.     

0.13 $mu$ m SiGe BiCMOS Technology Fully Dedicated to mm-Wave Applications

This paper presents a complete 0.13$,muhbox{m}$ SiGe BiCMOS technology fully dedicated to millimeter-wave applications, including a high-speed (230/280 GHz ${rm f}_{rm T}/{rm f}_{rm MAX}$) and medium voltage SiGe HBT, thick-copper back-end designed for high performance transmission lines and inductors, 2 $hbox{fF}/muhbox{m}^{2}$ high-linearity MIM capacitor and complementary double gate oxide MOS transistors. Details are given on HBT integration, reliability and models as well as on back-end devices models.      

The effects of laser pulsewidth and molecular lifetime on the experimental determination of one-photon and two-photon excitation spectra

We demonstrate that it is important to know both the observed fluorescence lifetime (τ) and the excitation pulsewidth (Gamma) in order to determine the effect of changes inGammaon the measurement of one- and two-photon excitation spectra. IfGamma/tauis greater than 3, it is sufficient to measureI_{F}/I_{L}^{n}orI_{F}/N_{L}^{n}forn-photon excitation spectra (n = 1and 2), where IFis the peak fluorescence intensity, ILis the peak intensity of the excitation pulse, and NLis the total number of photons per pulse. WhenGamma/tauis less than 3, however, the pulsewidth dependence ofI_{F}/I_{L}^{n}orI_{F}/N_{L}^{n}should be treated by using the pulse-width correction functions defined in this paper. A simple method to estimate observed fluorescence lifetimes is also described where one needs only to measureGammaand the time interval between the peak intensity of an excitation pulse with a Gaussian or near Gaussian temporal profile and the peak fluorescence intensity. Tables of correction factors are provided which can be used to generate accurate values of these functions for arbitrary ratios ofGamma/tauusing interpolation techniques. The treatment of the effect of non-Gaussian excitation pulses on the measurement of one- and two-photon excitation spectra is discussed.     

On the Schalkwijk-Kailath coding scheme with a peak energy constraint

In a recent series of papers, [2]-[4] Schalkwijk and Kailath have proposed a block coding scheme for transmission over the additive white Gaussian noise channel with one-sided spectral densityN_{0}using a noiseless delayless feedback link. The signals have bandwidthW (W leq infty)and average powerbar{P}. They show how to communicate at ratesR < C = W log (1 + bar{P}/N_{0}W), the channel capacity, with error probabilityP_{e} = exp {-e^{2(C-R)T+o(T)}}(whereTis the coding delay), a "double exponential" decay. In their scheme the signal energy (in aT-second transmission) is a random variable with only its expectation constrained to bebar{P}T. In this paper we consider the effect of imposing a peak energy constraint on the transmitter such that whenever the Schalkwijk-Kailath scheme requires energy exceeding abar{P}T(wherea > 1is a fixed parameter) transmission stops and an error is declared. We show that the error probability is degraded to a "single exponential" formP_{e} = e^{-E(a)T+o(T)}and find the exponentE(a). In the caseW = infty , E(a) = (a - 1)^{2}/4a C. For finiteW, E(a)is given by a more complicated expression.     

Analysis of short-channel MOSFET's with field-dependent carrier-drift mobility

MOSFETI_{D}-V_{D}characteristics have been investigated, using two-dimensional analysis which includes field-dependent carrier-drift mobility. It is predicted that drain current is affected by the relationship between carrier-drift velocity and electric-field strength. Reduction mechanisms for normalized drain current and current saturation voltage for short-channel MOSFET's have become clear. In the light of the above analysis, an analytical model is presented. The model is simple, in spite of taking the field-dependent carrier-drift mobility and the proper current saturation concept into account. Predicted results are in good agreement with experimental data down toL = 1µm.     

The effect of distributed series resistance on the dark and illuminated current—Voltage characteristics of solar cells

Distributed series resistance effects in solar cells are analyzed and the correctness of representing these by a lumped parameter is discussed for any conditions of bias and illumination. In addition to a general mathematical methodology, analytical expressions are derived to simplify the estimation of series resistance effects on the dark and illuminatedJ-Vcharacteristics of the cell. The equivalent series resistance (rs) in the dark is found to decrease with current densityJfromr_{b} + r_{e}/3at smallJto (r_{e} r_{b})^{1/2}at very highJ, where reand rbare the emitter layer and base region resistances, respectively. For illuminated conditions rsdepends onJas well, being maximum near short-circuit and minimum near open-circuit; however, rsfurther depends on the photogenerated current JL: its short-circuit value increases with JLfromr_{b} + r_{e}/3tor_{b} + r_{e}/2and the open-circuit value decreases with JLfromr_{b} + r_{e}/3to(r_{e}r_{b})^{1/2}. The variability of rsis therefore related to the relative importance of rbandr_{e};r_{b}plays the role of attenuating this variability, a situation not well recognized previously. Previous theoretical and experimental work is critically reviewed throughout this paper.     

Simple model for threshold voltage in a short-channel IGFET

The threshold voltage of a short-channel IGFET can be expressed, in relation to that for a long-channel device, asV_{T} = V_{TLC} - alpha - betaV_{DS}. This behavior is deduced from a charge injection model and is verified both by two-dimensional numerical simulations and by actual threshold data.     

Electrical properties of a triode-like silicon vertical-channel JFET

A transition from triode-like to pentode-likeI_{d}-V_{d}characteristics is observed in diffusion-type vertical JFET's by varying the channel impurity concentration from 5 × 10¹⁴to 5 × 10¹⁵cm^-3. In calculatedI_{d}-V_{d}characteristics of a low concentration and short-channel JFET, Geurst's theory has been shown to agree qualitatively with the experimental curves. In a triode-like JFET, drain currents show two distinct drain-voltage-dependent regions. It has an exponential dependency when the drain current is less than 0.2 mA . cm^-1. It has annth power depndency on the drain voltage when the drain current is larger than 5 mA . cm^-1. Other important electrical properties are also calculated and compared with experimental data.     

The effect of potential beam energy on the performance of linear beam devices

The potential energy stored in a bunched electron beam is calculated using analytical and numerical methods. The ratio of stored potential energy to the total beam energyW_{p}/W_{0}increases rapidly with the degree of bunching and with decreasing beam filling factorb/a.W_{p}/W_{0}is proportional to the beam perveance and independent of the beam voltage, as long as relativistic effects are neglected. In a velocity-modulated linear beam-type device, such as a klystron or a traveling-wave beam tube, stored potential beam energy affects both the bunching process and the process of dc to RE energy conversion adversely. For maximum conversion efficiencyW_{p}/W_{0}should be kept as low as possible. Several ways of reducingW_{p}/W_{0}are discussed.     

Hot-electron-induced MOSFET degradation at low temperatures

The n-channel LDD MOSFET lifetime is observed to followtau=(A/I_{d})(I_{sub}/I_{d})^{-n}from 77 to 295 K when the device is stressed near the maximum Isub. Here Idis the drain current andAis the proportionality constant. The experimental result indicates thatnis approximately 2.7 and is independent of temperature. However, the proportionality constantAfollowsA = A_{0} exp (-E_{a}/kT), withE_{a} = 39meV. The smaller proportionality constant at low temperatures suggests that hot-electron injection (HEI) degradation is caused by the electron trapping in the oxide.     

The imperfectly conducting cylindrical transmitting antenna: Numerical results

The complex wave number, the distribution of current, the admittance, and the radiating efficiency of cylindrical antennas made of imperfect conductors are evaluated numerically from a previously derived theory[1]. The quantity2lambda r^{i}/zeta_{0}(wherer^{i}is the resistance per unit length,lambdais the free-space wavelength, andzeta_{0} = 377ohms) is used as the parameter in a range that extends from zero to 200. Extensive graphs and tables are given.     

A direct measurement technique for small geometry MOS transistor capacitances

Accurate representation of MOS transistor capacitances is important for accurate circuit simulation. Due to the difficulties of direct measurement with meters, MOS intrinsic capacitances have not been studied extensively. Although several "on-chip" methods have been developed, the need for measurement circuits fabricated alongside the devices of interest seems to be impractical for statistical data generation. In addition, the characterization of both current-voltage (I-V) and capacitance-voltage (CV) relationships is not as convenient by using the "on-chip" configurations. Consequently, the direct measurement technique is more desirable than the "on-chip" methods. A direct measurement technique for the intrinsic gate capacitances in a small geometry MOS transistor has been developed and is presented in this letter. By using this method, n-channel transistors withW_{eff}/L_{eff}of, 11/11, 11/2.2, and 11/1.65 µm have been measured. The difference between the long- and short-channel devices can be clearly observed in the measured curves. The results show that the small MOSFET intrinsic capacitances can be accurately determined using off the self meters, and the use of "on-chip" circuitry is unnecessary.     

0.8-V Supply Voltage Deep-Submicrometer Inversion-Mode $hbox{In}_{0.75}hbox{Ga}_{0.25}hbox{As}$ MOSFET

We report the experimental demonstration of deep-submicrometer inversion-mode $hbox{In}_{0.75}hbox{Ga}_{0.25}hbox{As}$ MOSFETs with ALD high- $k$ $hbox{Al}_{2}hbox{O}_{3}$ as gate dielectric. In this letter, n-channel MOSFETs with 100–200-nm-long gates have been fabricated. At a supply voltage of 0.8 V, the fabricated devices with 200–130-nm-long gates exhibit drain currents of 232–440 $muhbox{A}/muhbox{m}$ and transconductances of 538–705 $muhbox{S}/muhbox{m}$. The 100-nm device has a drain current of 801 $muhbox{A}/muhbox{m}$ and a transconductance of 940 $muhbox{S}/muhbox{m}$. However, the device cannot be pinched off due to severe short-channel effect. Important scaling metrics, such as on/off current ratio, subthreshold swing, and drain-induced barrier lowering, are presented, and their relations to the short-channel effect are discussed.      

Tunneling currents in the copper sulfide/cadmium sulfide heterojunction

The parameters controlling the photovoltaic properties of the Cu2S/CdS heterojunction have been investigated. It is found that the behavior of the short-circuit current and the open-circuit voltage are describable in terms of a deep, donor-like level in the CdS region adjacent to the metallurgical interface. When tunneling from this level into the Cu2S is the mechanism controlling the current flow, theJ_{SC}-V_{OC}characteristics of the device are described by the equationJ_{SC} = J_{00} exp (a_{i}(E_{I} - Phi_{T}_{0})) {exp (a_{i}q V_{OC})-1}where JSCis the short-circuit current, J00is the current preexponential factor,Phi _{T}_{0}is the zero-bias barrier height in the CdS, EIis the ionization energy of the deep donor, VOCis the open-circuit voltage, and aiis a tunneling factor dependent on the net positive charge density in the CdS near the interface. The relative probability of tunneling from this level to the Cu2S is derived, as is the probability of tunneling from the level to the CdS conduction band. The photocapacitance effects observed in this junction are attributed to the joint action of this level and an acceptor state due to copper in the CdS. Combining the results from the tunneling calculation, theJ_{SC}-V_{OC}data, and the quenching spectra of the photocapacitance, the ionization energy of the donor level is determined to be 0.45 eV and the density of these levels exceeds 10¹⁹cm^-3near the interface. The donor level acts as a recombination center, reducing JSC, and as a tunneling center, reducing VOC. Since these levels exist in junctions produced by the dipping method or by the dry method, they set fundamental limits to the efficiency of devices fabricated using these methods.     

Algorithms for the generation of full-length shift- register sequences

Two algorithms are presented for the generation of full-length shift-register cycles, also referred to as de Bruijn sequences. The first algorithm generates2^{k cdot g(n,k)full cycles of length2^{n}, using3n + k cdot g(n, k)bits of storage, wherekis a free parameter in the range1 leq k leq 2^{((n-4)/2)}, andg(n, k)is of the order ofn - 2 log k. The second algorithm generates about2^{n^{2}/4}full cycles of length2^{n}, using aboutn^{2}/2bits of storage. In both algorithms, the time required to produce the next bit from the lastnbits is close ton. A possible application to the construction of stream ciphers is indicated.     

Asymptotics and Error Rate Bounds for M-ary DPSK

The symbol error probabilityP_{E}(M)forM-ary DPSK is shown to be bounded in terms of a recent asymptotic approximationP_{asym}(M)by the inequalitiesP_{asym}(M) < P_{E}(M) < 1.03P_{asym}(M);M geq 4, E_{b}/N_{0} geq 1whereE_{b}/N_{0}is the bit energy-to-noise spectral density ratio. Aside from the wide range of validity and the closeness of the lower and upper bounds, this result is striking in light of the often held view that such asymptotic approximations are primarily of value only in the limitE_{b}/N_{0} rightarrow infty; thus, one of the goals of this note is to demonstrate that asymptotic methods can lead to extremely good error rate approximations in lieu of the more traditional and more widely used bounding techniques. The results are also noted to be applicable in other similar situations which commonly occur.