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1.
用大束流密度的钒金属离子注入硅,能够直接合成性能良好的薄层硅化物,随束流密度的增加,硅化钒相生长,薄层硅化物的方块电阻Rs明显下降吵流密度为25μA/cm^2时,Rs达到最小值22Ω/□,说明连续的硅化物已经形成。X衍射分析表明,注入层中形成了V3Si、V5Si3、V3Si5和VSi2四种硅化钒。经过退炎后,Rs明显地下降,Rs最大可降到9Ω/□,电阻主可小到72μΩm,说明硅化钒薄层质量得到了进  相似文献   

2.
利用金属蒸汽真空弧(MEVVA)离子源引出强流Ti离子注入单晶硅,当MEVVA源引出电压为40kV,束流密度达到100μA/cm2,Ti离子剂量为5×1017/cm2,Ti离子注入单晶硅可得到C54-TiSi2的注入层,且薄层电阻低于3.0Ω/□.本文用束流热效应讨论了形成硅化物的机理.  相似文献   

3.
本文着重研究了0.6μm自对准Ti-SALICIDELDDMOS工艺技术.TiSi2的形成采用两步快速热退火及选择腐蚀完成,Ti膜厚度的最佳选择使SALICIDE工艺与0.2μm浅结相容,源/漏薄层电阻为4Ω/□.上述技术已成功地应用于0.6μm自对准Ti-SALICIDELDDNMOS器件及其E/DMOS31级环形振荡器的研制,特性良好.  相似文献   

4.
SiGe外延层中硼注入和退火   总被引:1,自引:0,他引:1  
对采用快速加热、超低压-化学汽相沉积(RTP/VLP-VCD)技术生长的Si0.8Ge0.2/Si应变外延层进行硼注入,注入能量为40keV,注入剂量为2.5×10^14cm^-2。然后,进行不同时间、不同温度的快热退为(RTA)稳态炉退火。结果表明,RTA优于稳态炉退火,其最佳条件下:退火时间为10s,退火温度范围为750℃-850℃,或者退火温度为700℃,时间为40s,基本可消除由注入引起的  相似文献   

5.
用金属蒸发真空弧离子源注入机将 Y离子注入硅 ,制备出特性良好的硅化物。用掠角沟道技术和透射电子显微镜分析了这种硅化物的结构。用束流密度为 2 5μA/ cm2的 Y注入硅可形成三层结构的硅化钇。硅化钇层的厚度大约为 60— 80 nm.其缺陷密度 Nd 和薄层电阻 Rs随束流密度的增加而下降。快速退火后 ,Nd和 Rs都明显下降。Rs从 54Ω/□下降到 1 4Ω/□。最小电阻率为 84μΩ·cm.这说明快速退火可以改善硅化钇的电特性。X射线衍射分析表明 YSi和 YSi2 硅化物已经形成。掠角沟道技术有益于研究薄层硅化物的原子深度分布和晶格缺陷密度分布  相似文献   

6.
用金属蒸发真空弧离子源注入机将Y离子注入硅,制备出特性良好的硅化物.用掠角沟道技术和透射电子显微镜分析了这种硅化物的结构.用束流密度为25μA/cm2的Y注入硅可形成三层结构的硅化钇.硅化钇层的厚度大约为60-80nm.其缺陷密度Nd和薄层电阻Rs随束流密度的增加而下降.快速退火后,Nd和Rs都明显下降.Rs从54Ω/□下降到14Ω/□.最小电阻率为84μΩ·cm.这说明快速退火可以改善硅化钇的电特性.X射线衍射分析表明YSi和YSi2硅化物已经形成.掠角沟道技术有益于研究薄层硅化物的原子深度分布和品格缺陷密度分布.  相似文献   

7.
邹吕凡  何沙 《半导体学报》1996,17(9):717-720
用二次离子质谱对As+注入Si1-xGex的快速退火行为进行了研究,Si1-xGex样品中Ge组分分别为x=0.09,0.27和0.43,As注入剂量为2×10^16cm^-2,注放能量为100keV,快速退火温度分别为950℃和1050℃,时间均为18秒,实验结果表明,Si2-xGex样品,As浓度分布呈组分密切相关,Ge组分越大,As扩散越快,对于Ge组分较大的Si1-xGex样吕,Asdispla  相似文献   

8.
固相外延CoSi_2薄膜作为扩散源形成n~+p浅结技术研究   总被引:1,自引:0,他引:1  
通过As+离子注入到由TiN/Co/Ti/Si多层结构因相反应得到的外延CoSi2层中,利用外延硅化物作为扩散源(ESADS),形成了0.1μm的浅n+p结.研究了Cosi2外延薄膜离子注入非晶化后的再结晶特性、注入杂质退火时的再分布特性和形成的n+p浅结特性.实验结果表明:外延CoSi2层在非晶化后能有效地再结晶;As原子在多晶CoSi2/Si结构和单晶CoSi2/Si结构中有着不同的再分布特性;同相应的以多晶CoSi2作为扩散源形成的结相比,以外延CoSi2作为扩散源形成的结反向漏电小1~2个数量级,  相似文献   

9.
在Si(100)衬底上用离子束溅射方法淀积Ni,Co,Ti薄膜,形成Co/Ni/Si,Ni/Co/Si和Co/Ni/Si等结构,通过氮气中快速热退火反应生成三元硅化物(CoxNil-x)Si2。用AES,XRD,RBS沟道谱,SEM及四探针等方法对(CoxNil-x)Si2薄膜的物理特性和电学特性进行了测试,在Si衬底上Co,Ni多层膜经快速热退火可形成高电导的(CoxNil-x)Si2薄膜,其电阻率在15~20μΩ·cm之间。Co/Ni/Ti/Si(100)多层结构固相反应可以得到外延(CoxNil-x)Si2薄膜。(CoxNil-x)Si2的晶格为CaF2立方结构,晶格常数介于CoSi2和NiSi2之间。通过热处理和选择腐蚀等工艺,可在有CMOS图形的衬底上形成自对准的三元硅化物源漏接触和栅极互连图形。  相似文献   

10.
介绍了在Si ̄+注入的n-GaAs沟道层下面用Be ̄+或Mg ̄+注入以形成p埋层。采用此方法做出了阈值电压0~0.2V,跨导大于100mS/mm的E型GaAsMESFET,也做出了夹断电压-0.4~-0.6V、跨导大于100mS/mm的低阈值D型GaAsMESFET。  相似文献   

11.
A rotating table sputter system was used to coat substrates with refractory metal-silicon mixtures as the substrates alternately passed under refractory metal and silicon elemental targets. By varying target power, silicon rich, silicon defficient, or stoichiometric films of the disilicides could be deposited. Film resistivity was investigated as a function of anneal time and temperature, film thickness and grain size. Sheet resistance of of less than 1 ohm per square was found for WSi2 films of 300nm thickness and for MoSi2 films of 500nm thickness when annealed at 1000 °C for 30 min, This corresponds to 30 and 50 micro-ohm cm resistivity respectively. Film thickness was determined from surface profilometry of etched steps for films deposited over silicon nitride and by Rutherford Backscattering Spectrometry for films deposited over single-crystal or polysilicon films.  相似文献   

12.
微波肖特基势垒二极管硅化物工艺技术研究   总被引:1,自引:0,他引:1  
对微波肖特基中、低势垒二极管硅化物的工艺技术进行了研究。用Ni-Si硅化物作中势垒硅化物,用Ti-Si硅化物作低势垒硅化物。通过设计和工艺实验,得到温度、时间、真空度等取佳工艺技术条件。在保持微波肖特基二极管势垒特征的同时,提高了反向电压,增强了它的稳定性和可靠性。  相似文献   

13.
Tantalum silicide (TaSi2) thin films were deposited on n-type silicon single crystal substrates using a dual electron-gun system and with Ta and Si targets. The electrical transport properties of the TaSi2/n-Si structures were investigated by temperature-dependent current–voltage (IV) measurements. The temperature-dependent IV characteristics revealed that the forward conduction was determined by thermionic-emission and space-charge-limited current mechanisms at low and high voltage respectively. On the other hand, the reverse current is limited by the carrier generation process.  相似文献   

14.
利用DLTS技术详细研究经钛溅射和RTA950℃处理在n型和p型硅里引进的深能级.结果表明在n型硅里有二个,在p型硅里有三个深能级生成.这些能级的浓度在10~(13)—10~(14)cm~(-3)之间.它们的产生可归因于替位钛原子,钛与RTA相互作用的络合物.  相似文献   

15.
本文研究了用溅射钛和快速退火法与硅反应形成硅化钛的工艺,二氧化硅侧墙轻掺杂漏结构的CMOS工艺加上该工艺后,器件的阈值电压、源漏击穿电压没有明显变化,但使CMOS的栅电阻降低一个数量级,源漏串联电阻为原来的1/4。肌此工艺已研制成功3μm NMOS 12位乘法器,比没有硅化物的器件速度提高一倍。  相似文献   

16.
An approach based on in situ sheet resistance analyses during isothermal annealing processes is proposed to find out the critical stages of Co/Ni phase transition on amorphous silicon. Unlike the case of conventional Co/Si systems, it was found that Co/Ni/Si reaction produces a double-peak in the resistance versus time curve. This behaviour was studied by energy filtered transmission electron microscopy (EFTEM), energy dispersive X-ray spectroscopy (EDS) and selected area electron diffraction (SAED) analyses. It was found that cobalt atoms prefer to diffuse through the grain boundaries of the underlying Ni2Si layer that forms at very low temperature in contact with silicon. The diffusion process stops when cobalt atoms reach the deeper NiSi layer which is located at the interface with the substrate. Finally, CoSi and NiSi phases form separately, and Co(Ni)Si2 grains nucleate in contact with silicon differently from what is known for thick layer systems.  相似文献   

17.
In the frame of the 40 nm technology node development, Ni(Pt)Si abnormal diffusion, usually called NiSi encroachment is studied through voltage contrast electron beam inspection. A typical mapping is found for 300 mm-Si(1 0 0) wafers which is related to NiPt deposition asymmetry, in active zones, between two transistor gates. This observation is related to “gate shadowing effect”, which induces thinner NiPt thickness and then lower Pt amount at the edge of active zones. TEM analyses of the local NiPt thickness and electrical characterizations as junction leakage permit to determine the minimum of NiPt thickness and/or Pt amount needed to guaranty an adequate NiSi stability.  相似文献   

18.
Plasma etching of epitaxial CoSi2 films with a ternary Co–Ti–Si top layer formed during solid phase reaction of Co/Ti bilayers on Si(100) was investigated. By using a pure argon-RF-plasma the ternary top layer was sputtered without formation of a disturbing overlayer. The main disadvantage of this process is the formation of a crater-like surface morphology connected with a strong increase of the surface roughness. Etching the ternary top layer by a reactive process (CF4/Ar) leads to a smoother surface, but a Co–fluoride film was grown on top of the silicide surface. In a following argon etch process this disturbing overlayer can be removed completely, simultaneously the roughness of the etched silicide surface is reduced considerably.  相似文献   

19.
对难熔金属及其硅化物的形成、特性进行了研究。采用溅射难熔金属、热硅化反应的方法,解决了VLSI工艺中由于MOS电路图形尺寸缩小带来的栅电阻增大的问题;采用硅化物阻挡层和A1多层金属布线方法,解决了欧姆接触和铝的电迁移问题。  相似文献   

20.
Electronic property simulation of the narrow-gap semiconducting rhenium and ruthenium silicides has been performed by the linear muffin-tin orbital method (LMTO) within the local density approximation. ReSi1.75 was found to have an indirect gap value of 0.16 eV. The first direct transition with appreciable oscillator strength at 0.30 eV is predicted. Ru2Si3 is revealed to be a direct gap semiconductor with an energy gap of 0.41 eV, while the isostructural Ru2Ge3 has a competitive indirect–direct character of the band gap of about 0.31 eV.  相似文献   

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