Development of new no-flow underfill materials for both eutectic Sn-Pb solder and a high temperature melting lead-free solder

In recent years, no-flow underfill technology has drawn more attention due to its potential cost-savings advantages over conventional underfill technology, and as a result several no-flow underfill materials have been developed and reported. However, most of these materials are not suitable for lead-free solder, such as Sn/Ag (m.p. 225/spl deg/C), Sn/Ag/Cu (m.p. 217/spl deg/C), applications that usually have higher melting temperatures than the eutectic Sn-Pb solder (m.p. 183/spl deg/C). Due to the increasing environmental concern, the demand for friendly lead-free solders has become an apparent trend. This paper demonstrates a study on two new formulas of no-flow underfill developed for lead-free solders with a melting point around 220/spl deg/C. As compared to the G25, a no-flow underfill material developed in our research group, which uses a solid metal chelate curing catalyst to match the reflow profile of eutectic Sn-Pb solder, these novel formulas employ a liquid curing catalyst thus provides ease in preparation of the no-flow underfill materials. In this study, curing kinetics, glass transition temperature (Tg), thermal expansion coefficient (TCE), storage modulus (E') and loss modulus (E') of these materials were studied with a differential scanning calorimetry (DSC), a thermo-mechanical analysis (TMA), and a dynamic-mechanical analysis (DMA), respectively. The pot-life in terms of viscosity of these materials was characterized with a stress rheometer. The adhesive strength of the materials on the surface of silicon chips were studied with a die-shear instrument. The influences of fluxing agents on the materials curing kinetics were studied with a DSC. The materials compatibility to the solder penetration and wetting on copper clad during solder reflow was investigated with both eutectic Sn-Pb and 95.9Sn/3.4Ag/0.7Cu solders on copper laminated FR-4 organic boards.     

Development of no-flow underfill materials for lead-free solderbumped flip-chip applications

No-flow underfill process in flip-chip assembly has become a promising technology toward a smaller, faster and more cost-efficient packaging technology. The current available no-flow underfill materials are mainly designed for eutectic tin-lead solders. With the advance of lead-free interconnection due to the environmental concerns, a new no-flow underfill chemistry needs to be developed for lead-free solder bumped flip-chip applications. Many epoxy resin/hexahydro-4-methyl phthalic anhydride/metal acetylacetonate material systems have been screened in terms of their curing behavior. Some potential base formulations with curing peak temperatures higher than 200°C (based on differential scanning calorimetry at a heating rate of 5°C/min) are selected for further study. The proper fluxing agents are developed and the effects of fluxing agents on the curing behavior and cured material properties of the potential base formulations are studied using differential scanning calorimetry, thermomechanical analysis, dynamic-mechanical analysis, thermogravimetric analysis, and rheometer. Fluxing capability of the developed no-flow formulations is evaluated using the wetting test of lead-free solder balls on a copper board. The developed no-flow underfill formulations show sufficient fluxing capability and good potential for lead-free solder bumped flip-chip applications     

Lead-free chip scale packages: assembly and drop test reliability

Three underfill options compatible with lead-free assembly have been evaluated: capillary underfill, fluxing underfill, and corner bond underfill. Chip scale packages (CSPs) with eutectic Sn/Pb solder were used for control samples. Without underfill, lead-free and Sn/Pb eutectic drop test results were comparable. Capillary flow underfills, dispensed and cured after reflow, are commonly used in CSP assembly with eutectic Sn/Pb solder. With capillary flow underfill, the drop test results were significantly better with lead-free solder assembly than with Sn/Pb eutectic. Fluxing underfill is dispensed at the CSP site prior to CSP placement. No solder paste is printed at the site. The CSP is placed and reflowed in a standard reflow cycle. A new fluxing underfill developed for compatibility with the higher lead-free solder reflow profiles was investigated. The fluxing underfill with lead-free solder yielded the best drop test results. Corner bond underfill is dispensed as four dots corresponding to the four corners of the CSP after solder paste print, but before CSP placement. The corner bond material cures during the reflow cycle. It is a simpler process compared to capillary or fluxing underfill. The drop test results with corner bond were intermediate between no underfill and capillary underfill and similar for both lead-free and Sn/Pb eutectic solder assembly. The effect of aging on the drop test results with lead-free solder and either no underfill or corner bond underfill was studied. Tin/lead solder with no underfill was used for control. This test was to simulate drop performance after the product has been placed in service for some period of time. There was degradation in the drop test results in all cases after 100 and 250 h of storage at 125/spl deg/C prior to the drop test. The worst degradation occurred with the lead-free solder with no underfill.     

Modeling of the curing kinetics of no-flow underfill in flip-chip applications

No-flow underfill has greatly improved the production efficiency of flip-chip process. Due to its unique characteristics, including reaction latency, curing under solder reflow conditions and the desire for no post-cure, there is a need for a fundamental understanding of the curing process of no-flow underfill. Starting with a promising no-flow underfill formulation, this paper seeks to develop a systematic methodology to study and model the curing behavior of this underfill. A differential scanning calorimeter (DSC) is used to characterize the heat flow during curing under isothermal and temperature ramp conditions. A modified autocatalytic model is developed with temperature-dependent parameters. The degree of cure (DOC) is calculated; compared with DSC experiments, the model gives a good prediction of DOC under different curing conditions. The temperature of the printed wiring board (PWB) during solder reflow is measured using thermocouples and the evolution of DOC of the no-flow underfill during the reflow process is calculated. A stress rheometer is used to study the gelation of the underfill at different heating rates. Results show that at high curing temperature, the underfill gels at a lower DOC. Based on the kinetic model and the gelation study, the solder wetting behavior during the eutectic SnPb and lead-free SnAgCu reflow processes is predicted and confirmed by the solder wetting tests.     

No-flow underfill flip chip assembly––an experimental and modeling analysis

In the flip-chip assembly process, no-flow underfill materials have a particular advantage over traditional underfill: the application and curing of the former can be undertaken before and during the reflow process. This advantage can be exploited to increase the flip-chip manufacturing throughput. However, adopting a no-flow underfill process may introduce reliability issues such as underfill entrapment, delamination at interfaces between underfill and other materials, and lower solder joint fatigue life. This paper presents an analysis on the assembly and the reliability of flip-chips with no-flow underfill. The methodology adopted in the work is a combination of experimental and computer-modeling methods. Two types of no-flow underfill materials have been used for the flip chips. The samples have been inspected with X-ray and scanning acoustic microscope inspection systems to find voids and other defects. Eleven samples for each type of underfill material have been subjected to thermal shock test and the number of cycles to failure for these flip chips have been found. In the computer modeling part of the work, a comprehensive parametric study has provided details on the relationship between the material properties and reliability, and on how underfill entrapment may affect the thermal–mechanical fatigue life of flip chips with no-flow underfill.     

Effects of substrate design on underfill voiding using the low cost, high throughput flip chip assembly process and no-flow underfill materials

The formation of underfill voids is an area of concern in the low cost, high throughput, or "no-flow" flip chip assembly process. This assembly process involves placement of a flip chip device directly onto the substrate pad site covered with pre-dispensed no-flow underfill. The forced motion of chip placement causes a convex flow front to pass over pad and solder mask-opening features promoting void capture. This paper determines the effects of substrate design on the phenomena of underfill voiding using the no-flow process. A full-factorial design experiment analyzes several empirically determined factors that can affect void capture in no-flow processing. The substrate design parameters included pad height, solder mask opening height, pad/solder mask opening separation, and pad pitch. The process parameters include chip placement velocity and underfill viscosity. The process robustness is measured in terms of the number of voids created during chip placement, and is further analyzed for the location and any visible modes of void formation. The goal of the work is to determine improved substrate designs to minimize voiding in flip chip processing using no flow underfills.     

FEM modeling of temperature distribution of a flip-chip no-flow underfill package during solder reflow process

Flip chip on organic substrate has relied on underfill to redistribute the thermomechanical stress and to enhance the solder joint reliability. However, the conventional flip-chip underfill process involves multiple process steps and has become the bottleneck of the flip-chip process. The no-flow underfill is invented to simplify the flip-chip underfill process and to reduce the packaging cost. The no-flow underfill process requires the underfill to possess high curing latency to avoid gelation before solder reflow so to ensure the solder interconnect. Therefore, the temperature distribution of a no-flow flip-chip package during the solder reflow process is important for high assembly yield. This paper uses the finite-element method (FEM) to model the temperature distribution of a flip-chip no-flow underfill package during the solder reflow process. The kinetics of underfill curing is established using an autocatalytic reaction model obtained by DSC studies. Two approaches are developed in order to incorporate the curing kinetics of the underfill into the FEM model using iteration and a loop program. The temperature distribution across the package and across the underfill layer is studied. The effect of the presence of the underfill fillet and the influence of the chip dimension on the temperature difference in the underfill layer is discussed. The influence of the underfill curing kinetics on the modeling results is also evaluated.     

Application assessment of high throughput flip chip assembly for ahigh lead-eutectic solder cap interconnect system using no-flowunderfill materials

Flip chip on board (FCOB) is one of the most quickly growing segments in advanced electronic packaging. In many cases, assembly processes are not capable of providing the high throughputs needed for integrated surface mount technology (SMT) processing (Tummala et al, 1997). A new high throughput process using no-flow underfill materials has been developed that has the potential to significantly increase flip chip assembly throughput. Previous research has demonstrated the feasibility and reliability of the high throughput process required for FCOB assemblies. The goal of this research was to integrate the high throughput flip chip process on commercial flip chip packages that consisted of high lead solder balls on a polyimide passivated silicon die bonded with eutectic solder bumped pads on the laminate substrate interface (Qi, 1999). This involved extensive parametric experimentation that focused on the following elements: no-flow process evaluation and implementation on the commercial packages, reflow profile parameter effects on eutectic solder wetting of high lead solder bumps, interactions between the no-flow underfill materials and the package solder interconnect and tented via features, void capture and void formation during processing, and material set compatibility and the effects on long term reliability performance     

Metallurgical reactions in composite 90Pb10Sn/lead-free solder joints and their effect on reliability of LTCC/PWB assembly

Use of 90Pb10Sn solder as a noncollapsible sphere material with 95.5Sn 4Ag0.5Cu and SnInAgCu lead-free solders is investigated. Practical reflow conditions led to strong Pb dissolution into liquid solder, resulting in >20 at.% Pb content in the original lead-free solders. The failure mechanism of the test joints is solder cracking due to thermal fatigue, but the characteristic lifetime of 90Pb10Sn/SnInAgCu joints is almost double that of 90Pb10Sn/95.5Sn4Ag0.5Cu in a thermal cycling test (TCT) over the temperature range from −40°C to 125°C. It is predicted that this is mainly a consequence of the better fatigue resistance of the SnPbInAgCu alloy compared with the SnPbAgCu alloy. Indium accelerates the growth of the intermetallic compound (IMC) layer at the low temperature co-fired ceramic (LTCC) metallization/solder interface and causes coarsening of IMC particles during the TCT, but these phenomena do not have a major effect on the creep/fatigue endurance of the test joints.     

Study of the fluxing agent effects on the properties of no-flowunderfill materials for flip-chip applications

As one of the key requirements of the no-flow underfill materials for flip-chip applications, a proper self-fluxing agent must be incorporated in the developed no-flow underfill materials to provide proper fluxing activity during the simultaneous solder reflow and underfill material curing. However, most fluxing agents have some adverse effects on the no-flow underfill material properties and assembly reliability. In this paper, we have extensively investigated the effects of the concentration of the selected fluxing agent on the material properties, interconnect integrity and assembly reliability. Through this work, an optimum concentration window of the fluxing agent is obtained and a routine procedure of evaluating fluxing agents is established     

Nano-Underfills for High-Reliability Applications in Extreme Environments

Silica particles are used as a filler material in electronic underfills to reduce coefficient of thermal expansion of the underfill-epoxy matrix. In traditional underfills, the size of silica particles is in the micrometer range. Reduction in particle sizes into the nanometer range has the potential of attaining higher volume fraction particle loading in the underfills and greater control over underfill properties for higher reliability applications. Presently, no-flow underfills have very low or no filler content because micron-size filler particles hinder solder joint formation. Nano-silica underfills have the potential of attaining higher filler loading in no-flow underfills without hindering solder interconnect formation. In this paper, property prediction models based on representative volume element (RVE) and modified random spatial adsortion have been developed. The models can be used for development of nano-silica underfills with desirable thermo-mechanical properties. Temperature dependent thermo-mechanical properties of nano-underfills have been evaluated and correlated with models in a temperature range of -175degC to 150degC. Properties investigated include, temperature dependent stress-strain, creep and stress relaxation behavior. Nano-underfills on 63Sn37Pb eutectic and 95.5Sn3.5Ag1.0Cu leadfree flip-chip devices have been subjected to thermal shock tests in the range of -55degC to 125degC and -55degC to 150degC, respectively. The trade-offs between using nano-fillers instead of micron-fillers on thermo-mechanical properties and reliability has been benchmarked.     

Yield analysis and process modeling of low cost, high throughputflip chip assembly based on no-flow underfill materials

As a concept to achieve low-cost, high-throughput flip chip on board (FCOB) assembly, a new process has been developed implementing next generation flip chip processing based no-flow fluxing underfill materials. The low-cost, high throughput flip chip process implements large area underfill printing, integrated chip placement and underfill flow and simultaneous solder interconnect reflow and underfill cure. The goals of this study are to demonstrate feasibility of no flow underfill materials and the high throughput flip chip process over a range of flip chip configurations, identify the critical process variables affecting yield, analyze the yield of the high throughput flip chip process, and determine the impact of no-flow underfill materials on key process elements. Reported in this work is the assembly of a series of test vehicles to assess process yield and process defects. The test vehicles are assembled by depositing a controlled mass of underfill material on the chip site, aligning chip to the substrate pads, and placing the chip inducing a compression type underfill flow. The assemblies are reflowed in a commercial reflow furnace in an air atmosphere to simultaneously form the solder interconnects and cure the underfill. A series of designed experiments identify the critical process variables including underfill mass, reflow profile, placement velocity, placement force, and underfill material system. Of particular interest is the fact that the no-flow underfill materials studied exhibit an affinity for unique reflow profiles to minimize process defects     

Double-layer no-flow underfill materials and process

The no-flow underfill has been invented and practiced in the industry for a few years. However, due to the interfering of silica fillers with solder joint formation, most no-flow underfills are not filled with silica fillers and hence have a high coefficient of thermal expansion (CTE), which is undesirable for high reliability. In a novel invention, a double-layer no-flow underfill is implemented to the flip-chip process and allows fillers to be incorporated into the no-flow underfill. The effects of bottom layer underfill thickness, bottom layer underfill viscosity, and reflow profile on the solder wetting properties are investigated in a design of experiment (DOE) using quartz chips. It is found that the thickness and viscosity of the bottom layer underfill are essential to the wetting of the solder bumps. Chip scale package (CSP) components are assembled using the double-layer no-flow underfill process. Silica fillers of different sizes and weight percentages are incorporated into the upper layer underfill. With a high viscosity bottom layer underfill, up to 40 wt% fillers can be added into the upper layer underfill and do not interfere with solder joint formation.     

Study of the self-alignment of no-flow underfill for micro-BGA assembly

As a concept to achieve high throughput low cost flip-chip assembly, a process development activity is underway, implementing next generation flip-chip processing based on large area underfill printing/dispensing, IC placement, and simultaneous solder interconnect reflow and underfill cure. The self-alignment of micro-BGA (ball grid array, BGA) package using flux and two types of no-flow underfill is discussed in this paper. A “rapid ramp” temperature profile is optimized for reflow of micro-BGA using no-flow underfill for self-aligning and soldering. The effect of bonding force on the self-alignment is also described. A SOFTEX real time X-ray inspection system was used to inspect samples to ensure the correct misalignment before reflow, and determine the residual displacement of solder joints after reflow. Cross-sections of the micro-BGA samples are taken using scanning electronic microscope. Our experimental results show that the self-alignment of micro-BGA using flux is very good even though the initial misalignment was greater than 50% from the pad center. When using no-flow underfill, the self-alignment is inferior to that of using flux. However, for a misalignment of no larger than 25% from the pad center, the package is also able to self-align with S1 no-flow underfill. However, when the misalignment is 37.5–50% from the pad center, there are 10–14% residual displacement after reflow. The reason is the underfill resistant force inhibiting the self-alignment of the package due to rapid increment of underfill viscosity during reflow. The self-alignment of micro-BGA package using no-flow underfill allows only <25% misalignment prior to the soldering. During assembling, although the bonding force does not influence on the self-alignment of no-flow underfill, a threshold bonding force is necessary to make all solder balls contact with PCB pads, for good soldering. The no-flow underfill is necessary to modify the fluxing/curing chemistry for overcoming the effect of tin metal salt produced during soldering on underfill curing, and for maintaining the low viscosity during soldering to help self-alignment.     

双面贴装电路板上BGA焊点的潜在失效机理

采用双面贴装回流焊工艺在FR4基板表面贴装Sn3.0Ag0.5Cu(SnAgCn)无铅焊点BGA器件,通过对热应力加速实验中失效的SnAgCu无铅BGA焊点的显微结构分析和力学性能检测,研究双面贴装BGA器件的电路板出现互连焊点单面失效问题的原因,单面互连焊点失效主要是由于回流焊热处理工艺引起的.多次热处理过程中,NiSnP层中形成的大量空洞是导致焊点沿(Cu,Ni)6Sn5金属间化合物层和Ni(P)镀层产生断裂失效的主要因素.改变回流焊工艺是抑制双面贴装BGA器件的印制电路板出现互连焊点单面失效问题的关键.     

Interfacial reaction between multicomponent lead-free solders and Ag,Cu, Ni,and Pd substrates

The interfacial reaction between two prototype multicomponent lead-free solders, Sn-3.4Ag-1Bi-0.7Cu-4In and Sn-3.4Ag-3Bi-0.7Cu-4In (mass%), and Ag, Cu, Ni, and Pd substrates are studied at 250°C and 150°C. The microstructural characterization of the solder bumps is carried out by scanning electron microscopy (SEM) coupled with energy dispersive x-ray analysis. Ambient temperature, isotropic elastic properties (bulk, shear, and Young’s moduli and Poisson’s ratio) of these solders along with eutectic Sn-Ag, Sn-Bi, and Sn-Zn solders are measured. The isotropic elastic moduli of multicomponent solders are very similar to the eutectic Sn-Ag solder. The measured solubility of the base metal in liquid solders at 250°C agrees very well with the solubility limits reported in assessed Sn-X (X=Ag, Cu, Ni, Pd) phase diagrams. The measured contact angles were generally less than 15° on Cu and Pd substrates, while they were between 25° and 30° on Ag and Ni substrates. The observed intermediate phases in Ag/solder couples were Ag₃Sn after reflow at 250°C and Ag₃Sn and ζ (Ag-Sn) after solid-state aging at 150°C. In Cu/solder and Ni/solder couples, the interfacial phases were Cu₆Sn₅ and (Cu,Ni)₆Sn₅, respectively. In Pd/solder couples, only PdSn₄ after 60-sec reflow, while both PdSn₄ and PdSn₃ after 300-sec reflow, were observed.     

回流次数对Sn3.8Ag0.7Cu-xNi/Ni焊点的影响

研究了复合无铅焊料Sn3.8Ag0.7Cu-xNi(x=0.5,1.0,2.0)与Au/Ni/Cu焊盘在不同回流次数下形成的焊点的性能.结果表明,Ni颗粒增强的复合焊料具有良好的润湿性能,熔点小于222℃;X为0.5的焊料界面IMC由针状(CuNi)6Sn5演化为双层IMC,即多面体状化合物(CuNi)6Sn5和回飞棒...     

The effect of solder paste composition on the reliability of SnAgCu joints

As the electronics industry is moving towards lead-free manufacturing processes, more effort has been put into the reliability study of lead-free solder materials. Various tin–silver–copper-based solders have become widely accepted alternatives for tin–lead solders. In this study, we have tested three different SnAgCu solder compositions. The first consisted of a hypoeutectic 96.5Sn/3.0Ag/0.5Cu solder, the second of a eutectic 95.5Sn/3.8Ag/0.7Cu solder, and the third of a hypereutectic 95.5Sn/4.0Ag/0.5Cu solder. A eutectic SnPb solder was used as a reference. The test boards were temperature-cycled (−40 to +125 °C) until all samples failed. The results of the temperature cycling test were analyzed, and cross-section samples were made of the failed joints. Scanning electron and optical microscopy were employed to analyze the fracture behavior and microstructures of the solder joints. The reliability of lead-free solders and the effect of microstructures on joint reliability are discussed.     

A review of lead-free solders for electronics applications

Ever since RoHS was implemented in 2006, Sn3.0Ag0.5Cu (SAC305) has been the primary lead-free solder for attaching electronic devices to printed circuit boards (PCBs). However, due to the 3.0 wt% Silver (Ag) in SAC305, companies have been looking at less expensive solder alternatives, especially for use in inexpensive products that have short operating lives and are used in mild application conditions. This paper reviews new lead-free solder alternatives and the trends in the industry, including SnCu-based solders, SnAgCu solders with Ag content < 1.0 wt%, SnAg solders, and no-Ag low-temperature solders (e.g., SnBi-based solders). The analysis is conducted for reflow, wave, and rework conditions and for packaged and flip-chip devices.     

Void Formation Study of Flip Chip in Package Using No-Flow Underfill

The advanced flip chip in package (FCIP) process using no-flow underfill material for high I/O density and fine-pitch interconnect applications presents challenges for an assembly process that must achieve high electrical interconnect yield and high reliability performance. With respect to high reliability, the voids formed in the underfill between solder bumps or inside the solder bumps during the no-flow underfill assembly process of FCIP devices have been typically considered one of the critical concerns affecting assembly yield and reliability performance. In this paper, the plausible causes of underfill void formation in FCIP using no-flow underfill were investigated through systematic experimentation with different types of test vehicles. For instance, the effects of process conditions, material properties, and chemical reaction between the solder bumps and no-flow underfill materials on the void formation behaviors were investigated in advanced FCIP assemblies. In this investigation, the chemical reaction between solder and underfill during the solder wetting and underfill cure process has been found to be one of the most significant factors for void formation in high I/O and fine-pitch FCIP assembly using no-flow underfill materials.