Capacitance-voltage characterization of thin film nanoporous alumina templates

This paper presents the results of capacitance-voltage characterization of thin film alumina templates fabricated on silicon substrates. Such templates are of significant interest for the low-cost implementation of semiconductor and metal nanostructure arrays, as well as for potential nanostructure integration with silicon electronics. Thin film alumina templates created on silicon substrates under different anodization conditions were investigated. Capacitance-voltage measurements indicate that the template/silicon interface, important for nanostructure integration on silicon, to be of good device quality.     

一步溶液法制备有机-无机杂化钙钛矿薄膜

有机-无机杂化钙钛矿薄膜作为太阳电池的光吸收层,其薄膜的形貌、结构以及结晶程度等因素对电池的光电转换效率起到了决定性的作用,而薄膜的质量主要取决于制备工艺.采用一步溶液法制备了有机-无机杂化钙钛矿(CH3NH3PbI3)薄膜,主要分析了在氟掺杂氧化锡(FTO)导电玻璃、玻璃和多晶硅3种不同衬底上生长CH3NH3PbI3薄膜的形貌和结构的差异.结果表明,在FTO导电玻璃和玻璃衬底上生长的薄膜的晶粒尺寸和晶粒分布均匀,而在硅衬底上生长的薄膜的边缘晶粒尺寸大于中心处的晶粒,并详细分析了造成这种现象的原因.此外,在50℃的低温下对在FTO导电玻璃衬底生长的CH3NH3PbI3薄膜进行了不同时间的退火处理.实验结果表明,随着热处理时间的增加,晶粒尺寸也增加,但是合成的CH3NH3PbI3薄膜部分发生了分解.     

Silicon Nitride Films Deposited by RF Sputtering for Microstructure Fabrication in MEMS

In the present work, we report silicon nitride films deposited by a radio- frequency (RF) sputtering process at relatively low temperatures (<260°C) for microelectromechanical system (MEMS) applications. The films were prepared by RF diode sputtering using a 3-inch-diameter Si₃N₄ target in an argon ambient at 5 mTorr to 20 mTorr pressure and an RF power of 100 W to 300 W. The influence of the film deposition parameters, such as RF power and sputtering pressure, on deposition rate, Si-N bonding, surface roughness, etch rate, and stress in the films was investigated. The films were deposited on single/double-side polished silicon wafers and transparent fused-quartz substrates. To explore the RF-sputtered silicon nitride film as a structural material in MEMS, microcantilever beams of silicon nitride were fabricated by bulk, surface, and surface-bulk micromachining technology. An RF-sputtered phosphosilicate glass film was used as a sacrificial layer with RF-sputtered silicon nitride. Other applications of sputtered silicon nitride films, such as in the local oxidation of silicon (LOCOS) process, were also investigated.     

Automated fabrication of hybrid printed electronic circuits

Printed electronics offer great potential for new applications such as Internet of Things devices and wearables. However, to date, only a limited number of electronic functions and integration densities can be realised by printing processes. Hence, hybrid printed electronic circuits are actually created by mounting silicon electronic components. Since both printed materials and processes are continuously evolving, an accompanying structured development methodology is required. This paper highlights a digital workflow from design to automated fabrication using the example of a demonstrator circuit. A multi-layer vector ink-jet printing process to print electronic devices onto foil substrates with three functional inks is presented. This printing process is improved using a newly set-up printing system: Integrating a piezo print head into the path planning of the printing system and its control as a virtual stepper axis enable highly precise vector printing. This leads to printed resistors with low tolerances. Adaptations of surface mount technology for assembling silicon electronic components onto printed foil substrates are discussed. Finally, image processing methods to cope with deformations of the flexible foil substrates in the fabrication process are introduced.     

Bonding of silicon with filled and unfilled polymers based on black silicon

A bonding method for silicon wafers with unfilled and filled polymer components using `Black Silicon' is presented. The working principle is an interconnection of `Black Silicon' surfaces with ductile materials. Needles of nanostructured `Black Silicon' with their increased surface and undercut features penetrate the polymer when applying pressure. Plastic deformations of the polymer lead to a permanent bond. The retention force exceeds 1000 N/cm² as experiments with polypropylene and low temperature co-fired ceramic tapes (polymer filled with ceramic) show. The application areas are smart packaging, fluidic interconnects for microsystems, electronic assembly and hybrid polymer-ceramic silicon systems     

Printed microinductors on flexible substrates for power applications

A low-profile microinductor was fabricated on a copper-clad polyimide substrate where the current carrying coils were patterned from the existing metallization layer and the magnetic core was printed using a magnetic ceramic-polymer composite material. Highly loaded ferrite-polymer composite materials were formulated, yielding adherent films with 4/spl pi/M/sub s//spl ap/3900 G at +5000 Oe applied DC field. These composite magnetic films combine many of the superior properties of high temperature ceramic magnetic materials with the inherent processibility of polymer thick films. Processing temperatures for the printed films were between 100/spl deg/C and 130/spl deg/C, facilitating integration with a wide range of substrates and components. The quality factor of the microinductor was found to peak at Q=18.5 near 10 MHz, within the optimal frequency range for power applications. A flat, nearly frequency independent inductance of 1.33 /spl mu/H was measured throughout this frequency range for a 5 mm/spl times/5 mm component, with a DC resistance of 2.6 /spl Omega/ and a resonant frequency of 124 MHz. The combination of printed ceramic composites with organic/polymer substrates enables new methods for embedding passive components and ultimately the integration of high Q inductors with standard integrated circuits for low profile power electronics.     

p-Si TFT栅绝缘层用SiN薄膜的研究

以NH3和SiH4为反应源气体,采用射频等离子体增强化学气相沉积(RF-PECVD)法在多晶硅(p-Si)衬底上沉积了一系列SiN薄膜,并利用椭圆偏振测厚仪、超高电阻-微电流计、C-V测试仪对所沉积的薄膜作了相关性能测试.系统分析了沉积温度和射频功率对SiN薄膜的相对介电常数、电学性能及界面特性的影响.分析表明,沉积温度和射频功率主要是通过影响SiN薄膜中的Si/N比影响薄膜的性能,在制备高质量的p-Si TFT栅绝缘层用SiN薄膜方面具有重要的参考价值.     

Polymer film deposition with fine pitch openings by stencil printing

It is confirmed that stencil printing with a novel developed printable polyimide paste can be used for polymer film deposition on LSI wafers. A thick polyimide film with openings for solder ball bumping can be deposited on all of the LSIs on a wafer by stencil printing at one time. This stencil printing process does not need an expensive lithography process, providing cost-effective wafer-level chip scale packages (WLCSPs). In this study, a novel polyimide paste was tailored to have a higher thixotropy ratio than conventional printable polyimide materials. The novel printable polyimide paste shows that the viscosity ratio of more than 3.5 at the shear rate of 1 to 10 s⁻¹ and that the viscosity increases rapidly after the shear rate is lowered. Fine spaces of 40 μm between 250 μm openings were obtained for 10 μm thick polyimide films on Si wafers. It has been also confirmed that the new paste shows the variation range of 30 μm at the opening size of 385 μm within 100 continuously printed wafers. Even after the new paste was shear-thinned repeatedly, rheological behavior of the new paste was not changed. This robustness leads to higher efficiency of the materials for mass-producing. From the reliability viewpoint of the printed polyimide films, no peelings were observed on plasma-CVD SiN films after the pressure cooker test under the condition of 127 °C and 0.25 MPa with the humidity of 100% for 300 h. The optimal stencil printing process using the novel developed paste will lead to significant cost reduction of a patterned polymer deposition process. Finally, WLCSPs using the stencil printing of the new polyimide paste have been demonstrated for SRAM LSIs on 8-in. wafers.     

Fabrication of thick films of silicon-on-insulator substrates by using a scanning halogen lamp system

A technique for preparing thick films of silicon-on-insulating substrates is presented. We start with a classical deposition of a thin film of polysilicon on patterned stripes of SiO2 grown on Si wafers. The energy of the focused light of a halogen lamp induces a deep melting in the upper part of the substrate. This results in a controlled sinking of the SiO2 strips in the molten silicon. By scanning the molten zone, the silicon solidifies at the leading edge, and the resulting film is made of 20?40 ?m-thick stripes of defect-free Si-on-SiO2 separated by seeding areas.     

SOI/bulk hybrid technology on SIMOX wafers for high performancecircuits with good ESD immunity

A new SOI/bulk hybrid technology with devices on both the thin film and the bottom substrate of SIMOX wafers has been studied. By fabricating ESD protection circuits on the substrate of SIMOX wafers, ESD reliability of high performance CMOS SOI circuits can be significantly improved. Despite the higher surface defect density and micro-roughness on the bottom substrate of SIMOX wafers compared to ordinary bulk wafers, similar electron mobility, intrinsic thermal oxide properties and hot-carrier degradation are observed among MOSFET's fabricated on the different substrates. Thus, the hybrid technology is capable of combining the advantages both of SOI and bulk technology in fabricating high performance circuits     

An aqueous developable photoimageable silver conductor composition for high density electronic packaging

In our preliminary work, we have formulated aqueous developable photoimageable thick film conductor pastes, consisting of ‘inhouse processed’ submicron sized silver powders (functional material), micron sized lead borosilicate glass frits (permanent binder), epoxy acrylate resin with pendant –COOH group (base photoimageable polymer/temporary binder/organic vehicle) and 2,2′-dimethoxy-2-phenylacetophenone (photoinitiator). The conductor pastes thus formulated were manually screen printed on the alumina substrates, dried, exposed to the ultra-violet light through the desired test patterns, developed in a 1% aqueous sodium carbonate solution, and subjected to a standard one-hour thick film firing cycle. Solid content of the polymer appears to influence the paste performance. Prima facie observations indicate that the paste with the organic:inorganic ratio of 28:72 (corresponding to solid content of 89.9% of the polymer system) exhibits better electrical conductivity, relatively smooth surface finish and line/space resolution of 100 μm with ±5 μm accuracy. Investigations related to the effect of glass content on the properties of photoimageable conductor paste are also furnished in this communication.     

Polycrystalline Silicon-Film™ Thin-film Solar Cells: Advanced Products

Thin-film polycrystalline silicon has the potential to achieve the cost reduction and performance improvement necessary for large-scale electricity markets. Reduced cost is achieved by capitalizing on the benefits of thin films grown on low-cost, large-area substrates. Improved efficiency is realized, in spite of reduced material quality, by incorporating enhanced optical absorption and back-surface passivation. The cornerstone of AstroPower's thin-film solar cell technology is the Silicon-Film™ process: a method for the manufacture of solar cell-quality, polycrystalline films of silicon on a variety of low-cost, supporting substrates. Three thin-film solar cell designs, based on this technology, are currently under development. This paper presents the key design features of these three products and briefly reviews the current status of the development of the key technologies that comprise the advanced thin-film solar cell products.     

Influence of substrate on the growth of microcrystalline silicon thin films deposited by plasma enhanced chemical vapor deposition

Microcrystalline silicon (μc-Si) thin films are widely used for silicon thin film solar cells, especially in the high performance tandem solar cells which comprise an amorphous silicon junction at the top and a μc-Si junction at the bottom. One of the major factors affecting the photovoltaic properties of μc-Si thin film solar cells of thin films is the quality of the μc-Si thin films. In this work, we investigated the effect of substrates on the crystallization characteristics and growth behaviors of μc-Si thin films grown by the plasma enhanced chemical vapor deposition method (PECVD), and found that substrates have a strong effect on the crystallization characteristics of μc-Si thin films. In addition, the growth rate of μc-Si thin films was also highly influenced by the substrates. Three types of substrates, quartz glass, single crystalline silicon and thermally oxidized single crystalline silicon, were used for growing μc-Si thin films from SiH₄/H₂ with a flow rate ratio 2:98 at different temperatures. Crystallization characteristics of these μc-Si thin films were studied by Raman scattering and X-ray diffraction techniques.     

Progress in Low-temperature Surface Passivation of Silicon Solar Cells using Remote-plasma Silicon Nitride

Using a remote-plasma technique as opposed to the conventional direct-plasma technique, significant progress has been obtained at ISFH in the area of low-temperature surface passivation of p-type crystalline silicon solar cells by means of silicon nitride (SiN) films fabricated at 350–400°C in a plasma-enhanced chemical vapour deposition system. If applied to the rear surface of the low-resistivity p-type substrates, the remote-plasma SiN films provide outstanding surface recombination velocities (SRVs) as low as 4 cm s⁻¹, which is by a clear margin the lowest value ever obtained on a low-resistivity p-Si wafer passivated by a solid film, including highest quality thermal oxides. Compared to direct-plasma SiN films or thermally grown oxides, the remote-plasma films not only provide significantly better SRVs on low-resistivity p-silicon wafers, but also an enormously improved stability against ultraviolet (UV) light. The potential of these remote-plasma silicon nitride films for silicon solar cell applications is further increased by the fact that they provide a surface passivation on phosphorus-diffused emitters which is comparable to high-quality thermal oxides. Furthermore, if combined with a thermal oxide and a caesium treatment, the films induce a UV-stable inversion-layer emitter of outstanding electronic quality. Due to the low deposition temperature and the high refraction index, these remote-plasma SiN films act as highly efficient surface-passivating antireflection coatings. Application of these films to cost-effective silicon solar cell designs presently under development at ISFH turned out to be most successful, as demonstrated by diffused p-n junction cells with efficiencies above 19%, by bifacial p-n junction cells with front and rear efficiencies above 18%, by mask-free evaporated p-n junction cells with efficiencies above 18% and by MIS inversion-layer cells with a new record efficiency of above 17%. All cells are found to be stable during a UV test corresponding to more than 4 years of glass-encapsulated outdoor operation. © 1997 John Wiley & Sons, Ltd.     

Design strategies for commercial solar cells using the buriedcontact technology

The efficiency of commercial solar cells depends not only on the design and technology used to make the solar cell, but just as importantly on the minority carrier lifetime in the silicon wafer material. This paper presents a design strategy based on matching the efficiency potential of the silicon material to that of the silicon substrate in order to minimize the $/W cost of a solar cell. The flexibility of the buried contact technology allows this design strategy to be fully utilized and a range of buried contact solar cell structures can be developed, each suited to a particular type of commercial silicon substrate. The paper demonstrates that simplified buried contact solar cells are best suited to multicrystalline silicon material. Generation I buried contact solar cells are optimally matched to conventional Czochralski (CZ) substrates, and double-sided buried contact (DS BC) structures will allow the thinner, higher lifetime wafers to reach their full efficiency potential     

流延硅基PZT厚膜工艺研究

研究了基于流延技术制备硅基锆钛酸铅（PZT）厚膜的工艺。考虑衬底特性对厚膜品质的影响,在不同的种子层上分别制备了PZT厚膜,测试工艺结果,证实了种子层的作用。分析了高温烧结时间对流延PZT厚膜品质的影响,确定了最优高温烧结时间。文章提出的硅基PZT厚膜工艺可用于制备射频天线的介质基片。     

直流磁控溅射制备非晶硅薄膜的研究

非晶硅薄膜（a-Si）是目前重要的光敏材料,在很多领域得到广泛应用。直流磁控溅射具有工艺简单．沉积温度低等优点,是制备薄膜的一种重要技术。采用直流磁控溅射工艺在玻璃基板上沉积薄膜,并对样品进行了退火处理。研究了沉积速率与溅射功率的关系。结果表明薄膜的沉积速率与溅射功率近似有线性关系。利用X射线衍射（XRD）对薄膜进行了分析鉴定,结果表明溅射的薄膜是非晶硅薄膜。利用扫描电子显微镜（SEM）对非晶硅薄膜的表面形貌进行了观察和分析,与X射线衍射测试的结果一致。所以．利用直流磁控溅射工艺能在常温下能快速制备出良好的非晶硅薄膜。     

Deposition of the IV–VI films by the hot-wall method on silicon substrates 100 mm in diameter

An experimental installation for the deposition of films of IV–VI compounds by the hot-wall method on silicon substrates 100 mm in diameter is described. The PbTe films on silicon wafers with orientation (100) are obtained and investigated. The PbTe films have a continuous mirror surface and repeat the substrate orientation. The peculiarities of obtaining such films are discussed.     

Optimization of the Thick-and Thin-Film Technologies for Microwave Circuits on Alumina and Fused Silica Substrates

Two technologies can be used in the fabrication of microwave integrated circuits (MIC's), thick film and thin film. This paper describes and compares these technologies. Two types of substrates commonly used in MIC's are tested, alumina (AL/sub 2/O/sub 3/) for the X band, and, because of its better optical flatness and its Lower dielectric constant, fused silica (SiO/sub 2/) for the KU band. The parameters examined are, for thick-film circuits, the nature of metallizations, the method of circuit definition, and the influence of the ground plane, and for thin-film circuits, the influence of the adhesive layer and the thickness of the deposited gold. The parameters selected for the microwave comparison are the microwave Quality factor (Q) of the conductors, the adhesion of the conductor, and the ability to be wire bonded. The results show that, when their technology is optimized, thick films can be as good as thin films in the X band on alumina substrates. On silica subtrates, thin films are better and will be preferred in the KU band (by extension of the C-band measurements).     

Biomimetic Pattern Transfer

Biological systems routinely use phenols to construct complex materials with diverse functions. Typically, these phenolic materials are generated using oxidative enzymes to initiate a cascade of uncatalyzed reactions. We mimic these processes to micropattern films of the aminopolysaccharide chitosan. Specifically, we microfabricate silicon wafers to have gold patterns, cast a chitosan film onto the patterned wafers, and commence pattern transfer by polarizing the underlying gold surfaces to electrochemically initiate the phenol reaction cascade. The electrochemically initiated reactions lead to modification of the chitosan film's chemistry, structure, and fluorescence. Further, electrochemically initiated modification of the chitosan film is localized to the interfacial region between the film and the anode, with resolution in the lateral direction of at least 20 μm. These results demonstrate that electrochemical pattern transfer provides a promising new method for micropatterning flexible films.