共查询到19条相似文献,搜索用时 171 毫秒
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《现代电子技术》2017,(18):26-28
随着服务器系统节点数量和用户任务的不断增多,使得风暴节点出现冲突问题。在此背景下,通过分析服务器系统的节点连接架构,将检测器部署在其通信平台上,对用于检测服务器多冲突风暴节点的MooseFS检测器进行设计与实现。当风暴节点中存在较多冲突时,MooseFS检测器采用动态冗余分布策略与硬件平台协同检测,冲突不多时只使用硬件进行检测。动态冗余分布策略选用冗余度度量节点任务开销,给出风暴节点子任务、带宽和中央处理器运行时间的可用度函数,检验冗余度是否可靠。硬件平台通过逻辑门处理器对子任务、带宽、中央处理器运行时间以及存储容量的负载率进行度量。实验结果表明,所设计的MooseFS检测器拥有很强的资源控制能力。 相似文献
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为了满足航天星载系统中音视频、图像等多样化、复杂化业务数据的无冲突高速传输,以及满足控制信息的实时处理,并实现星载系统SpaceWire-SpaceFibre网络构建,提出了一种支持服务质量(QoS)特性的SpaceFibre接口设计与实现方案。该SpaceFibre接口支持SpaceFibre协议和SpaceWire包层协议,支持带宽预留、优先级和时隙调度QoS机制配置,支持64个时隙和系统时隙同步更新,可同时支持4种业务数据的无冲突和确定性传输,带宽利用率达90%以上。 相似文献
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提出了一种新颖而实用的H.263视频编码方案,其采用了硬件辅助的方法并利用PCI总线的高带宽来达到实时效果;给出了其硬件编码环路框图、具体的PCI接口实现方案及软硬件总体实现方案。 相似文献
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针对认知网络中的频谱接入问题,基于多类用户不同带宽需求提出了一种新的频谱接入策略,即基于用户带宽的动态信道接入策略(BRDSA)。首次提出考虑拥有不同带宽需求的主用户和次用户利用频谱聚合技术进行频谱接入,而频谱聚合技术能够提高次用户对离散频谱的利用率。根据相关网络模型,利用排队理论和马尔科夫模型对整个系统状态进行了分析。仿真结果表明这种动态频谱接入策略极大地提高了频谱利用率。 相似文献
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D—cache是同时多线程处理器的重要共享资源,其分配方式不但影响处理器性能,而且关系到各线程的数据安全。文章提出D—cache按路动态分配策略,其特点如下:消除各线程间的cache替换冲突,彻底消除隐蔽信道的风险:根据各线程的运行情况动态调整D—cache分配,提高资源利用率;实现代价低。 相似文献
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We describe a Java implementation of a policy based bandwidth management system using the standard policy protocols and an interface to the Linux Diffserv implementation. The useful features, such as extensibility and object orientation, of the Java implementation is illustrated by directly referring to the relevant programming codes. Through two practical experiments, we demonstrate the capability of our implementation in supporting policy‐based dynamic resource allocations in enterprise networks. Copyright © 2003 John Wiley &Sons, Ltd. 相似文献
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在宽带、超宽带应用中,单一信号带宽达几百兆赫兹;或者在不同中频同时调制多个信号产生的宽带信号也达数百兆赫兹,用常规的数字下变频方法很难实现。文章提出了一种基于DFT滤波器组的高效数字下变频结构,分析了该解调算法的特点和实现性能。对已知信号带宽和中频的宽带信号,对比了DFT滤波器组和多相分解算法的性能。对信号带宽和中频均在变化的信号,给出了实现思路。最后,给出了该DFT滤波器组的硬件实现方案。 相似文献
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The design of a low-power, low-voltage, 12-b 8-kHz bandwidth ΣΔ modulator for high-quality voice that consumes only 0.34 mW at 1.95 V supply is described. The modulator employs a special architecture in which a third-order modulator is stabilized by a local feedback loop around each integrator. Unlike multistage ΣΔ modulators, this architecture is very tolerant to the modest dc gain of low voltage op-amps. The architecture, together with special circuit techniques, permits a low-voltage switched capacitor implementation at 1.95 V-3.3 V supply using standard 1.2-μm CMOS technology 相似文献
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Medard M. Lumetta S. Liuyang Li 《Selected Areas in Communications, IEEE Journal on》2002,20(4):822-833
We describe an architecture for an optical local area network (LAN) or metropolitan area network (MAN) access. The architecture allows for bandwidth sharing within a wavelength and is robust to both link and node failures. The architecture can be utilized with an arbitrary, link-redundant mesh network (node-redundancy is necessary only to handle all node failures), and assumes neither the use of a star topology nor the ability to embed such a topology within the physical mesh. Reservation of, bandwidth is performed in a centralized fashion at a (replicated) head end node, simplifying the implementation of complex sharing policies relative to implementation on a distributed set of routers. Unlike a router, however, the head end does not take any action on individual packets and, in particular, does not buffer packets. The architecture thus avoids the difficulties of processing packets in the optical domain while allowing for packetized shared access of wavelengths. We describe the route construction scheme and prove its ability to recover from single link and single node failures, outline a flexible medium access protocol and discuss the implications for implementing specific policies, and propose a simple implementation of the recovery protocol in terms of state machines for per-link devices 相似文献
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I. Yu. Pozdnyakov G. I. Turkanov D. V. Negrov 《Journal of Communications Technology and Electronics》2017,62(3):229-235
A reconfigurable and scalable architecture of systems for digital processing and synthesis of broadband radar signals is studied. The design of a radar with this architecture and a bandwidth of the synthesized and processed signals of 1.5 GHz is considered. The potential to adjust the radar parameters independently on the basis of the system-level analysis of the architecture and by working over the issues of its implementation is demonstrated. The architecture relies on specialized methods for digital signal processing with programmable logic and parallel processing. 相似文献
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A bus-oriented multiprocessor architecture specialized for computation of the discrete Fourier transform (DFT) of a length N =2M sequential data stream is developed. The architecture distributes computation and memory requirements evenly among the processors and allows flexibility in the number of processors and in the choice of a fast Fourier transform (FFT) algorithm. With three buses, the bus bandwidth equals the input data rate. A single time-multiplexed bus with a bandwidth of three times the input data rate can alternatively be used. The architecture requires processors that have identical hardware, which makes it more attractive than the cascade (pipeline) FFT for multiprocessor implementation 相似文献
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Multi-stage switching system using optical WDM grouped links based on dynamic bandwidth sharing 总被引:1,自引:0,他引:1
A three-stage Clos switch architecture is attractive because of its scalability. From an implementation point of view, it allows us to relax the cooling limitation, but there is a problem interconnecting different stages. This article presents a three-stage switching system that uses optical WDM grouped links and dynamic bandwidth sharing. We call it a WDM grouped-link switch. The introduction of WDM makes the number of cables used in the system proportional to the switch size. Dynamic bandwidth sharing among WDM grouped links prevents the statistical multiplexing gain offered by WDM from falling even if the switching system becomes large. The WDM grouped-link switch uses cell-by-cell wavelength routing. A performance evaluation confirms the scalability and cost-effectiveness of this switch. An implementation of the WDM grouped link and a compact planar lightwave circuit platform is described. This architecture allows us to expand the throughput of the switching system up to 5 Tb/s. 相似文献
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H. C. Leligou Ch. Linardakis K. Kanonakis J. D. Angelopoulos Th. Orphanoudakis 《International Journal of Communication Systems》2006,19(5):603-617
The steadily rising demand for multimedia and data services, the falling cost and omnipresence of Ethernet and the maturity of passive optical networks (PON) technology, promise to radically change the landscape in the local loop. The heart of a gigabit PON system (recently standardized by FSAN/ITU) is the medium access controller (MAC), which arbitrates access to the upstream link among users with fluctuating traffic demands and effects the multiplexing and concentration policy. At the same time, it has to safeguard the service quality and enforce the parameters agreed in the service level agreements (SLAs) between the users and the service provider. In this paper, a MAC protocol designed to serve any mix of services according to their quality of service (QoS) needs, employing four priority levels along with a high number of logically separate data queues is presented. The architecture and implementation in hardware of a MAC algorithm capable of allocating bandwidth down to a resolution of a byte with QoS differentiation is the focus of this paper. It employs the bandwidth arbitration tools of the FSAN/ITU G.984.3 standard and maps SLA parameters to GPON service parameters to create an efficient, fair and flexible residential access system. Copyright © 2005 John Wiley & Sons, Ltd. 相似文献