Avalanche injection into the oxide in silicon gate-controlled devices—I theory

The avalanche injection into the oxide region of silicon gate-controlled devices is analysed in some detail, in terms of the physical theory of hot electrons in silicon as developed by Bartelink, Moll and Meyer. Numerically computed universal plots are given for the calculation of the hot-carrier injection ratio (avalanche-induced gate current over junction current) at given maximum interface electric field at breakdown. Features such as barrier reflexion due to transverse momentum of electrons, non-normal orientation of the electric field and Schottky barrier lowering have been incorporated in the analysis. Values of the hot-carrier injection ratio in positive-gate biased p⁺?n diodes (electron injection) calculated in this theory range between 4·3 × 10^?4 and 4·7 × 10^?3 for maximum interface electric fields at breakdown between 1·0 × 10⁶ V/cm and 1·4 × 10⁶ V/cm, if the fitting parameters of the above quoted physical theory are used.     

Avalanche injection into the oxide in silicon gate-controlled devices—II. Experimental results

An experimental investigation of the avalanche-injection phenomenon is presented in comparison with the theoretical analysis developed in the preceding paper. Experiments are performed on special highly-perfect gate-controlled p⁺-n diodes of different background impurity concentrations (5 × 10¹⁴–5 × 10¹⁵ cm^?3) and gate-oxide thicknesses (0.2–1.0 μm), biased as to obtain electron injection. A good order-of-magnitude (e.g. 2.2 × 10^?3 experimental vs 4.7 × 10^?3 theoretical) agreement is found between theory and experiment for the hot-carrier (electron) injection ratio η_i when experimentally determined maximum interface electric fields $\text{E}{}_{\mathrm{s}}\text{(0)}$ are used and the fitting parameters of the basic theory of Bartelink et al. are maintained. The gate-voltage and the oxide-thickness dependencies of $\text{E}{}_{\mathrm{s}}\text{(0)}$ are consistent with the corresponding observed values of η_i. The “electron-transparency” property of the oxide is defined and investigated finding that it is enhanced by, (i) removing the boron-doped mask oxide and growing a new (clean) oxide and, (ii) decreasing the oxide thickness. Avalanche-stress experiments are also presented and discussed.     

High power gate-controlled switch

The ratings of GCS's have remained around 10 amperes and 600 volts since the early 1960's. The problem of increasing the device's capability is therefore reviewed. Experimental results show that turn-off is governed by the diversion of the anode current through the gate,the sequence of junction recovery, the optimum gate drive timing, and the condition of a low impedance drive voltage below the gate avalanche point. Furthermore, the scaling-up for high current assumes that the total current is shared by each elemental area at all times, Tests revealed that nonuiformity leads to shifting of load current during turn-off into on area which causes failure. With due consideration of these factors, a practical design and process for the high power GCS were developed. Data on developmental 50-ampere GCS's are presented.     

LED光电器件的性能调控

制备了具有高量子效率的发光二极管(LED)器件。对于LED光电器件提高辐射复合速率有利于缓解电子泄露,增加了LED的发光功率,缓解了LED在大电流下的效率下降问题。本文通过采用InGaN/GaN作为LED的垒层,减小由极化引起的静电场,增大电子和空穴波函数的交叠比,从而增大了辐射复合速率。     

Initial turn-on area of gate-controlled thyristors

The initial turn-on conditions have been examined for gate-controlled thyristors. Thermal measurements by means of an i.r. microscope detecting surface temperature show that hot spots are formed around the gate, confirming previous reported results obtained by recombination radiation measurements. Electrical measurements on a specially prepared device with a cathode divided into a number of sectors prove that these hot spots are not formed due to initial load current pinching effects, but to a current preference in certain crystallographic directions. The hot spot formation is strongly influenced by the blocking voltage level and the gate current level as well as by the mechanical stress conditions in the gate region. Some suggestions are made concerning the qualitative physical understanding of these phenomena.     

Small-signal analysis of the gate-controlled diode

This paper describes the small signal behavior of MOS gate-controlled diodes. An expression for the capacitance of this device is developed from basic device physics equations. Computer calculations are compared with measured data and the model is seen to predict both the frequency and voltage dependence of the capacitance. The development of this model was made possible through the careful decomposition of teh basic MOS equations into time dependent and static parts.     

Geometric effects on the gate-controlled capacitor

The effect of p-n junction geometry on the capacitance-voltage (C-V) and conductance-voltage (G-V) characteristics of a gate-controlled Capacitor (GCC) is discussed. Three p-n junction geometries were studied; one was a circular structure and the remaining two were cross structures. It is concluded that the effective transit distances are decreased as the geometries of the junction become more complex.     

Secondary breakdown thermal characterization and improvement of semiconductor devices

This paper indicates that the energy dependence of semiconductor devices with respect to secondary breakdown can be explained on the basis of transient thermal resistance. The procedure for determining the transient thermal resistance is described. Results indicate that the thermal time constants of transistors is much shorter than heretofore recognized. Similar results are presented for voltage regulator diodes. In addition, a simple technique is described which significantly increases the thermal time constant of these devices. Similar changes are proposed for other semiconductor devices.     

Injection-gated DI diode with gate-controlled holding voltage

Double-injection (DI) devices consist of an anode (p⁺) and a cathode (n⁺) in a semi-insulator containing deep traps and exhibit S-type differential negative resistance (DNR) similar to SCR's under proper conditions [1]-[6]. Recently this laboratory reported a DI device with a hole emitting (p⁺) gate between the anode and the cathode which resulted in substantial improvement in the switching threshold voltage VThas well as extreme sensitivity Of VThto gate voltage [7]. A major limitation of these DI devices was Seen to be the relatively high ON state voltage. In this paper, we describe some recent results where the ON state or holding voltage VHis controlled by a supplementary gate bias which allows VHto be arbitrarily reduced to zero or even to a negative value by applying sufficiently large negative voltages to the controlling gate with respect to the cathode.     

栅控电势磁性隧道结的隧穿磁阻研究

基于Slonczewski理论模型和矩阵方法研究了由栅控制中间层电势高度的磁性隧道结的隧穿磁阻效应。数值计算了中间层势垒为0~3 V以及中间层势阱为0~3 V的磁性隧道结的隧穿磁阻随着中间层厚度改变的变化曲线。计算结果表明,当中间层为势垒时,隧穿磁阻随着中间层厚度单调下降;当中间层为势阱时,隧穿磁阻随着中间层厚度振荡,并且相比于势垒情况时明显提高。这说明栅控中间层磁性隧道结相比于传统磁性隧道结具有更好的可控性和提高隧穿磁阻效应的潜力。     

Temperature dependence of the gate-controlled portion of ion-controlled diodes

The ion-controlled diode is a gate-controlled diode where the gate is replaced by an ionic conducting solution and the insulator is composed of the usual oxide, a barrier against diffusion, and a chemically sensitive membrane with reasonably specific sensitivity to a given ion. In order to establish the utility of this structure for a down-hole sensor in geothermal brine wells, a series of experiments were conducted with a standard gate-controlled diode to confirm calculations on the temperature dependence of the response. Excellent agreement was obtained including a negative phase shift in the measured admittance at elevated temperatures. The degree of agreement gives us confidence that it will be possible io eventually construct a 250°C sensor.     

基于栅控二极管研究碲镉汞器件表面效应

采用不同工艺生长了CdTe/ZnS复合钝化层,制备了相应的长波HgCdTe栅控二极管器件并进行了不同条件下I-V测试分析.结果表明,标准工艺制备的器件界面存在较高面密度极性为正的固定电荷,在较高的反偏下形成较大的表面沟道漏电流,对器件性能具有重要的影响.通过钝化膜生长工艺的改进有效减小了器件界面固定电荷面密度,使HgCdTe表面从弱反型状态逐渐向平带状态转变,表面效应得到有效抑制,器件反向特性获得显著改善.此外,基于最优的工艺条件制备的器件界面态陷阱数量得到大幅降低,器件稳定性增强;同时器件R_0A随栅压未发生明显地变化.     

1/f noise in gate-controlled planar silicon diodes

Low-frequency excess noise in planar bipolar silicon devices was investigated by means of gate-controlled n+?p diodes. Within the range of parameter values covered in this investigation, it was found that the noise-power maxima invariably occur at gate bias voltages leading to depletion of majority carriers at the surface of the high-resistivity side of the p?n junction.     

Performance improvement of tall triple gate devices with strained SiN layers

In this letter, we investigate the influence of tensile and compressive SiN layers on the device performance of triple-gate devices with 60-nm fin height and fin widths down to 35 nm. It will be shown that even for narrow fin devices, the nMOS performance improvement can be as high as 20% with tensile strained layers. The improvement seen for pMOS is lower, about 10%. Next to that both compressive as well as tensile SiN layers can increase the pMOS on-state current.     

Reversible breakdown voltage collapse in silicon gate-controlled diodes

A reversible breakdown voltage collapse is recorded in the high voltage range of the junction breakdown voltage vs gate voltage characteristic of silicon gate-controlled diodes, which is explained in terms of a spatial switching of the avalanche breakdown within the device structure. The collapse gate voltage is oxide-thickness dependent and is accurately predictable as the avalanche breakdown voltage of the deeply depleted MOS capacitor within the gate-controlled diode structure.The minimum oxide thickness required for approaching the bulk-determined breakdown voltage in field-plated planar diodes and transistors is found to range from 0.01 to 5.00 μm for substrate impurity concentration from 10¹⁷ to 5 × 10¹⁴ cm^?3, according to a design plot provided in the paper.     

An electrically and optically gate-controlled Schottky/2DEGvaractor

A novel gate-controlled varactor is reported. The three-terminal varactor is a modulation-doped heterostructure of AlGaAs/GaAs with two Schottky contacts directly made to a two-dimensional electron gas (2DEG). The third, gate, contact is formed from highly doped n⁺ GaAs material to allow an open optical window that can be used for optical gating and mixing. Structure capacitance is less than 1 pF and a change of more than 30% from the zero bias capacitance is observed with the applied gate voltage. The capacitance also increases proportionally with applied light and inversely with the terminal voltage     

Some considerations for reduction of noise and instability improvement in high-power crossed-field devices

The maximum potential of the high-power crossed-field devices has been restricted because of the presence of instability in these devices without any RF drive. The experimental investigation of the crossed-field instability as found from various tubes is briefly reviewed. It is believed that this instability is due to interaction of the slow cyclotron wave with the fast forward circuit wave. The theoretical work presented here refers to the interaction of both the slow and fast cyclotron waves with either of the circuit waves. The tuning characteristics of the interacting (oscillating) frequency due to slight changes in beam velocity resulting from changes in sole-to-anode voltage or magnetic field are derived. It is found that there is a good correlation between the theoretical and experimental results only for the case of interaction of the slow cyclotron wave with the fast forward circuit wave. For other interactions the tuning characteristics have opposite signs. In order to achieve a stable and less noisy operation of the device it is necessary to avoid the interaction of the cyclotron modes with the circuit wave. This limits the usable bandwidth which is plotted for different operating parameters. The electronic efficiency depending upon these operating parameters is also discussed. The problems in the gun design are reviewed. It is estimated that the conventional Kino gun may be used without any loss in bandwidth and efficiency up to frequencies in L band provided design procedures outlined in the paper are followed. For higher frequencies one has to use modified guns unless a reduction in bandwidth and efficiency can be tolerated.     

The insulated linear antenna-revisited

In the past, the insulated linear antenna has been analyzed with an approximate transmission-line theory. The range of validity for this theory has not been established. In this paper, the finite-difference time-domain (FDTD) method is used to analyze the insulated monopole antenna. The validity of the FDTD analysis is established by comparison of results with accurate measurements for a variety of antennas. The FDTD analysis is then used to determine the accuracy of the approximate transmission-line theory. Graphs are provided to quantify the errors in the approximate theory as functions of the geometry and the electrical properties of the monopole antenna     

Fast-switching insulated gate transistors

Insulated gate transistors (IGT's) with high-speed gate turn-off capability have been developed by using electron irradiation to reduce the minority-carrier lifetime in the drift region. Gate turnoff times as low as 200 ns have been achieved. These devices have been found to offer a unique advantage in the ability to tradeoff conduction and switching losses which allows optimization of device characteristics for each application.