RETRACTED: Implementation System of Human Eye Tracking Algorithm Based on FPGA

With the high-speed development of transportation industry, highway traffic safety has become a considerable problem. Meanwhile, with the development of embedded system and hardware chip, in recent years, human eye detection eye tracking and positioning technology have been more and more widely used in man-machine interaction, security access control and visual detection.
In this paper, the high parallelism of FPGA was utilized to realize an elliptical approximate real-time human eye tracking system, which was achieved by the series register structure and random sample consensus (RANSAC), thus improving the speed of image processing without using external memory. Because eye images acquired by the camera often generate a lot of noises due to uneven light and dark background, the preprocessing technologies such as color conversion, image filtering, histogram modification and image sharpening were adopted. In terms of feature extraction of images, the eye tracking algorithm in this paper adopted seven-section rectangular eye tracking characteristic method, which increased a section between the mouth and the nose on the basis of the traditional six-section method, so its recognition accuracy is much higher. It is convenient for the realization of hardware parallel system in FPGA. Finally, aiming at the accuracy and real-time performance of the design system, a more comprehensive simulation test was carried out.
The human eye tracking system was verified on DE2-115 multimedia development platform, and the performance of VGA (resolution: 640×480) images of 8-bit grayscale was tested. The results showed that the detection speed of this system was about 47 frames per second under the condition that the detection rate of human face (front face, no inclination) was 93%, which reached the real-time detection level. Additionally, the accuracy of eye tracking based on FPGA system was more than 95%, and it has achieved ideal results in real-time performance and robustness.     

FPGA软硬件协同处理实时图像处理系统

基于PC机图像处理系统实时性不强,DSP+FPGA图像处理系统的成本高、资源利用率低,单纯使用FPGA硬件实现的图像算法类型较为单一,针对这一系列问题,提出了一种基于FPGA软硬件协同处理的实时图像处理系统.采用一片FPGA芯片作为系统的核心,利用CCD相机等采集图像,通过SSRAM将图像缓存,以SOPC为控制核心,协调软硬件共同进行图像处理.易于使用硬件实现的图像处理模块(如滤波、形态学算法、图像校正、边缘检测等)均使用Verilog HDL语言实现,通过SOPC控制这些图像处理模块,实现相应的图像处理功能;而硬件难于实现的部分(如流程控制、复杂的分支判断)则使用SOPC中的CPU来实现.实验表明,系统卖时性强、图像处理速度快、可进行复杂图像算法的运算,同时具有设计简单、应用灵活、成本低的特点.     

Fast image foreground object segmentation based on block texture for embedded system implementation

In this paper, a novel block-based foreground object detection method based on block texture is presented. It can significantly reduce the memory usage when constructing the background model in dynamic scenes. The proposed background model and detection algorithm are suitable for implementing on embedded system platforms with resource limitations. The experimental results of processing benchmark videos show that our method has outcomes that are very close to ground truth segmentation. In addition, the proposed method requires approximately 23.97% less memory than the latest algorithms. Finally, the proposed approach is implemented on an embedded system platform. The processing speed can achieve a real-time rate of at least 20 fps, which is an improvement of 17.64% as compared to the latest algorithms.     

海洋资料浮标声学特征采集系统设计

为利用我国现有的10 m大型资源浮标,实现对海上侵权船只进行探测和识别,介绍了一种加装在浮标上的声学特征采集系统设计。该系统设计包括声学基阵设计,信号采集处理机设计,目标探测与方位估计算法和声学基阵方位补偿方法等。2014年6月进行了一次湖上试验,试验结果表明：声学特征采集系统的硬件可靠,目标探测、方位估计和方位补偿算法有效。该系统已在我国特定敏感区域开展的维权执法目标探测识别与信息传输技术的信息综合监视中示范应用。     

光电成像跟踪系统的实时数据融合技术研究

光电成像跟踪系统需要保证不同目标的自适应识别,同时严格按照时间序列执行的图像处理又是一个强实时性过程。实时融合跟踪技术提出并行执行多个算法组以适应不同类型目标的识别,并通过像素级、特征级和决策级的同时融合处理保证了系统跟踪的稳定性,最后在嵌入式并行处理硬件平台上有效解决了对运动目标的自适应跟踪。文中详细阐述了实时融合跟踪技术的技术思想和技术路线,在剖析其并行结构的基础上完成了光电成像跟踪系统的嵌入式硬件并行平台的设计和实现,取得了显著的工程应用成果。     

包装箱型号标记缺陷检测系统设计与实现

目的 为了实现空调包装箱上型号标记缺陷的实时动态检测,基于图像处理技术设计包装箱型号标记缺陷检测系统.方法 基于AM5728控制器设计控制系统硬件平台,主要包括控制单元、图像采集与处理单元、成像单元等,并进行实际测试研究.采用几个关键方法,包括图像增强处理、形态学、缺陷检测、动态阈值分割算法等,并根据包装箱型号标记图像特征选择配准区域,同时给出一种动态阈值分割算法,利用各种算法实现缺陷检测.结果 采集了250个包装箱条码样本,采用文中方法获取到了监测数据,正确率高达97.2％,漏检率为0.结论 该方法具有较高的可靠性、通用性,可实现包装箱型号标记的缺陷快速检测,解决了空调包装箱上的型号标记实时动态缺陷检测的实际工程问题.     

Fault section estimation for distribution substations using on-chip design

A new fault detection circuit for on-chip design is presented in this article. The circuit function to detect substation faults has been investigated and verified on an Altera DE1 platform with Cyclone II 2C20 field-programmable gate array. The experimental results showed that the hardware prototyping is feasible for practical applications. Compared to existing fault diagnosis methods, the proposed hardware implementation is more suitable for real-time applications as it is able to achieve high-speed inference. Additionally, the computational burden on host computers in a supervisory control and data acquisition system can thus be reduced through the presented framework.     

基于RTLinux的模块化、网络化开放式控制器系统

现代开放式控制系统追求方便的扩展、灵活的定制、容易的移植和无缝的集成等特性。本文提出了一种基于RTLinux的开放式控制器系统(RTOC)。文章首先提出一种包含硬件平台、操作系统模块和应用软件模块的参考模型。然后,在实时操作系统RTLinux上开发完成了RTOC。由于RTLinux操作系统平台的开放性,在RTOC中,应用软件模块和操作系统模块都可以被轻松地扩展与定制。同时由于核心部分采用标准C语言进行开发,加之：RTLinux本身具有良好的可移植性,RTOC的软件部分能够很容易地移植到其它硬件平台上。为了保证模块之间的无缝连接,RTOC中实现了基于文件系统的通讯方法和硬件无关访问接口。整个系统采用层次化、模块化的设计,结构清晰,便于二次开发。同时由于RTLinux的支持和RTOC系统设计的优势,本系统具有明显的网络化特征。在RTOC执行控制任务时,关键任务会被加载到系统的核心态运行,从而保证了实时性能。最后,RTOC系统被成功地应用于虚拟漫游平台的控制试验中,证明了其具有良好开放性的优势。     

Eye-tracking architecture for biometrics and remote monitoring

Eye tracking is one of the latest technologies that has shown potential in several areas, including biometrics; human-computer interactions for people with and without disabilities; and noninvasive monitoring, detection, and even diagnosis of physiological and neurological problems in individuals. Current noninvasive eye-tracking methods achieve a 30-Hz rate with a low accuracy in gaze estimation, which is insufficient for many applications. We propose a new noninvasive optical eye-tracking system that is capable of operating at speeds as high as 6-12 kHz. A new CCD video camera and hardware architecture are used, and a novel fast algorithm leverages specific features of the input CCD camera to yield a real-time eye-tracking system. A field-programmable gate array is used to control the CCD camera and to execute the operations. Initial results show the excellent performance of our system under severe head-motion and low-contrast conditions.     

FPGA Implementation of Deep Leaning Model for Video Analytics

In recent years, deep neural networks have become a fascinating and influential research subject, and they play a critical role in video processing and analytics. Since, video analytics are predominantly hardware centric, exploration of implementing the deep neural networks in the hardware needs its brighter light of research. However, the computational complexity and resource constraints of deep neural networks are increasing exponentially by time. Convolutional neural networks are one of the most popular deep learning architecture especially for image classification and video analytics. But these algorithms need an efficient implement strategy for incorporating more real time computations in terms of handling the videos in the hardware. Field programmable Gate arrays (FPGA) is thought to be more advantageous in implementing the convolutional neural networks when compared to Graphics Processing Unit (GPU) in terms of energy efficient and low computational complexity. But still, an intelligent architecture is required for implementing the CNN in FPGA for processing the videos. This paper introduces a modern high-performance, energy-efficient Bat Pruned Ensembled Convolutional networks (BPEC-CNN) for processing the video in the hardware. The system integrates the Bat Evolutionary Pruned layers for CNN and implements the new shared Distributed Filtering Structures (DFS) for handing the filter layers in CNN with pipelined data-path in FPGA. In addition, the proposed system adopts the hardware-software co-design methodology for an energy efficiency and less computational complexity. The extensive experimentations are carried out using CASIA video datasets with ARTIX-7 FPGA boards (number) and various algorithms centric parameters such as accuracy, sensitivity, specificity and architecture centric parameters such as the power, area and throughput are analyzed. These results are then compared with the existing pruned CNN architectures such as CNN-Prunner in which the proposed architecture has been shown 25% better performance than the existing architectures.     

一种基于旋转编码器的车辆行车状态无线监测装置

开发一种基于旋转编码器的车辆行车状态无线监测装置,采用增量式旋转编码器作为速度测量元件,基于STM32F103VET6处理器与嵌入式实时操作系统μC/OS-Ⅱ进行系统监测装置的软硬件设计。比较目前几种常用的车辆测速方式的优劣,叙述车辆行车状态无线监测装置的工作原理及其架构,速度测量元件、监测装置的软硬件子系统的设计要点,给出软件流程图和行车状态实时监测曲线。根据现场的实验测试表明:该系统不仅架构简单、使用方便,而且具有良好的实时性、可靠性和测速分辨率等。     

Distributed Sensing Floor for an Intelligent Environment

This paper reports on the development of a distributed sensing floor using an optical fiber sensor. We introduce an alternative yet simple method to manufacture a distributed sensing floor. This method is based on Brillouin optical correlation domain analysis (BOCDA) technology, which can detect the strain deviation along a fiber caused by pressure events. With suitable computational algorithms, the distributed sensing floor is able to detect the presence of occupants and track them efficiently. In our tests, the success rate of location detection was 96%, and the estimation error for the weight of the occupant was plusmn5 kg. The spatial resolution could be tuned without having to also change the hardware architecture.     

Synaptic Device Network Architecture with Feature Extraction for Unsupervised Image Classification

For the efficient recognition and classification of numerous images, neuroinspired deep learning algorithms have demonstrated their substantial performance. Nevertheless, current deep learning algorithms that are performed on von Neumann machines face significant limitations due to their inherent inefficient energy consumption. Thus, alternative approaches (i.e., neuromorphic systems) are expected to provide more energy‐efficient computing units. However, the implementation of the neuromorphic system is still challenging due to the uncertain impacts of synaptic device specifications on system performance. Moreover, only few studies are reported how to implement feature extraction algorithms on the neuromorphic system. Here, a synaptic device network architecture with a feature extraction algorithm inspired by the convolutional neural network is demonstrated. Its pattern recognition efficacy is validated using a device‐to‐system level simulation. The network can classify handwritten digits at up to a 90% recognition rate despite using fewer synaptic devices than the architecture without feature extraction.     

基于Zynq的实时视频图像角点检测系统

针对机器视觉测量应用中,待测关键点的自动识别与定位中的角点信息提取问题,以ZYNQ系列可拓展平台内部ARM+FPGA的异构架构为基础,采用软硬件协同设计方法,搭建了一套可进行实时视频图像角点检测的系统。利用Vivado HLS工具,将角点检测算法封装成可以部署到PL端的IP核,极大地缩短了开发周期;对系统中各个模块进行了合理的任务分配,使得系统拥有ARM的灵活性以及FPGA的并行处理能力,展现了并行异构架构的优势。该系统中图像算法IP核可以进行灵活的算法替换和更新,为基于机器视觉检测的小型化应用提供了重要参考。     

光纤实时传输的多核DSP图像处理系统(英文)

为解决光电经纬仪上高速率、高分辨率实时图像传输及处理瓶颈问题。本文提出了基于光纤传输的实时图像处理平台体系架构思想,设计了以FPGA+多核DSP结构的图像处理单元,实现高速实时图像经光纤传输至处理单元。在此基础上,开发了自定义的光纤图像传输协议。利用该协议,使得图像处理系统与各个分系统之间的光纤互联,以及高速实时图像光纤传输至显示子系统,处理子系统和记录子系统。本文阐述了系统总体结构思想,系统硬件原理设计和软件设计,并对其中的图像光纤传输协议设计,多核DSP处理单元设计等进行详细介绍。搭建了实验测试平台,通过实验平台对系统进行测试和分析。实验结果表明,实时图像在光纤上进行3.125Gb/s、在FPGA与多核DSP之间进行3.125Gb/s速率上传输,系统稳定、可靠、误码率低,且具有处理能力强、抗电磁干扰性能强等优点,并已应用到实际工程项目中。     

An Experimental Low-Cost, Low-Data-Rate Rapid Structural Assessment Network

In this paper, we present the design, implementation, and experimental evaluation of a wireless sensor network for real-time structural ldquohealthrdquo monitoring. We use simple custom-built gages to detect cracks in critical structural elements. The main data reports require no structural analysis for interpretation, have a low data rate, and are naturally resilient to loss. We show how a variety of low-cost, off-the-shelf data acquisition/communication devices can be used to support remote monitoring by a control center. The heterogeneous hardware is accommodated by the use of open technology standards and a software architecture that is portable, modular, and highly configurable. We present an experimental evaluation of our structural-assessment network done using a full-scale three-story reinforced concrete building that was tested under lateral forces emulating forces induced by earthquakes. Our results show that a set of 12 strategically positioned sensors achieved a 100% detection rate for cracks crossing sensors and a zero false-alarm rate (in the sense that all signals exceeding a preset threshold were traced to cracks exceeding a specified total width).     

Hardware and software platform for real-time processing and visualization of echographic radiofrequency signals

In this paper the architecture of a hardware and software platform, for ultrasonic investigation is presented. The platform, used in conjunction with an analog front-end hardware for driving the ultrasonic transducers of any commercial echograph, having the radiofrequency echo signal access, make it possible to dispose of a powerful echographic system for experimenting any processing technique, also in a clinical environment in which real-time operation mode is an essential prerequisite. The platform transforms any echograph into a test-system for evaluating the diagnostic effectiveness of new investigation techniques. A particular user interface was designed in order to allow a real-time and simultaneous visualization of the results produced in the different stages of the chosen processing procedure. This is aimed at obtaining a better optimization of the processing algorithm. The most important platform aspect, which also constitutes the basic differentiation with respect to similar systems, is the direct processing of the radiofrequency echo signal, which is essential for a complete analysis of the particular ultrasound-media interaction phenomenon. The platform completely integrates the architecture of a personal computer (PC) giving rise to several benefits, such as the quick technological evolution in the PC field and an extreme degree of programmability for different applications. The PC also constitutes the user interface, as a flexible and intuitive visualization support, and performs some software signal processing, by custom algorithms and commercial libraries. The realized close synergy between hardware and software allows the acquisition and real-time processing of the echographic radiofrequency (RF) signal with fast data representation.     

Tour Planning Design for Mobile Robots Using Pruned Adaptive Resonance Theory Networks

The development of intelligent algorithms for controlling autonom- ous mobile robots in real-time activities has increased dramatically in recent years. However, conventional intelligent algorithms currently fail to accurately predict unexpected obstacles involved in tour paths and thereby suffer from inefficient tour trajectories. The present study addresses these issues by proposing a potential field integrated pruned adaptive resonance theory (PPART) neural network for effectively managing the touring process of autonomous mobile robots in real-time. The proposed system is implemented using the AlphaBot platform, and the performance of the system is evaluated according to the obstacle prediction accuracy, path detection accuracy, time-lapse, tour length, and the overall accuracy of the system. The proposed system provide a very high obstacle prediction accuracy of 99.61%. Accordingly, the proposed tour planning design effectively predicts unexpected obstacles in the environment and thereby increases the overall efficiency of tour navigation.