Enveloping sophisticated tools into process-centered environments

We present a tool integration strategy based on enveloping pre-existing tools without source code modifications or recompilation, and without assuming an extension language, application programming interface, or any other special capabilities on the part of the tool. This Black Box enveloping (or wrapping) idea has existed for a long time, but was previously restricted to relatively simple tools. We describe the design and implementation of, and experimentation with, a new Black Box enveloping facility intended for sophisticated tools—with particular concern for the emerging class of groupware applications.This work was conducted while Mr. Valetto was a graduate student at Columbia University. Prof. Kaiser was supported in part by Advanced Research Project Agency Order B128 monitored by Air Force Rome Lab F30602-94-C-0197, in part by National Science Foundation CCR-9301092, in part by the New York State Science and Technology Foundation Center for Advanced Technology in High Performance Computing and Communications in Healthcare 94013, and in part by grants from AT&T Foundation, Bull HN Information Systems and IBM Canada Ltd. The views and conclusions contained in this document are those of the authors and should not be interpreted as representing the official policies, either expressed or implied, of the US or NYS governments, ARPA, Air Force, NSF, NYSSTF, AT&T, Bull, IBM or Xerox.     

Software development tools for microcontrollers

Two software tools are described that are designed to facilitate software development for microcontrollers. One is a mid-level programming language called Pascal/48 and the other is a circuit simulation system. Pascal/48 is designed to give the programmer many of the advantages of a high-level language, but also provide access to all of the hardware of the Intel MCS-48 series of microcontrollers. The circuit simulation system combines many of the advantages of simulation and emulation. It provides a software testing environment in which many more software functions can be tested than with conventional simulators. The system integrates an instruction-set simulator with simulators for other devices. They operate in parallel and are synchronized by a clock that records simulated time. I/O lines of the microcontroller can be linked to other components so that complete circuits can be simulated. Displays are provided of the internal and external state of the simulated circuit, and of the Pascal/48 program being executed. They are updated as simulated execution proceeds using the screen updating facilities of ASCII terminals. Simulation can be continuous, single step, or execution can be reversed (i.e. instructions are ‘unexecuted’).     

Software tools for safety-critical software development

We briefly present a software methodology for safety-critical software, developed over many years to cope with industrial safety-critical applications in the Canadian nuclear industry. Following this we present discussion on software tools that have been used to support this methodology, and software tools that could be used, but have not been used for a variety of reasons. Based on our experience, we also present and motivate a list of high-level requirements for tools that would facilitate the development of safety-critical software using the presented methods, together with a small number of tools that we believe are worth developing in the future.     

Hacking Techniques: The tools that hackers use,and how they are evolving to become more sophisticated.

With tales of hacked networks and websites being reported by the media daily, people assume that hacking must be easy. But, in truth, the tools and techniques employed by hackers are extremely complex, utilizing a broad range of technologies. The number of mechanisms for breaking into systems, whatever the objective, is on the increase with new tools emerging continuously. This article will aim to highlight and demystify the key techniques and tools currently being employed in the hacker’s world, and look at how these tools and methodologies are changing. It will also touch on what we may see in the future.     

An evaluation of expert system development tools

Abstract: There is a significant amount of interest in expert systems and the software tools that are available for developing these systems. Most tools that are developed at university research labs are described in some detail in books, articles, or technical reports. However, there is a need for objective information on commercial software tools for building expert systems. These tools can be used for research, prototyping and developing end-user applications. Necessarily we must establish a set of criteria which can be used to evaluate these tools. These criteria include an evaluation of the basic features, the development environment, what a tool can be used for, how easy it is to learn and use, how much it costs, and how it is supported. In the first part of this paper, a set of criteria is described for evaluating expert system software tools. In the second part, these criteria are used to evaluate several currently available commercial tools.     

Lessons learned from building model-driven development tools

Tools to support modelling in system and software engineering are widespread, and have reached a degree of maturity where their use and availability are accepted. Tools to support model-driven development (MDD)—where models are manipulated and managed throughout the system/software engineering lifecycle—have, over the last 10?years, seen much research and development attention. Over the last 10?years, we have had significant experience in the design, development and deployment of MDD tools in practical settings. In this paper, we distill some of the important lessons we have learned in developing and deploying two MDD tools: Epsilon and VIATRA. In doing so, we aim to identify some of the key principles of developing successful MDD tools, as well as some hints of the pitfalls and risks.     

Knowledge-based tools for development of engineering theories

An approach to solving of the knowledge integration problem on the basis of engineering theories had been considered by Vittikh (Artif. Intell. Engng, 1997, 11). Current paper describes constraint-oriented tools for generation of engineering models which are organized around a constraint-oriented knowledge base. It also allows use of them for maintaining this approach. Many efforts in the field of artificial intelligence are concentrated on solving geometric constraint satisfaction problems in a specific domain. This paper describes the solving of a geometric constraint system called ANMEC that has been created with the use of these tools. The way the system is applied to tasks of mechanism's analysis and synthesis is considered.     

The development tendencies of web analytics tools

The capabilities of website counters and methods of analyzing the tendencies of the development of various web-analytics tools are studied using Google Trends; promising approaches to more detailed research of the trends in the area of web analytics, a multi-aspect study of data from counters, services, and log analyzers aimed at optimization and promotion of websites of various organizations are presented. An overview is given for the sources of a comparative analysis of web-analytics tools, ratings, and data from the Ruward:Track laboratory on the number of added counters on the Russian Internet.     

A model-driven development method for collaborative modeling tools

Collaborative modeling tools are useful for many tasks within design or learning processes. However, they are difficult to build and are usually domain-specific. In response to this situation, we propose a model-driven method for the development of domain-independent collaborative modeling tools. This method consists of a methodological framework, a conceptual framework and a technological framework. The methodological framework defines the phases to be carried out when applying the method, whilst the conceptual framework is made up of the meta-models used in the method and the transformation processes established between them. Finally, the technological framework consists of the integration of some plug-ins from the Eclipse Modeling Project with some add-ons which provide collaborative functionality. Some case studies that exemplify this development method for specific domains are explained in detail, together with comparisons with similar approaches. Thus, an initial evaluation of this approach is provided and some advantages over those other approaches are identified. A further evaluation process in the form of an empirical study of use has also been carried out. Hence, the method proves to be useful for any user who does not have advanced knowledge of groupware programming and who needs to use a collaborative modeling tool in his/her work. Moreover, each framework implies a contribution that can be used in different contexts.     

基于界面设计模式的界面开发工具综述*

良设计的界面可为用户提供方便易用的服务,增强应用在市场上的竞争力。使用可复用的界面设计模式,旨在提高设计的可用性和效率。界面开发的复杂性需要有工具支持。针对现有基于模式的界面开发工具,本文根据它们对不同开发阶段的支持进行分类,然后对各类工具进行探讨,从形式、功能、可用性等特征展开分析和比较,最后,本文讨论了目前工具存在的不足及未来的研究方向。     

成熟型企业家的投资策略与可转债的代理问题

本文假设企业家是时间偏好不一致的且属于成熟型,可转债持有者是时间偏好一致的,企业家通过发行股权和可转债来筹集投资成本.本文考虑了企业实物投资问题,利用实物期权、随机最优控制方法以及博弈理论,解析地得到了时间偏好不一致企业家的企业股权价值、债券价值和期权价值.分析了时间偏好不一致对企业家投资决策、破产决策,可转债持有者的转换决策以及企业家与债券人代理成本的影响.结果表明:与时间偏好一致情况相比较,时间偏好不一致导致企业家延迟投资,降低了期权价值;同时,企业家会选择较高的破产水平,可转债持有者会选择较低的转换水平.本文也发现时间偏好不一致企业家投资决策的自利行为可以缓解Myers(1977)的债务积压问题和Jensen和Meckling(1976)的资产替代问题.尤其是,时间偏好不一致可以消除企业家和可转债持有者之间的代理成本.     

Design and development paradigm for industrial formal verificationCAD tools

CAD tool designers have given priority to providing features that will let circuit and logic designers use this custom-memory formal verification and analysis tool without a steep learning curve. This article discusses a few fundamental design decisions behind the successful deployment of a second-generation formal custom-memory equivalence-checking tool, Versys2, in the PowerPC design flows. The Versys2 symbolic simulator was developed at Motorola for verifying equivalence between register-transfer-level (RTL) designs and custom transistor circuit schematics