采用阴影投射法实现的光学并行模糊逻辑

本文提出了一种新的空间编码方法并利用阴影投射系统实现了光学并行模糊逻辑门。本系统可全光学并行实现模糊逻辑中的七种基本逻辑运算,并给出了实验结果。     

基于光学数字计算空间振幅编码图形法的光学并行阵列逻辑

本文给出了执行光学并行阵列逻辑的一种新的空间振幅编码图形法的原理和特性。为了设计高速并行复合运算,本文还给出了系统的算法,并澄清了AND和OR阵列门的物理意义。也给出了在8f相干光学处理系统中执行的16种复合逻辑运算的结果。     

A four-variable programmable universal logic module using digital summation threshold logic gates

Combining the concepts of programmable logic arrays (PLAs) and conventional universal logic modules (ULMs) a new type of programmable ULM for four variables has been proposed. The realization is based on the digital summation threshold logic (DSTL) gates, a cellular array for realizing threshold logic functions.     

All-optical tree-based greedy router using optical logic gates and optical flip-flops

Due to ever-increasing throughput demands, the lookup in conventional IP routers based on longest prefix matching is becoming a bottleneck. Additionally, the scalability of current routing protocols is limited by the size of the routing tables. Geometric greedy routing is an alternative to IP routing which replaces longest prefix matching with a simple calculation employing only local information for packet forwarding. For the first time, in this paper we propose a novel and truly all-optical geometric greedy router based on optical logic gates and optical flip-flops. The circuit of the router is constructed through the interconnection of SOAs and directional couplers. The successful functionality of the proposed router is verified through simulation. The circuit enables high data rate throughput.     

Optical digital cross-connect system using photonic switch matricesand optical amplifiers

This paper presents, for potential application to network failure restoration, an optical digital cross-connect system (DCS) which uses both a photonic switching network and an electric DCS. It is shown that a system constructed of LiNbO₃ 8×8 switch matrices and semiconductor traveling-wave optical amplifiers (TWA's) could be applied to metropolitan area networks. An experimental optical DCS system has been designed and fabricated which incorporates both LiNbO₃ switch matrices and TWA's, and with it, line-failure restoration, a fundamental operation of optical DCS, has been successfully demonstrated     

Reconfigurable optical interconnections for parallel computing

We describe our research on optically interconnected optoelectronic parallel computing systems. Our architecture is based on a multilayer pipeline of two-dimensional optoelectronic device arrays in which each pixel is composed of an optical input channel, a general-purpose programmable processor, local memory, and a surface-emitting laser diode as an optical output channel. Free-space optics provides parallel, global communication between layers in the pipeline via optical paths that are dynamically reconfigurable. Design and initial realization of a system are described     

FinFET CMOS logic gates with non-volatile states for reconfigurable computing systems

A series FinFET based non-volatile logic gates with multiple logic functions defined by embedded non-volatile states are proposed for the first time and demonstrated in advanced CMOS technology platform. The device channels in the proposed CMOS logic gate is controlled by a metal floating gate coupled by slot contacts uniquely available in the FinFET process employed in this study. The new logic gate with non-volatile states only enable reconfiguration ability in a Boolean computing unit at a gate level aimed for adaptive and specialized systems in the AI era. Furthermore, the extended applications in tunable ring oscillators for multi-functional IOT modules are successfully demonstrated in this study.     

Optical interconnections for parallel and distributed computing

This paper reports the application of optical interconnections to a parallel an distributed computing system in the form of a calibration-free 64-Gbps/board parallel optical interconnection sub-system mounted directly on the four-CPU processor board of a newly developed parallel-processing machine, “RWC-1”. The sub-system is composed of eight parallel optical module/single-chip link large-scale integrated circuit pairs. The subsystem successfully transmitted parallel data for a variety of link lengths (between 1 m and 1 km), and with deskewing and synchronizing functions, phase-matching calibration for link lengths is automatic. Further, a method is described for the simplified merging of optical interconnections into electronic systems     

A cellular computing architecture for parallel memristive stateful logic

We present a cellular memristive stateful logic computing architecture and demonstrate its operation with computational examples such as vectorized XOR, circular shift, and content-addressable memory. The considered architecture can perform parallel elementary memristor programming and stateful logic operations, namely implication and converse nonimplication. The topology of the crossbar structure used for computing can be dynamically reconfigured, enabling combinations of local and global operations with varying granularity. In the CMOS cells used for controlling the memristors, we apply a new type of capacitive keeper circuit, which allows for energy efficient implementation of logic operations. The correct operation of this architecture is verified by detailed HSPICE simulations for a structure containing eight memristive crossbars. This work presents a hardware platform which enables future work on parallel stateful computing.     

Subnanosecond-transient detector using emitter-coupled logic gates

It is shown that tunnel-diode circuits can be made directly compatible with emitter-coupled logic gates. This enables the design of subnanosecond threshold switching circuits with standard logic-gate output levels to be simply achieved. The switching speed of the tunnel diode under these circuit conditions can be calculated, and suitable graphs are given.     

利用单个液晶光阀实现的光学逻辑门

本文利用一个液晶光阀，实现了十六种二输入光学二进制阵列逻辑运算和两种行逻辑（行或和行或非）操作。     

An optical multi-mesh hypercube: a scalable optical interconnectionnetwork for massively parallel computing

A new interconnection network for massively parallel computing is introduced. This network is called an optical multi-mesh hypercube (OMMH) network. The OMMH integrates positive features of both hypercube (small diameter, high connectivity, symmetry, simple control and routing, fault tolerance, etc.) and mesh (constant node degree and scalability) topologies and at the same time circumvents their limitations (e.g., the lack of scalability of hypercubes, and the large diameter of meshes). The OMMH can maintain a constant node degree regardless of the increase in the network size. In addition, the flexibility of the OMMH network makes it well suited for optical implementations. This paper presents the OMMH topology, analyzes its architectural properties and potentials for massively parallel computing, and compares it to the hypercube. Moreover, it also presents a three-dimensional optical design methodology based on free-space optics. The proposed optical implementation has totally space-invariant connection patterns at every node, which enables the OMMH to be highly amenable to optical implementation using simple and efficient large space-bandwidth product space-invariant optical elements     

Designing novel reversible BCD adder and parallel adder/subtraction using new reversible logic gates

Reversible logic has received much attention in recent years when calculation with minimum energy consumption is considered. Especially, interest is sparked in reversible logic by its applications in some technologies, such as quantum computing, low-power CMOS design, optical information processing and nanotechnology. This article proposes two new reversible logic gates, ZRQ and NC. The first gate ZRQ not only implements all Boolean functions but also can be used to design optimised adder/subtraction architectures. One of the prominent functionalities of the proposed ZRQ gate is that it can work by itself as a reversible full adder/subtraction unit. The second gate NC can complete overflow detection logic of Binary Coded Decimal (BCD) adder. This article proposes two approaches to design novel reversible BCD adder using new reversible gates. A comparative result which is presented shows that the proposed designs are more optimised in terms of number of gates, garbage outputs, quantum costs and unit delays than the existing designs.     

Differential switching operation of vertical cavity laser with depleted optical thyristor for optical logic gates

Optical logic gates with AND, OR, and INVERT functionality are demonstrated by the monolithic integration of a vertical cavity laser with depleted optical thyristor. All kinds of logic functions (AND, OR, NAND, NOR, and INVERT) are experimentally demonstrated using a differential switching operation scheme by simply controlling an intensity of a reference input light     

All optical XOR logic gates: technologies and experiment demonstrations

This article reviews the current status and technologies of all-optical XOR gates. Various schemes with semiconductor optical amplifiers, particularly those associated with interferometric structures, are discussed and compared. Finally, the applications of all-optical XOR gates to emerging networks are explored, and the future direction is outlined.     

IST-LASAGNE: towards all-optical label swapping employing optical logic gates and optical flip-flops

The Information Society Technologies-all-optical LAbel SwApping employing optical logic Gates in NEtwork nodes (IST-LASAGNE) project aims at designing and implementing the first, modular, scalable, and truly all-optical photonic router capable of operating at 40 Gb/s. The results of the first project year are presented in this paper, with emphasis on the implementation of network node functionalities employing optical logic gates and optical flip-flops, as well as the definition of the network architecture and migration scenarios.     

Ultrahigh-speed reconfigurable logic gates based on four-wave mixing in a semiconductor optical amplifier

We have demonstrated simple reconfigurable all-optical logic operations based on four-wave mixing in semiconductor optical amplifier and encoding information in the polarization of the input signals. Experimental implementation of six logic functions (including XOR, XNOR, AND, NOR, etc.) operating at 10 Gb/s were realized by simply adjusting two polarization controllers in the setup.     

Three-dimensional beam propagation analysis of nonlinear opticalfibers and optical logic gates

A three-dimensional (3-D) beam propagation method is described for the analysis of nonlinear optical fibers, where the finite element and finite difference methods are, respectively, utilized for discretizing the fiber cross section and the propagation direction. For efficient evaluation of wide-angle beam propagation Pade approximation is applied to the differential operator along the propagation direction. In order to improve the efficiency and accuracy of solutions, isoparametric elements and numerical integration formulae derived by Hammer et al. are introduced. The propagation characteristics of nonlinear optical fibers with linear core and nonlinear cladding are analyzed, and unique features of nonlinear guided-wave propagation are investigated. Furthermore, all-optical logic gates with practical, 3-D geometry consisting of optical fibers and a nonlinear film are proposed, and their operations of Boolean arithmetic are demonstrated     

基于线性光放大器全光逻辑或非门的仿真研究

为了实现全光逻辑的仿真运算,基于Simulink模块可视化的特点,根据线性光放大器交叉增益调制原理的理论模型,采用模块搭建的方法,实现了全光逻辑"或非"的运算。结果表明,通过Simulink的模块搭建,使其更好地仿真出逻辑"或非"输出结果;适当地选择注入电流组合,逻辑或非的运算效果越佳;由于模块化的结构容易进行修改和扩充,通过模块搭建用于更多的逻辑运算也是可行的。     

Efficient reversible NOR gates and their mapping in optical computing domain

Reversible logic is a computing paradigm in which there is a one to one mapping between the input and the output vectors. Reversible logic gates are implemented in an optical domain as it provides high speed and low energy computations. In the existing literature there are two types of optical mapping of reversible logic gates: (i) based on a semiconductor optical amplifier (SOA) using a Mach–Zehnder interferometer (MZI) switch; (ii) based on linear optical quantum computation (LOQC) using linear optical quantum logic gates. In reversible computing, the NAND logic based reversible gates and design methodologies based on them are widely popular. The NOR logic based reversible gates and design methodologies based on them are still unexplored. In this work, we propose two NOR logic based n-input and n-output reversible gates one of which can be efficiently mapped in optical computing using the Mach–Zehnder interferometer (MZI) while the other one can be mapped efficiently in optical computing using the linear optical quantum gates. The proposed reversible NOR gates work as a corresponding NOR counterpart of NAND logic based Toffoli gates. The proposed optical reversible NOR logic gates can implement the reversible boolean logic functions with a reduced number of linear optical quantum logic gates or reduced optical cost and propagation delay compared to their implementation using existing optical reversible NAND gates. It is illustrated that an optical reversible gate library having both optical Toffoli gate and the proposed optical reversible NOR gate is superior compared to the library containing only the optical Toffoli gate: (i) in terms of number of linear optical quantum gates when implemented using linear optical quantum computing (LOQC), (ii) in terms of optical cost and delay when implemented using the Mach–Zehnder interferometer.