Design and performance evaluation of low-voltage/high-current DC/DCon-board modules

The topology selection, design, and performance evaluation of an on-board DC/DC converter, which delivers power from a 48 V input to a 1.2-1.65 V/70 A microprocessor load, are presented. It was shown that the symmetrical half-bridge topology with the current doubler and synchronous rectifiers is a suitable approach for this application. The measured full-load efficiency of a 200 kHz experimental half-bridge converter was higher than 82% in the entire output and input voltage range     

A low-voltage low-power instrumentation amplifier based on supply current sensing technique

In this paper a new low-voltage low-power instrumentation amplifier (IA) is presented. The proposed IA is based on supply current sensing technique where Op-Amps in traditional IA based on this technique are replaced with voltage buffers (VBs). This modification results in a very simplified circuit, robust performance against mismatches and high frequency performance. To reduce the required supply voltage, a low-voltage resistor-based current mirror is used to transfer the input current to the load. The input and output signals are of voltage kind and the proposed IA shows ideal infinite input impedance and a very low output one. PSPICE simulation results, using 0.18 μm TSMC CMOS technology and supply voltage of ±0.9 V, show a 71 dB CMRR and a 85 MHz constant −3 dB bandwidth for differential-mode gain (ranging from 0 dB to 18 dB). The output impedance of the proposed circuit is 1.7 Ω and its power consumption is 770 µW. The method introduced in this paper can also be applied to traditional circuits based on Op-Amp supply current sensing technique.     

卫星电源DC／DC模块输入滤波器的设计

作为卫星的“心脏”,电源的可靠性要求很高。卫星电源系统中的DC／DC模块主要负责将输出的42V直流电压转换成其他等级的直流电压,以满足不同设备的用电需求。DC／DC模块输入滤波器有两个主要功能：一是阻止DC／DC模块产生的电磁干扰沿电力线传导以影响其他设备;     

Design considerations for low-voltage on-board DC/DC modules fornext generations of data processing circuits

By reducing the power supply voltage, a higher speed, lower power consumption, and higher integration density of data processing ICs can be achieved. Presently, a variety of ICs operating from 3.3 V are available. Next generations of ICs are expected to work even with lower voltages, i.e., in the 1-3 V range, to further enhance their speed-power performance. At the same time, during transients, these new generations of data ICs will present very dynamic loads with high current slew rates. As a result, they will require point-of-load power supplies in order to minimize the effects of the interconnection parasitics. These onboard power supplies will be derived from the existing voltages available in the system (usually 5 or 12 V), and will be required to have high power densities, high efficiencies, and good transient performance. This paper presents design considerations for these on-board power supplies and discusses their performance limits imposed by various circuit and system parasitics     

Current regulators for I/SUP 2/L circuits to be operated from low-voltage power supplies

A new bandgap current reference is described which can be used to control the injector current of I/SUP 2/L circuits for supply voltages down to about 1 V. For small currents the total injector current is obtained as a mirror of the reference current. For large injector currents the current control is performed by a series regulator which compares the injector current of one I/SUP 2/L gate to the reference current. The described reference current can be adjusted to give a variation with temperature of about 60 ppm//spl deg/C over the temperature range -10 to +70/spl deg/C. However, in some applications a nonzero, but well controlled temperature coefficient is desired. It is shown how a temperature stable ring oscillator with I/SUP 2/L gates can be constructed by tailoring the temperature dependence of the supply current appropriately.     

TBD prediction from low-voltage near-interfacetrap-assisted tunneling current measurements

In this paper, we present a new method to predict oxide breakdown directly from measurements at low voltage and room temperature, therefore without the need for any voltage/field extrapolation. Previously, it has been shown that in ultrathin oxide (t_ox<2 nm) MOS devices with high substrate doping (N_A >10¹⁸ cm^-13) a current component of cathode electrons tunneling into anode near-interface traps (TNIT) is present when the applied voltage is between zero and the flat-band voltage. Here, we show that there is a correlation between this TNIT component and oxide breakdown. Then, we introduce a new method exploiting this correlation to predict oxide lifetime from stress measurements at the real operation conditions without any questionable voltage/field extrapolation. The results are consistent with other extrapolation techniques. However, the present methodology is particularly suitable for T_BD characterization of future technologies since, as the scaling process continues, TNIT will be more and more important and visible, while the traditional techniques to assess oxide defects (like capacitance-voltage (C-V) or stress-induced leakage current (SILC) measurements) or to directly detect breakdown will become less feasible     

Lateral SCR devices with low-voltage high-current triggeringcharacteristics for output ESD protection in submicron CMOS technology

A high-current PMOS-trigger lateral SCR (HIPTSCR) device and a high-current NMOS-trigger lateral SCR (HINTSCR) device with a lower trigger voltage but a higher trigger current are proposed to improve ESD robustness of CMOS output buffer in submicron CMOS technology. The lower trigger voltage is achieved by inserting short-channel thin-oxide PMOS or NMOS devices into the lateral SCR structures. The higher trigger current is achieved by inserting the bypass diodes into the structures of the HIPTSCR and HINTSCR devices. These HIPTSCR and HINTSCR devices have a lower trigger voltage to effectively protect the output transistors in the ESD-stress conditions, but they also have a higher trigger current to avoid the unexpected triggering due to the electrical noise on the output pad when the CMOS ICs are in the normal operating conditions. Experimental results have verified that the trigger current of the proposed HIPTSCR (HINTSCR) is increased up to 225.5 mA (218.5 mA). But, the trigger voltage of the HIPTSCR (HINTSCR) remains at a lower value of 13.4 V (11.6 V). The noise margin against the overshooting (undershooting) voltage pulse on the output pad, without accidentally triggering on the HINTSCR (HIPTSCR), can be greater than VDD+12 V (VSS -12 V). These HIPTSCR and HINTSCR devices have been practically used to protect CMOS output buffers with a 4000-V (700-V) HEM (MM) ESD robustness but only within a small layout area of 37.6×60 μm² in a standard 0.6-μm CMOS technology without extra process modification     

A high slew-rate unity-gain low-voltage buffer with largeactive/quiescent current ratio

A buffer that can source or sink up to 10 mA with a slew rate of 130 V/μs in a series RC load of 500 Ω and 12 nF is introduced. The buffer has a standby current of 400 μA which is reduced to 50 nA in less than 100 ns in power-down mode. It operates with a 2.7-V supply and is designed for personal communications applications such as Digital Enhanced Cordless Telecommunications (DECT). The adaptive biasing technique employed in this design makes it suitable for other applications like high-speed sample-and-hold or transconductance stages     

Third-harmonic supply current minimization in single-phase AC/DC converters

One effect of the second-harmonic in the load-side current ripple of a single-phase AC/DC converter is to introduce an unwanted third-harmonic into the supply-side current. Although this can be neither eliminated nor reduced by either conventional selective harmonic or natural sinusoidal PWM strategies, it is shown that the use of a modified switching function in the selective strategy enables a considerable reduction to be achieved. Possible applications for the new strategy include single-phase AC/DC converter-fed DC drives and converters providing a DClink for inverter-fed DC drives.     

隔离型DC/DC在高压电压电流源设计中的应用

由于隔离型DC/DC的安全性、隔离性等特征,该类器件广泛应用于多个电子、工业领域,本文主要介绍了隔离型DC/DC在高压电压电流源中的应用。本文将隔离型双输出DC/DC引入设计,利用DC/DC的隔离特性,将电压电流源的次级输出作为DC/DC器件参考地,将DC/DC器件的两路输出电压作为相关运算放大器的电源电压。常规高压电压电流源设计中需要大量采用高压运算放大器,采用此方案可使用较少的高压运算放大器及更低的成本实现相同功能,同时降低高压电源对PCB电路板上信号的影响。通过实际测量,文中方案输出稳定、精度高,满足设计与使用要求。文中用功能图纸对此类应用进行了详细说明。     

Quasi current resonant DC link AC/AC converter

A new quasi current resonant DC link (QCRDCL) topology has been developed in this paper. Although prototype current resonant DC link topologies for AC/AC power conversion have had such problems as irregular high current peaks, uncontrollable pulse width, etc., this new topology enables the AC/AC conversion system to have the properties wherein the current peak is limited and the pulse width is adjustable. The system begins to assume an adjustable-width flat-topped current shape, whereby the system becomes particularly suitable for high power application. With control of the pulse width a very fine load current regulation can be obtained. In this system, an open loop PWM control has been adopted and almost the same quality of output waveforms as the conventional current source inverter has been achieved     

DC and microwave performance of high-current AlGaN/GaNheterostructure field effect transistors grown on p-type SiC substrates

The fabrication and characterization of high performance AlGaN/GaN heterostructure field effect transistors (HFETs) grown on p-type SiC substrates are reported for the first time. The HFETs were fabricated with gate lengths of 0.25, 0.5, and 1 μm. These devices exhibited simultaneously high drain currents, high extrinsic transconductances, and excellent frequency response. The 0.25-μm gate-length devices produced a peak drain current of 1.43 A/mm, a transconductance of 229 mS/mm, a unity current-gain cutoff frequency of 53 GHz, and a maximum frequency of oscillation of 58 GHz. The unity current-gain cutoff frequency also exhibited little degradation as the drain-source bias was swept up to 20 V. These results represent a significant improvement over similar HFETs grown on sapphire substrates and are attributed to the higher thermal conductivity and reduced lattice mismatch associated with SiC substrates     

熊猫型保偏光纤模间干涉的传感特性研究

分析了熊猫型保偏光纤模间干涉输出光强分布同模间干涉相位差之间的关系,并给出了其分布图;采用有限元法对熊猫型保偏光纤的模传输特性进行了计算,得到了几个低阶模式的传输特性曲线;理论计算了LP01模和LP11模间的干涉拍长。通过实验,验证了熊猫光纤模间干涉输出两个干涉边瓣光强随光纤应力变化呈交替分布的特点以及模间干涉拍长的计算结果。本文的研究为将熊猫型保偏光纤应用到光纤传感器的设计中提供了理论和实验参考。     

A practical current sensing technique for IDDQ testing

In this paper, a practical design for built-in current sensors (BICS's) is proposed. This scheme can execute current testing during the normal circuit operation with very small impact on the performance of the circuit under test (CUT). In addition, scalable resolutions and no external voltage/current reference make this design more effective and efficient than previous designs. Moreover this scheme can be used to monitor the current-related faults of both CMOS and non-CMOS circuits. Thus it is highly suitable for design for testability (DFT) on a multiple-chip module (MCM) or to be the current monitor on the test fixture under the quality test action group (QTAG) standard     

A current limiter for DC/DC regulators with compensation against process and temperature variations

A low-voltage current limiter suitable for both linear and switching regulators is presented. Although the approach relies on absolute values of sense resistance and MOSFET threshold voltage on subsequent I/V and V/I conversions of the sensed current, a reference current in the process and temperature (PT) compensator is derived in such a manner that the dependence of clamping threshold I _TH on PT-spread is first-order canceled out. Furthermore, the current sensor embodies a transconductor build up with either p-MOSFET depletion-mode device or a level-shifter with enhancement-mode transistors, meeting low-dropout requirements. For nominal value of 750 mA, Monte Carlo data express boundaries for I _TH of 523 and 1,075 mA, accounting for broad PT-variation, as well as operating voltages and mismatching. A linear regulator with 400 mA-current rate and 250 mV-dropout incorporating the limiter on its depletion p-MOSFET version was integrated on a smart-power process. The limiter occupies an area of 0.052 mm² and consumes only 65 μA. Experimental data attest the clamper functionality and accuracy against PT-variations. From samples of distinct lots, I _TH spans from 615 to 996 mA. Owing to its simplicity and open-loop operation in case of switchers, the limiter reacts upon overcurrent in only 20 ns, making it compatible with converters functioning in MHz range and under low duty-cycles. Moreover, the limiter suits supply voltages as low as 1 V.     

零电流开关大功率DC/DC双全桥变换器设计

提出了一种基于双全桥结构的单向零电流开关大功率（兆瓦级）DC/DC变换器,该变换器通过采用两个全桥变换器来实现零电流开关,实现了较低的功率损耗和输出滤波电感。为了验证提出的变换器在大功率应用中的有效性,构建了小型样机并在大功率直流电网进行了实际测试。实验证明,相比传统的两种单向大功率全桥变换器,提出变换器所需的滤波电感和半导体器件的功率损耗均较少,分别仅为1.72mH和924.5kW。     

Fast current controller in three-phase AC/DC boost converter usingd-q axis crosscoupling

In this paper, a new simple current controller with both satisfactory steady-state characteristics and fast transient response is proposed. In this scheme, a reference modification part is incorporated with the generally used synchronous-frame proportional-integral (PI) controller for the fast transient response. Simulation and experimental results are presented and show the effectiveness of the proposed current controller. In the simulation and experimental results, both the current controller and DC-link regulator show conspicuous performance improvement. It is also observed in the simulation and experiment that the proposed current controller has a similar characteristic as the synchronous-frame PI controller in the steady state and as the minimum-time current controller in the transient state     

推行国际标准,促进程控电源性能的提高

直到９０年代初，许多程控电源的国际生产商仍然将他们的设计局限于国内市场的需求，而忽略了许多世界范围适用的国外规范。特别是欧洲形形色色关于安全性和电磁兼容的规范对欧洲之外的生产商来说，是一种障碍，因为他们的产品只符合一个国家的标准，例如持有北美地区的ＵＬ或ＣＡＳ认证。但是，随着电于市场的全球化和扩大化；现在电源升级到国际标准可以带来巨大的收益。开关电源是促进规范的催化剂随着８０年代高频开关电源的出现，一些新效应开始引起世界性管理机构的一注意。特别是，由这种电源传导和辐射引起的电磁干扰对无线电通信导…     

On the use of current control scheme for switched-capacitor DC/DCconverters

This paper presents an investigation into the use of a current control scheme (CCS) and a comparison with a classical switching scheme for switched-capacitor (SC) step-down DC/DC converters. With the CCS, capacitors are charged with near-constant current, controlled by the gate-source voltage of MOSFETs. By paralleling two SC cells, the converter input current becomes continuous, resulting in much reduced conducted electromagnetic interference with other circuits fed by the same power supply. All MOSFETs are operated for half of the switching period, in order to improve the regulation capability. Static and dynamic behaviors of the converter with the CCS are predicted and confirmed in an experimental 36 W 12 V/9 V prototype