Integrated fabrication of polysilicon mechanisms

The integrated fabrication of planar polysilicon mechanisms incorporating lower and higher kinematic pairs (or joints) is described. The two lower kinematic pairs (revolute and prismatic) commonly used in macrorobotic systems are compatible with silicon microfabrication technology. The mechanisms are fabricated by surface micromachining techniques using polysilicon as the structural material and oxide as the sacrificial material. Turbines with gear and blade rotors as small as 125 μm in diameter and 4.5 μm in thickness were fabricated on 20-μm-diameter shafts. A clearance as tight as 1.2 μm was achieved between the gear and the shaft. Gear trains with two or three sequentially-aligned gears were successfully meshed. A submillimeter pair of tongs with 400-μm range-of-motion at the jaws was fabricated. This structure incorporates a single prismatic joint and two revolute joints, demonstrating linear-to-rotary motion conversion     

A light-transmitting two-dimensional photodetector array using a-Sipin photodiodes and poly-Si TFT's integrated on a transparent substrate

A light-transmitting two-dimensional photodetector array (32×32 cells) using amorphous silicon (a-Si) pin photodiodes and polysilicon (poly-Si) thin film transistors (TFT's) integrated on a transparent substrate has been developed for use in a free-space optical switching network. The fabrication and the characteristics of the photodetector array are discussed. With driving circuits and sensing amplifiers, this photodetector array shows a minimum detectable power of -25 dBm and an insertion loss of 0.4 dB for an incident optical beam with a diameter of 550 μm. By monitoring the positions and the states of input optical beams, this photodetector array can be used to control the optical paths in photonic switching systems, such as a 1024-input-port optical concentrator     

A high-speed bipolar technology featuring self-aligned single-polybase and submicrometer emitter contacts

An experimental bipolar transistor structure with self-aligned base-emitter contacts formed using one polysilicon layer is presented with geometries and frequency performance comparable to those of double-polysilicon structures. This structure, called STRIPE (self-aligned trench-isolated polysilicon electrodes), provides a 0.2-μm emitter-base polysilicon contact separation. A 0.4-μm emitter width is achieved with conventional 0.8-μm optical lithography. Scaling of the emitter width of 0.3 μm has been performed with minimal degradation of device performance, and scaling of the emitter width pattern to 0.2 μm has been demonstrated. These dimensions are the smallest achieved in single-polysilicon structures with polysilicon base contacts and are comparable to those achieved in double-polysilicon structures. The STRIPE structure has been used to fabricate transistors with f_t as high as 33.8 GHz     

Characterization of polysilicon resistors in sub-0.25 μm CMOSULSI applications

The characteristics of polysilicon resistors in sub-0.25 μm CMOS ULSI applications have been studied. Based on the presented sub-0.25 μm CMOS borderless contact, both n⁺ and p⁺ polysilicon resistors with Ti- and Co-salicide self-aligned process are used at the ends of each resistor. A simple and useful model is proposed to analyze and calculate the essential parameters of polysilicon resistors including electrical delta W(ΔW), interface resistance R_interface, and pure sheet resistance R_pure . This approach can substantially help engineers in designing and fabricating the precise polysilicon resistors in sub-0.25 μm CMOS technology     

A quadruple well, quadruple polysilicon BiCMOS process for fast 16Mb SRAM's

An advanced, high-performance, quadruple well, quadruple polysilicon BiCMOS technology has been developed for fast 16 Mb SRAM's. A split word-line bitcell architecture, using four levels of polysilicon and two self-aligned contacts, achieves a cell area of 8.61 μm² with conventional I-line lithography and 7.32 μm² with I-line plus phase-shift or with deep UV lithography. The process features PELOX isolation to provide a 1.0 μm active pitch, MOSFET transistors designed for a 0.80 μm gate poly pitch, a double polysilicon bipolar transistor with aggressively scaled parasitics, and a thin-film polysilicon transistor to enhance bitcell stability. A quadruple-well structure improves soft error rate (SER) and allows simultaneous optimization of MOSFET and bipolar performance     

Surface-micromachined 2-D optical scanners with high-performancesingle-crystalline silicon micromirrors

We have developed a novel batch-fabrication single-crystalline silicon micromirror bonding process to fabricate optically flat micromirrors on polysilicon surface-micromachined two-dimensional (2-D) scanners. The electrostatically actuated 2-D scanner has a mirror area of 460 μm×460 μm and an optical scan angle of ±7.5°. Compared with micromirror made by standard polysilicon surface-micromachining process, the radius of curvature of the micromirror has been improved by 150 times from 1.8 to 265 cm, with surface roughness <10 nm     

A compact rail-to-rail output stage for CMOS operational amplifiers

This paper presents a CMOS output stage devised for driving heavy resistive loads. An operational amplifier of this type has been fabricated in a 3 μm double-polysilicon CMOS technology. With a supply voltage of ∓5 V and load of 470 Ω, the amplifier has a ∓4.6-V output swing and features a 60 mA short-circuit output current. Although simple, the proposed configuration enables the output transistors to be driven efficiently     

A semi-static complementary gain cell technology for sub-1 V supplyDRAM's

A new semi-static complementary gain cell for future low power DRAM's has been proposed and experimentally demonstrated. This gain cell consists of a write-transistor and its opposite conduction type read-transistor with a heating gate as a storage node which causes a shift in the threshold voltage. This gain cell provides a two orders of magnitude larger cell signal output and higher immunity to noise on the bitlines when compared with a conventional one-transistor DRAM cell without increasing the storage capacitance even at a supply voltage of 0.8 V. The 0.87 μm² cell size is achieved by using a 0.25 μm design rule with a polysilicon thin-film transistor built in the trench and phase shifted i-line lithography     

一种输入级模块复用的In-Zn-O薄膜晶体管行集成驱动电路

提出了一种新型的基于In-Zn-O薄膜晶体管(IZO TFT)的行集成驱动电路。该电路采用了输入级模块复用的驱动方法,即一级输入级驱动多级输出级,因此可以显著地减少输入级模块TFT的数量,缩减电路的面积,满足高分辨率显示屏设计,同时也可以迎合显示屏窄边框的审美需求。电路的输入级模块工作时间是输出级模块的n倍(n是一级输入级模块驱动输出级模块的级数),因此输入级尺寸可以做得更小。另外,该电路的驱动时钟频率是传统结构中一级输入级模块驱动一级输出级模块时钟频率的1/n,有效地降低了电路的动态耦合功耗。我们制作了20级的行集成驱动电路,一级输入级模块驱动两级输出级模块,该电路的尺寸为宽730μm,高为164μm,满足窄边框的要求。从实验测结果表明,该电路很好地满足300PPI的AMLCD或AMOLED显示屏的需求。     

A shallow buried-layer formation technique utilizing diffusion fromimplanted polysilicon layer

A shallow buried-layer (0.25~0.50 μm) formation technique utilizing diffusion from an arsenic-implanted polysilicon layer is discussed. The polysilicon layer is removed by converting it into an oxide layer and wet etching the oxide layer. Vertical n-p-n bipolar transistors are fabricated on epitaxial layers deposited on buried layers formed utilizing this technique. The transistor characteristics indicate that high-quality epitaxial layers can be grown on these buried layers. Using this technique, a buried layer with a sheet resistance of 28 Ω/□ and a junction depth of ~0.4 μm was obtained (prior to the epitaxial growth)     

Singlemode output power enhancement of InGaAs VCSELs by reducedspatial hole burning via surface etching

Completely singlemode MBE-grown selectively oxidised InGaAs-VCSELs with aperture diameters of up to 14 μm have been fabricated using a self-aligned shallow surface etch. By choosing the growth position accordingly, a continuous variation of the aperture diameter across the wafer is achieved to optimise the surface etch to aperture diameter ratio. A record singlemode output power of 5.7 mW (30 dB SMSR) is obtained for a 5.8 μm-aperture diameter, 2.8 μm etch spot diameter device     

High efficiency submilliamp vertical cavity lasers with intracavitycontacts

Contacts have been made to p- and n-type layers on opposite sides of the active region within the cavity of an InGaAs vertical cavity surface emitting laser. The two concentric ring contacts allow all electrical connections on and emission from the top surface of a semi-insulating GaAs substrate. The design includes a novel current leveling layer to minimize current crowding effects. A high external quantum efficiency of 46% has been measured with maximum output powers up to 6 mW for a 15 μm diameter device and threshold currents of 0.72 mA for a 7 μm diameter laser     

A high-speed low-voltage stress-induced micromachined 2×2optical switch

A low-voltage electrostatically actuated 2×2 fiber optic switch is achieved using a stress-induced curved polysilicon actuator. The curved polysilicon beam substantially lowers the electrostatic operating voltage of the switch. Large mirror displacement (300 μm) and low operating voltage (20 V) are obtained simultaneously. Sub-millisecond switching time (<600 μs), low optical insertion loss (0.7 dB), and small polarization-dependent loss (0.09 dB) have been achieved     

Silicon ribbon cables for chronically implantable microelectrodearrays

Describes the design, fabrication, and testing of miniature ultraflexible ribbon cables for use with micromachined silicon microprobes capable of chronic recording and/or stimulation in the central nervous system (CNS). These interconnects are of critical importance in reliably linking these microelectrodes to the external world through a percutaneous connector. The silicon cables allow the realization of multilead, multistrand shielded local interconnects that are extremely flexible and yet strong enough to withstand normal handling and surgical manipulation. Cables 5 μm thick, 1-5 cm long, and from 60 to 250 μm wide have been fabricated with up to eight leads. The series lead resistance is typically 4 kΩ/cm for polysilicon and 500 Ω/cm for tantalum with shunt capacitance values of 5-10 pF/cm and an interlead capacitance below 10 fF/cm. Soak tests in buffered saline performed under electrical and mechanical stress have been underway for over three years and show subpicoampere leakage levels. Silicon microprobes with built-in ribbon cables have remained functional for up to one gear in the guinea pig CNS, recording driven single-unit activity and maintaining impedance levels in the 1-7 M Ω range     

CMOS shallow-trench-isolation to 50-nm channel widths

The applicability of shallow-trench-isolation (STI) for CMOS to 50-nm channel widths has been explored. Transistors with channel width to 50 nm and trench width to 200 nm have been fabricated. A comparison of several oxide-filled and polysilicon field-plate-filled STI structures is presented including processing, device performance, and isolation leakage. It is shown that V_th roll off as a function of channel width can be made as small as 65 mV and 145 mV at 100 nm channel width for polysilicon and oxide filled STI, respectively. Off-state currents less than 5×10^-12 A/μm and subthreshold slope around 80 mV/dec have been reached. Isolation breakdown voltages are about 8 V. Poly-filled STI effectively reduces channel edge effects, and provides excellent off-state, on-state, and turn-on characteristics all the way to 50-nm channel widths     

Measurement and calibration of fiber coating geometry by grey-scaleanalysis

Measurement of the coating geometry of optical fibers is important in maintaining the optical and mechanical integrity of fibers and in the control of splice loss in multiple-fiber ribbons. A method of measuring coating geometry using a side-view system with a novel dark-field illumination technique is presented. A high contrast image is produced with this system from which the coating diameter noncircularity and concentricity error of a fiber can be determined. The measurement repeatabilities of coating diameter and concentricity error are typically 0.20 μm and 0.25 μm respectively. A means of calibrating the side-view system using a glass rod has been developed and comparison with an interferometric method has shown that a total uncertainty on outer coating diameter of 0.5 μm has been achieved     

Tunable extremely low threshold vertical-cavity laser diodes

Submilliampere-threshold wavelength-tunable three-terminal vertical-cavity laser diodes have been fabricated by proton implantation and wet chemical etching. Laser diodes of 8-μm active diameter exhibit record low threshold currents of 650 μA and emit upto 170-μW output power under CW conditions and 0.4 mW under pulsed excitation. Slightly larger devices of about 12-μm diameter emit up to 1.85 mW in a single mode under pulsed conditions. The emission wavelength is about 970 nm and matched to the spectral gain of the three active InGaAs quantum wells. Individual elements in a two-dimensional array can be continuously tuned over 2.2 nm by applying separate tuning currents of 70 μA to the corresponding top mesa electrodes. Tuning and laser currents are controlled independently     

A scaled 0.25-μm bipolar technology using full e-beamlithography

The full leverage offered by electron-beam lithography has been exploited in a scaled 0.25-μm double polysilicon bipolar technology. Devices and circuits were fabricated using e-beam lithography for all mask levels with level-to-level overlays tighter than 0.06 μm. Ion implantation was used to form a sub-100-nm intrinsic base profile, and a novel in-situ doped polysilicon emitter process was used to minimize narrow emitter effects. Transistors with 0.25-μm emitter width have current gains above 80 and cutoff frequencies as high as 40 GHz. A record ECL gate delay of 20.8 ps at 4.82 mW has been measured together with a minimum power-delay product of 47 fJ (42.1 ps at 1.12 mW). These results demonstrate the feasibility and resultant performance leverage of aggressive scaling of conventional bipolar technologies     

Long-pulse ultraviolet-laser sources based on tunable alexandritelasers

A long-pulse ultraviolet (UV) laser source has been demonstrated. It was obtained by the harmonic generator of a flashlamp-pumped alexandrite laser operating in the normal-pulse mode. We obtained tunable UV light in the wavelength region 365-390 nm. A 375-nm output generated 90 mJ. The pulsewidth was 240 μs. The UV-laser output was successfully transmitted through a 3-m-long step-index-type silica fiber with a core diameter of 600 μm     

Femtosecond soliton transmission characteristics in an ultralongerbium-doped fiber amplifier with different pumping configurations

The transmission characteristics of femtosecond optical solitons in an 18.2 km-long erbium-doped fiber amplifier (EDFA) have been investigated in detail by changing the pumping configuration. With backward pumping, a lossless transmission of 440 fs solitons at 1.55 μm has been realized with a pump power of 16 mW. The output pulsewidth is determined by the spectrum modified by the soliton self-frequency shift. In a bidirectional pumping configuration, 440-fs soliton pulses have been transmitted for a total pump power of 38 mW, where the output pulse width is determined by the original 1.55 μm spectrum. Although a femtosecond soliton is very weakly trapped in the EDFA-gain bandwidth of 1.55 μm and the soliton self-frequency shift inevitably occurs, the femtosecond pulse component still exists at 1.55 μm, and a pulse can be successfully transmitted with a gain of 11 dB and very little pulse broadening