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1.
This paper deals with a dynamic voltage restorer (DVR), or a voltage-sag compensator, which consists of a set of series and shunt converters connected back-to-back, three series transformers, and a dc capacitor installed on the common dc link. The DVR is characterized by installing the series converter on the source side and the shunt converter on the load side. This system configuration allows the use of an extremely small dc capacitor intended for smoothing the common dc-link voltage. This paper provides a design procedure of the dc capacitor under a voltage-sag condition and proposes a control method for the series converter, which is capable of reducing the voltage ratings of both the series converter and the series transformers. Experimental results obtained from a 200-V 5-kW laboratory system are shown to confirm the validity of the design procedure and the effectiveness of the control method.  相似文献   

2.
This paper presents an interleaved zero voltage switching (ZVS) DC/DC converter with high input voltage applications. In order to reduce the voltage stress of MOSFETs, two half‐bridge zeta converters are connected in series at high voltage side. Thus, the voltage stress of MOSFETs can be clamped at one‐half of input voltage. Asymmetric pulse‐width modulation (APWM) is adopted to control power switches. With the resonant behavior by the leakage inductance of transformer and the output capacitance of MOSFET at the transition interval, MOSFETs can be turned on at ZVS. For each half‐bridge zeta converter, two series transformers are connected in series at the primary side and in parallel at the secondary side in order to reduce the current stress of secondary windings for high load current applications. Interleaved PWM scheme is used to control two half‐bridge converters in order to reduce the size of output filter inductor and capacitor due to the partial ripple current cancellation. Experimental results, taken from a laboratory prototype rated at 1 kW, are presented to demonstrate the converter performance. Copyright © 2012 John Wiley & Sons, Ltd.  相似文献   

3.
This paper deals with a 6.6‐kV transformerless STATCOM cascading multiple single‐phase H‐bridge PWM converters in each phase. The AC voltage of the STATCOM is almost sinusoidal, so that it requires no harmonic filter. Each converter is equipped with a capacitor and a voltage sensor on the DC side, which are electrically isolated from each other. The STATCOM has the capability of self‐starting and voltage‐balancing without any external power supply or equipment. Experiments using a three‐phase 200‐V, 10‐kVA laboratory system, along with computer simulations, are carried out to confirm the viability and effectiveness of the STATCOM. © 2009 Wiley Periodicals, Inc. Electr Eng Jpn, 170(1): 55–64, 2010; Published online in Wiley InterScience ( www.interscience.wiley. com ). DOI 10.1002/eej.20822  相似文献   

4.
A new direct current (DC)/DC converter with parallel circuits is presented for medium voltage and power applications. There are five pulse‐width modulation circuits in the proposed converter to reduce current stress at low voltage side for high output current applications. These five circuits share the same power switches in order to reduce switch counts. To reduce the converter size, conduction loss, and voltage stress of power semiconductors, the series connections of power metal‐oxide‐semiconductor field‐effect transistor (MOSFET) with high switching frequency instead of insulated gate bipolar transistor (IGBT) with low switching frequency are adopted. Thus, the voltage stress of MOSFETs is clamped at half of input voltage. The switched capacitor circuit is adopted to balance input split capacitor voltages. Asymmetric pulse‐width modulation scheme is adopted to generate the necessary switching signals of MOSFETs and regulate output voltage. Based on the resonant behavior at the transition interval of power switches, all MOSFETs are turned on under zero voltage switching from 50% load to 100% load. The circuit configuration, operation principle, converter performance, and design example are discussed in detail. Finally, experimental verifications with a 1.92 kW prototype are provided to verify the performance of the proposed converter. Copyright © 2015 John Wiley & Sons, Ltd.  相似文献   

5.
An application of the chain link converter (CLC) system, which consists of multiple single‐phase voltage source converters (VSCs) connected in parallel or series, is studied as interconnection systems. In a CLC‐high voltage direct current transmission (HVDC) system, single‐phase converters must be connected in series on the DC side to make the DC voltage high, and the DC voltage of each converter must be controlled to the same value to get an appropriate capacity. This paper describes a DC voltage balancing control (DVBC) method between series converters. Simulations and simulator tests in steady states and in transient states were carried out to confirm behaviors of the CLC‐HVDC system. Those results confirmed the viability of CLC applications to interconnection systems. © 2006 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.  相似文献   

6.
动态电压恢复器(DVR)作为一种电力电子设备,是调节电网电压暂降的重要方法之一,通过向电网补偿适当的电压值,使负荷侧的电压恢复到跌落以前的正常值,维持负荷侧电压稳定,保证敏感负荷供电的连续性。本文在利用SVPWM技术控制DVR逆变单元三相电压源转换器进行直流/交流变换的同时,采用锁相环技术闭环控制负荷侧电压的方法。经过Matlab/Simulink软件进行的仿真和实验验证了所采用方法在对系统发生单相和三相电压暂降进行补偿时的有效性。  相似文献   

7.
动态电压恢复器(DVR)是串接于电源与负荷之间用以实现快速补偿系统电压波动的电力电子装置。针对传统基于电压源型逆变器的DVR存在的储能设备所带来的问题以及基于脉宽调制(PWM)型直接式AC/AC变换的DVR所存在的换流、飞跨电容电压平衡等问题,文中提出了一种基于双极性直接式AC/AC变换的单相DVR。该DVR所使用的PWM型AC/AC变换拓扑具有输入、输出共地特点,同时,该DVR能够在较为简单的控制策略下实现系统电压的双极性调控且其在运行过程中有效解决了换流问题。为了验证所提出的DVR的工程价值,在理论分析的基础上,搭建了1 kW的实验平台对其合理性与有效性进行了验证。  相似文献   

8.
2,3 This paper proposes a DC voltage equalizing circuit for a diode‐clamped linear amplifier (DCLA). The DCLA consists of series‐connected complementary MOSFETs and diode clamping circuits, with an experimental efficiency as high as 90% without switching operation. The DCLA requires a DC voltage equalizing circuit to divide the DC voltage into several levels. The proposed DC voltage equalizing circuit allows the use of a diode rectifier with a smoothing capacitor as a power supply for the DCLA. Zero‐sequence voltage control is proposed to improve the efficiency of the DCLA. As a result, a prototype 12‐series DCLA demonstrates an experimental efficiency as high as 94.7%. © 2012 Wiley Periodicals, Inc. Electr Eng Jpn, 179(2): 55–63, 2012; Published online in Wiley Online Library ( wileyonlinelibrary.com ). DOI 10.1002/eej.21131  相似文献   

9.
Several attempts have been made to design suitable controllers for DC–DC converters. However, these designs suffer from model inaccuracy or their inability to desirably function in both continuous and discontinuous current modes. This paper presents a novel switching scheme based on hybrid modeling to control a buck converter using mixed logical dynamical (MLD) methodologies. The proposed method is capable of globally controlling the converter in both continuous and discontinuous current modes of operation by considering all constraints in the physical plant such as maximum inductor current and capacitor voltage limits. Different loads and input voltage disturbances are simulated in MATLAB and results are presented to demonstrate the suitability of the controller. The transient and steady‐state performance of the closed‐loop control over a wide range of operating points shows satisfactory operation of the proposed controller. Copyright © 2008 John Wiley & Sons, Ltd.  相似文献   

10.
魏亮  马文忠  刘勇  王晓  赵华芳 《电源学报》2015,13(6):124-130
研究了一种可以实现电能不同形式综合利用的DC/DC/AC混合型模块化多电平变换器(MMC),该结构的变换器实现了电压变换功能的多样化。首先,分析了该种可以同时实现DC/DC与DC/AC混合电压变换的模块化多电平变换器拓扑结构;然后,利用功率正交原理,设计了DC/DC/AC混合型模块化多电平变换器的闭环控制策略;最后,在给定交流负载侧交流电流的前提下,实现了各个桥臂子模块电容电压的均衡控制。仿真结果验证了所提出的DC/DC/AC混合型模块化多电平变换器电压变换功能的可行性以及控制策略的有效性。  相似文献   

11.
Switched‐capacitor DC‐DC converters (SC DC‐DC) are analyzed for loss sources, voltage regulation integrity, start‐up latency, and ripple size, while the trade‐offs between these metrics are derived. These analyses are used to design a SC DC‐DC that achieves high efficiency in a wide load current range. Four‐way interleaving was employed to reduce the output ripple and efficiency loss due to this ripple. The design can be reconfigured to achieve gains of 1/3 and 2/5 for inputs ranging between 1.4 and 3.6 V to generate output voltage range of 0.4 to 1.27 V and can supply peak load current of 22 mA. It uses thin‐oxide MOS capacitors for their high density and achieves 75.4% peak efficiency with an input frequency of 100 MHz and a load capacitor of 10 nF. An augmenting LDO that only regulates during sudden load transients helps the converter respond fast to these transients. The chip was implemented using a 65‐nm standard CMOS process.  相似文献   

12.
抑制共模电磁干扰的并联有源补偿电路设计   总被引:4,自引:3,他引:1  
讨论了并联有源共模电磁干扰抑制中的两种不同补偿电路结构,通过建立带有补偿电路的单相半桥逆变器共模电流等效模型,详细介绍了两种补偿电路的设计过程,讨论了影响补偿电路补偿效果的两个因素,实验验证了设计补偿电路能够产生与噪声源共模电流大小相等方向相反的补偿电流。  相似文献   

13.
This paper presents a deadbeat current control structure for a bidirectional power flow pulse‐width modulation (PWM) converter connected to a stand‐alone induction generator (IG), which works with variable speed and different types of loads. Sensorless control of the IG, meaning stator voltage vector control without a mechanical shaft sensor, is considered to regulate both the IG line‐to‐line voltage and the DC‐bus voltage of the PWM converter. In the proposed system, a newly designed phase locked loop (PLL) circuit is used to determine the stator voltage vector position of the IG. A 2.2 kW laboratory prototype has been built to confirm the feasibility of the proposed method. The proposed cost‐effective IG system with a deadbeat current‐controlled PWM converter and capacitor bank requires only three sensors. Moreover, the required rating of the PWM converter becomes smaller due to the existence of the capacitor bank. © 2006 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.  相似文献   

14.
级联动态电压恢复器的研究   总被引:3,自引:0,他引:3  
配电系统电压跌落时,动态电压恢复器(dynamic voltage restorer,DVR)可以维持敏感负荷侧的电压稳定。文中介绍了级联动态电压恢复器(interline dynamic voltage restorer,IDVR)的结构,该IDVR把不同馈线上2个或2个以上的DVR通过1个直流电容连接起来,当其中一个DVR补偿电压跌落时,另一个DVR对直流电容充电。文中还分析比较了DVR的补偿策略,指出基于最小能量补偿法的IDVR系统可持续补偿较严重的电压跌落,并将负荷电压外环、滤波器电容电流内环的双闭环控制方法应用到IDVR系统中,提高了IDVR系统的阻尼比。仿真实验验证了该IDVR系统的正确性和有效性。  相似文献   

15.
This paper proposes a new method of damping harmonic resonance in the DC link of a large‐capacity rectifier‐inverter system, such as in rapid‐transit railways. A voltage‐source PWM converter is connected in series to the DC capacitor of the rectifier through a matching transformer, acting as a damping resistor to the DC capacitor current. No filters are needed to extract harmonic components from the DC capacitor current. This results in a quick response and highly stable damping. The relationship between the control gain of the PWM converter and the required rating is theoretically discussed. We show that the required rating is less than one‐thousandth of that previously proposed. In particular, regenerating the power consumed by the PWM converter is very important because of the large power in practical systems. Normally, an additional PWM inverter is connected to the DC bus of the PWM converter to regenerate the consumed power. The additional inverter regenerates the DC power to the AC source through a transformer. This method, however, makes the damping circuit complex, thus the proposed method for the DC‐link harmonic resonance is less practicable. In this paper, a simple and novel scheme that utilizes the DC‐link voltage of the rectifier as a DC source for the PWM converter is proposed. The excellent practicability of the proposed damping method with the novel regenerating scheme is confirmed using digital computer simulation. © 2003 Wiley Periodicals, Inc. Electr Eng Jpn, 144(2): 53–62, 2003; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.10172  相似文献   

16.
This paper introduces a new approach to the capacitor‐commutated converters (CCCs) for HVDC systems. A small‐rated three‐phase voltage‐source PWM converter is connected between a series commutation capacitor and thyristor converter through matching transformers. The PWM converter acts as auxiliary commutation‐capacitor for the thyristor converter while the series passive capacitor acts as the main commutation capacitor. The capacitance, which is the sum of the small‐rated active and series passive capacitors, is variable, so that stable commutation is obtained. In CCCs, commutation failure occurs when the AC bus voltage is recovered whereas the proposed combined commutation‐capacitor can achieve successful commutation for both rapidly decreasing and increasing AC bus voltages. The basic principle of the proposed active–passive capacitor‐commutated converter is discussed in detail. Then, constant margin angle control with a constant firing angle of the thyristor converter is proposed using a function generator block. Digital simulation demonstrates the novelty and effectiveness of the proposed active–passive capacitor‐commutated converter. © 2005 Wiley Periodicals, Inc. Electr Eng Jpn, 151(1): 66–75, 2005; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20030  相似文献   

17.
This paper presents a new DC/DC converter with series half‐bridge legs for high voltage application. Two half‐bridge legs connected in series and two split capacitors are used in the proposed circuit to limit the voltage stress of each active switch at one‐half of input voltage. Thus, active switches with low voltage stress can be used at high DC bus application. In the proposed converter, two circuit modules are operated with an interleaved pulse‐width modulation scheme to reduce the input and output ripple currents and to achieve load current sharing. In each circuit module, two resonant tanks are operated with phase‐shift one‐half of switching cycle such that the frequency of the input current is twice the frequency of the resonant inductor current. Based on the resonant behavior, all MOSFETs are turned on at zero voltage switching with the wide ranges of input voltage and load conditions. The rectifier diodes can be turned off at zero current switching if the switching frequency is less than the series resonant frequency. Thus, the switching losses on power semiconductors are reduced. The proposed converter can be applied for high input voltage applications such as three‐phase 380‐V utility system. Finally, experiments based on a laboratory prototype with 960‐W rated power are provided to demonstrate the performance of proposed converter. Copyright © 2011 John Wiley & Sons, Ltd.  相似文献   

18.
This paper proposes a new voltage‐balancing circuit for the split DC voltages in a diode‐clamped five‐level inverter. The proposed circuit is based on a resonant switched‐capacitor converter (RSCC), which consists of two half‐bridge inverters, a resonant inductor, and a resonant capacitor. A new phase‐shift control of the RSCC is proposed to improve voltage balancing performance. Theoretical analysis reveals the rating of the RSCC and stored energy in the resonant inductor. Experimental results confirm the reduction of the inductor to one‐tenth in volume compared to a conventional voltage‐balancing circuit based on buck‐boost topology. Moreover, the proposed phase‐shift control has demonstrated that it is possible to eliminate the voltage deviation between the DC capacitors. © 2009 Wiley Periodicals, Inc. Electr Eng Jpn, 168(2): 69–79, 2009; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20719  相似文献   

19.
This paper proposes a new circuit topology for a high‐efficiency isolated DC/DC converter using series compensation. The proposed converter consists of a high‐efficiency resonance half‐bridge converter and a series converter. The series converter regulates the output voltage and provides only the differential voltage between the input voltage and output voltage. Therefore, the circuit achieves high efficiency when the input voltage is almost equal to the output voltage, because then only the resonance converter will operate. In this paper, the approach employed to achieve high efficiency by using the proposed series compensation method is introduced. In addition, the fundamental operation and the method of designing the proposed circuit are described. The suitability of the proposed circuit was confirmed by performing experiment and loss analysis, and the maximum efficiency achieved was 96.2%. © 2012 Wiley Periodicals, Inc. Electr Eng Jpn, 182(2): 42–52, 2013; Published online in Wiley Online Library ( wileyonlinelibrary.com ). DOI 10.1002/eej.22330  相似文献   

20.
This paper studies the design and implementation of a non‐isolated dual‐half‐bridge bidirectional DC‐DC converter for DC micro‐grid system applications. High efficiency can be achieved under wide‐range load variations by the zero‐voltage‐switching features and an adaptive phase‐shift control method. A three‐stage charging scheme is designed to meet the fast‐charging demand and prolong the lifetime of LiFePO4 batteries. A digital‐signal‐processing control IC is used to realize the power flow control, DC‐bus voltage regulation, and battery charging/ discharging of the studied bidirectional DC‐DC converter. Finally, a 10 kW prototype converter with Enhanced Controller Area Network communication function is built and tested for micro‐grid system applications. A light‐load efficiency over 96% and a rated‐load efficiency over 98% can be achieved. Copyright © 2013 John Wiley & Sons, Ltd.  相似文献   

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