一种具有动态零点补偿的电流模DC-DC降压型转换器

To achieve fast transient response for a DC-DC buck converter,an adaptive zero compensation circuit is presented.The compensation resistance is dynamically adjusted according to the different output load conditions, and achieves an adequate system phase margin under the different conditions.An improved capacitor multiplier circuit is adopted to realize the minimized compensation capacitance size.In addition,analysis of the small-signal model shows the correctness of the mechanism of the proposed adaptive zero compensation technique.A currentmode DC-DC buck converter with the proposed structure has been implemented in a 0.35μm CMOS process,and the die size is only 800×1040μm~2.The experimental results show that the transient undershoot/overshoot voltage and the recovery times do not exceed 40 mV and 30μs for a load current variation from 100 mA to 1 A.     

A current-mode buck DC-DC controller with adaptive on-time control

A current-mode buck DC-DC controller based on adaptive on-time (AOT) control is presented. The on-time is obtained by the techniques of input feedforward and output feedback, and the adaptive control is achieved by a sample-hold and time-ahead circuit. The AOT current-mode control scheme not only obtains excellent transient response speed, but also achieves the independence of loop stability on output capacitor ESR. In addition, the AOT current-mode control does not have subharmonic oscillation phenomenon seen in fixed frequency peak current-mode control, so there is no need of the slope compensation circuit. The auto-skip pulse frequency modulation (PFM) mode improves the conversion efficiency of light load effectively. The controller has been fabricated with UMC 0.6-μm BCD process successfully and the detailed experimental results are shown.     

具有动态模式控制和斜波补偿的宽负载、多模式同步降压DC-DC转换器

A synchronous buck DC-DC converter with an adaptive multi-mode controller is proposed.In order to achieve high efficiency over its entire load range,pulse-width modulation(PWM),pulse-skip modulation(PSM) and pulse-frequency modulation(PFM) modes were integrated in the proposed DC-DC converter.With a highly accurate current sensor and a dynamic mode controller on chip,the converter can dynamically change among PWM, PSM and PFM control according to the load requirements.In addition,to avoid power device damage caused by inrush current at the start up state,a soft-start circuit is presented to suppress the inrush current.Furthermore,an adaptive slope compensation(SC) technique is proposed to stabilize the current programmed PWM controller for duty cycle passes over 50%,and improve the degraded load capability due to traditional slope compensation.The buck converter chip was simulated and manufactured under a 0.35μm standard CMOS process.Experimental results show that the chip can achieve 79%to 91%efficiency over the load range of 0.1 to 1000 mA.     

一种带双重纹波补偿的10MHZ导通时间纹波控制降压型转化器

A 10 MHz ripple-based on-time controlled buck converter is presented.A novel low-cost dual ripple compensation,which consists of coupling capacitor compensation and passive equivalent series resistance compensation, is proposed to achieve a fast load transient response and robust stability simultaneously.Implemented in a 2P4M 0.35μm CMOS process,the converter achieves fix-frequency output with a ripple of below 10 mV and an overshoot of 10 mV at 400 mA step load transient response.With width optimization of the power transistors in an ultra-heavy load and PFM control in a light load,the efficiency stays at over 83%for a load range from 20 mA to 1.5 A and the peak efficiency reaches 90.16%.     

Sliding mode control and stability analysis of buck DC-DC converter

This paper is proposed to deal with the voltage regulation of buck DC-DC converter based on sliding mode control (SMC) technology. A buck DC-DC converter with parasitic resistance is inherently a bilinear system possessing inevitable uncertainties, such as variable resistive load and input disturbance. First, the buck DC-DC converter is modified into an uncertain linear model. Then, SMC technology is adopted to suppress the input disturbance and reduce the effects from the load variation. In addition, the continuous conduction mode (CCM) for normal operation can be guaranteed by the design of sliding function. Finally, experimental results are included for demonstration.     

A buck converter with adaptive on-time PFM control and adjustable output voltage

This letter proposes a new adaptive on-time pulse-frequency modulation (PFM) circuit that operates at a wide range of supply voltage levels and that can generate various output voltage levels compared to conventional circuits. The circuit’s peak inductor current is well-controlled; the magnitude of the output ripple voltage is constant, even when the supply and output voltage levels are significantly different. Since the ripple voltage is a noise component, constant ripple voltage is important for predictable noise of a power management system.     

A 3-A CMOS low-dropout regulator with adaptive Miller compensation

A 3-A CMOS low-dropout regulator (LDO) is presented by utilizing adaptive Miller compensation (AMC) technique, which provides high stability, as well as fast line and load transient responses. The proposed LDO has been fabricated in a standard 0.5 μm CMOS technology, and the die area is small as 1330 μm × 1330 μm with the area-efficient waffle layout for power transistors. Both load and line regulation are less than ±0.1%. And the output voltage can recover within 80 μs for full load changes. The power–supply rejection ratio (PSRR) at 20 KHz is −30 dB. Moreover, it is stable enough with a ceramic capacitor small to 2.2 μF, and the added series resistance is not needed. Xinquan Lai received his BSc degree in Technical Physics in 1987, and MSc degree in Electronic Engineering in 1993, both from the Xidian University, Xi’an, China. And he received a PhD degree in Computer Science & Engineering from the Northwestern Polytechnical University (NPU) in 1998. He is currently a professor in Xidian University. His present research interests include mixed signal VLSI/ASIC and SOC design, CMOS Sensor, and power management IC design, validation, test and other relative theories. Jianping Guo was born in Jiangxi, P.R. China in 1981. He received the BSc and MSc degrees in electronic engineering from Xidian University, Xi’an, China, in 2003 and 2006, respectively. He is currently severed as power management IC engineer in Xi’an Deheng Microelectronic Inc. His research interest involves power management IC design such as LDO linear regulator, DC-DC switching regulator etc. Zuozhi Sun was born in Zhejiang, P. R. China in 1978. He received the BSc and MSc degrees in electronic engineering from Xidian University, Xi’an, China, in 2000 and 2003, respectively. He joined Xi’an Deheng Microelectronic Inc. in 2003, where he works on development of power management IC. His research interest involves power management IC, audio amplifier etc. Jianzhang Xie received his BSc and MSc degrees in electronic engineering from Xidian University, Xi’an, China, in 1998 and 2005, respectively. He joined AIWA (Shenzhen) Ltd. as an electronic circuit designer in 1998, and now he is severed as an analog and mixed IC engineer in RENEX Technology (Shanghai) Ltd. His research interest involves power management IC, PLLs and high speed communication circuits.     

An integrated one-cycle control buck converter with adaptive output and dual loops for output error correction

An integrated adaptive-output switching converter is presented. This converter adopts one-cycle control for fast line response and dual error correction loops for tight load regulation. A dc level shifting technique is proposed to eliminate the use of negative supply and reference voltages in the controller and make the design compatible with standard digital CMOS process. The design accommodates both continuous and discontinuous conduction operations. To further enhance the efficiency, dynamic loss control on the power transistors is proposed to minimize the sum of switching and conduction losses. The design can be extended to other dc-dc and ac-dc conversions. The prototype of the buck converter was fabricated with a standard 0.5-/spl mu/m digital CMOS process. Experimental results show that the converter is well regulated over an output range of 0.9-2.5 V, with a supply voltage of 3.3 V. The tracking speeds are 12.25 /spl mu/s/V for a 1.6-V step-up output change and 13.75 /spl mu/s/V for a 1.6-V step-down output change, respectively, which are much faster than existing counterparts. Maximum efficiency of 93.7% is achieved and high efficiency above 75% is retained over an output power ranging from 10 to 450 mW.     

Adaptive sliding controller with self-tuning fuzzy compensation for vehicle suspension control

Since the hydraulic actuating suspension system has nonlinear and time-varying behavior, it is difficult to establish an accurate dynamic model for a model-based sliding mode control design. Here, a novel model-free adaptive sliding controller is proposed to suppress the position oscillation of the sprung mass in response to road surface variation. This control strategy employs the functional approximation technique to establish the unknown function for releasing the model-based requirement. In addition, a fuzzy scheme with online learning ability is introduced to compensate the functional approximation error for improving the control performance and reducing the implementation difficulty. The important advantages of this approach are to achieve the sliding mode controller design without the system dynamic model requirement and release the trial-and-error work of selecting approximation function. The update laws for the coefficients of the Fourier series functions and the fuzzy tuning parameters are derived from a Lyapunov function to guarantee the control system stability. The experimental results show that the proposed control scheme effectively suppresses the oscillation amplitude of the vehicle sprung mass corresponding to the road surface variation and external uncertainties, and the control performance is better than that of a traditional model-based sliding mode controller.     

Pre-filtering and head-dependent adaptive feed-forward compensation for translation vibration in hard-disc-drive

This paper suggests a head-dependent adaptive feed-forward (AFF) control scheme with pre-filtering for vibration compensation in single input single output hard-disc-drive (HDD) servo system. First, an AFF algorithm is designed and implemented for the translation vibration compensation in the servo system. In order to improve the vibration compensation performance significantly, a pre-filtering process is added in the AFF scheme. Meanwhile, a head-dependent AFF control strategy is proposed and implemented to accommodate the dynamics variations in HDD servo system. This head-dependent AFF control scheme improves the vibration compensation performance in consistency. The proposed head-dependent AFF control scheme with pre-filtering is validated by the drive level experiments with significant performance improvement for vibration compensation in high density HDD servo system.     

Design and implementation of adaptive slope compensation in current mode DC-DC converter

To improve the compensation for the inherent instability in a current mode converter,the adaptive slope compensation,giving attention to the problems of the traditional compensation on compensation accuracy,loading capability and turning jitter,is presented.Based on the analysis of current loop,by detecting the input and output voltage, converting the adaptive slope compensation current,the compensation of the current loop is optimized successfully.It can not only improve the compensation accuracy but al...     

PMD自适应补偿控制模块自启动的实现

为解决偏振模色散自适应补偿控制模块的自启动问题,提出了一种使用ROM引导、完全利用C语言进行程序烧写的自启动方案。首先分析了该模块的自启动过程,其次进行了自启动的硬件接口设计,最后重点介绍了自启动的C语言编程过程,给出了自启动的C语言源程序、cmd文件和Fl ash烧写流程图。     

State-dependent friction force compensation using periodic adaptive learning control

This paper uses the periodic adaptive learning control (PALC) for the compensation of a state-dependent non-Lipschitz external disturbance of electromechanical systems. Theoretically, we are interested in designing a non-Lipschitz friction force compensator, where the friction force is considered position-dependent external disturbance. The key idea of the proposed scheme is to make use of state-periodicity of an external disturbance on the iterative state domain. The state-periodical adaptive compensator designed based on Lyapunov stability analysis guarantees an asymptotical stability of the system after the first iterative trajectory and onwards. The designed-adaptive compensator is verified through an actual DC motor control test.     

一种带纹波补偿和效率优化的1500mA，10MHz导通时间控制降压型转化器

本文叙述了一种由自适应导通时间控制的1500mA,10MHz降压型转换器。文中提出的低成本纹波补偿技术和自适应导通时间产生电路分别解决了系统稳定性和频率变化问题。同时,一种自适应功率管分段技术被用于优化整体效率,特别是重负载下的效率。该转换器电路采用2P4M 0.35微米CMOS工艺流片验证。外部使用0.47μH电感和4.7μF电容以减小转换器成本,并保证输出纹波小于10mV。测试结果显示,负载跳变时的过冲为8mV每200mA,DVS性能为16μs/V上升和20μs/V下降。由于自适应功率管分段技术和PFM作用,转换器在20mA到1500mA范围内的整体效率保持在81%以上,同时峰值效率可达88.43%。     

A 1500 mA,10 MHz on-time controlled buck converter with ripple compensation and efficiency optimization

正A 1500 mA,10 MHz self-adaptive on-time(SOT) controlled buck DC-DC converter is presented.Both a low-cost ripple compensation scheme(RCS) and a self-adaptive on-time generator(SAOTG) are proposed to solve the system stability and frequency variation problem.Meanwhile a self-adaptive power transistor sizing(SAPTS) technique is used to optimize the efficiency especially with a heavy load.The circuit is implemented in a 2P4M 0.35μm CMOS process.A small external inductor of 0.47μH and a capacitor of 4.7μF are used to lower the cost of the converter and keep the output ripple to less than 10 mV.The measurement results show that the overshoot of the load transient response is 8 mV @ 200 mA step and the dynamic voltage scaling(DVS) performance is a rise of 16μs/V and a fall of 20μs/V.With a SAPTS technique and PFM control,the efficiency is maintained at more than 81%for a load range of 20 to 1500 mA and the peak efficiency reaches 88.43%.     

基于双通路跨导运放的电压模DC/DC片内频率补偿电路

提出了一种新颖的电压模DC/DC频率补偿电路. 通过在内部跨导运放的两条小信号通路中构造阻容网络,此电路能够产生双零点以实现环路高稳定性. 由于其结构简单,易于完全集成,因此有效地减少了外围应用器件数目及印制板面积. 同时, 通过对跨导运放的优化设计进一步提高环路瞬态响应性能. 采用此电路的一款电压模DC/DC转换器已在一0.5 μm CMOS 工艺线投片,测试结果表明环路稳定性良好, 负载调整率及线性调整率均小于0.3%, 400 mA负载阶跃对应输出电压响应时间小于15 μs, 同时补偿器件面积小于裸片面积的2%, 印制板面积减小了11%. 整个芯片的效率高达95%.     

A new adaptive recursive RLS-based fast-array IIR filter for active noise and vibration control systems

Infinite impulse response filters have not been used extensively in active noise and vibration control applications. The problems are mainly due to the multimodal error surface and instability of adaptive IIR filters used in such applications. Considering these, in this paper a new adaptive recursive RLS-based fast-array IIR filter for active noise and vibration control applications is proposed. At first an RLS-based adaptive IIR filter with computational complexity of order O(n²) is derived, and a sufficient condition for its stability is proposed by applying passivity theorem on the equivalent feedback representation of this adaptive algorithm. In the second step, to reduce the computational complexity of the algorithm to the order of O(n) as well as to improve its numerical stability, a fast array implementation of this adaptive IIR filter is derived. This is accomplished by extending the existing results of fast-array implementation of adaptive FIR filters to adaptive IIR filters. Comparison of the performance of the fast-array algorithm with that of Erikson’s FuLMS and SHARF algorithms confirms that the proposed algorithm has faster convergence rate and ability to reach a lower minimum mean square error which is of great importance in active noise and vibration control applications.     

一种用于数字控制DC-DC转换器的近似时间最优轨迹预测法

The purpose of this paper is to present a novel trajectory prediction method for proximate time-optimal digital control DC-DC converters. The control method provides pre-estimations of the duty ratio in the next several switching cycles, so as to compensate the computational time delay of the control loop and increase the control loop bandwidth, thereby improving the response speed. The experiment results show that the fastest transient response time of the digital DC-DC with the proposed prediction is about 8/μs when the load current changes from 0.6 to 0.1A.