InAs/AlSb异质结的Pd/Ti/Pt/Au合金化欧姆接触

为了得到较低的接触电阻, 研究了帽层未掺杂的InAs/AlSb异质结的Pd/Ti/Pt/Au合金化欧姆接触.利用传输线模型 (TLM) 测量了接触电阻Rc.在最佳的快速热退火条件为275℃和20s时, InAs/AlSb异质结的Pd/Ti/Pt/Au接触电阻值为0.128Ω·mm.TEM观察发现经过快速热退火后Pd已经扩散到半导体中有利于高质量欧姆接触的形成.研究表明经过Pd/Ti/Pt/Au合金化欧姆接触后Rc有明显减小, 适用于InAs/AlSb异质结的应用.     

Unintentional As incorporation in molecular beam epitaxially grown InAs/AlSb/GaSb heterostructures

We investigate unintentional arsenic incorporation during the molecular-beam epitaxial growth of AlSb/InAs/GaSb heterostructures, using both a standard As₄ evaporation cell and a valved arsenic cracker. When a standard As₄ cell is used, unintentional arsenic concentrations as large as 10–20% can be incorporated into the AlSb and GaSb layers from the background As ambient in the growth chamber, both during growth and on stationary surfaces. This incorporation can be controlled and suppressed with the use of a valved As cracker. Suppression of the As background substantially improves the electrical transport properties of AlSb/InAs/AlSb quantum well structures.     

InAs/AlSb HEMTs for cryogenic LNAs at ultra-low power dissipation

Properties of the InAs/AlSb high electron mobility transistor, essential for the design of a cryogenic low-noise amplifier (LNA) operating at low power dissipation, have been studied. Upon cooling from 300 K to 77 K, the dc transconductance g_m was enhanced by 30% at a drain-source voltage V_DS of 0.1 V. The gate current leakage showed a strong reduction of the Schottky current component at 77 K. Compared to 300 K, the cut-off frequency f_T and maximum oscillation frequency f_max showed a significant improvement at 77 K with a peak f_T (f_max) of 167 (142) GHz at V_DS = 0.2 V. The suitability of the Sb HEMT for a cryogenic LNA design up to 50 GHz, operating at low dc power dissipation, was investigated through the extraction of the NF_tot,min figure of merit. It was found that the best device performance in terms of noise and gain is achieved at a low V_DS of 0.16 V resulting in a minimum NF_tot,min of 0.6 dB for a frequency of 10 GHz when operating at 77 K. A benchmarking between the Sb HEMT and an InP HEMT has been conducted highlighting the device improvement in noise and gain required to reach today’s state-of-the-art cryogenic LNAs.     

AlGaN/GaN high electron mobility transistors with selective area grown p-GaN gates

We report a selective area growth (SAG) method to define the p-GaN gate of AlGaN/GaN high electron mobility transistors (HEMTs) by metal-organic chemical vapor deposition. Compared with Schottky gate HEMTs, the SAG p-GaN gate HEMTs show more positive threshold voltage (V_th) and better gate control ability. The influence of Cp₂Mg flux of SAG p-GaN gate on the AlGaN/GaN HEMTs has also been studied. With the increasing Cp₂Mg from 0.16 μmol/min to 0.20 μmol/min, the V_th raises from -67 V to -37 V. The maximum transconductance of the SAG HEMT at a drain voltage of 10 V is 113.9 mS/mm while that value of the Schottky HEMT is 51.6 mS/mm. The SAG method paves a promising way for achieving p-GaN gate normally-off AlGaN/GaN HEMTs without dry etching damage.     

Novel Type‐II InAs/AlSb Core–Shell Nanowires and Their Enhanced Negative Photocurrent for Efficient Photodetection

The control of optical and transport properties of semiconductor heterostructures is crucial for engineering new nanoscale photonic and electrical devices with diverse functions. Core–shell nanowires are evident examples of how tailoring the structure, i.e., the shell layer, plays a key role in the device performance. However, III–V semiconductors bandgap tuning has not yet been fully explored in nanowires. Here, a novel InAs/AlSb core–shell nanowire heterostructure is reported grown by molecular beam epitaxy and its application for room temperature infrared photodetection. The core–shell nanowires are dislocation‐free with small chemical intermixing at the interfaces. They also exhibit remarkable radiative emission efficiency, which is attributed to efficient surface passivation and quantum confinement induced by the shell. A high‐performance core–shell nanowire phototransistor is also demonstrated with negative photoresponse. In comparison with simple InAs nanowire phototransistor, the core–shell nanowire phototransistor has a dark current two orders of magnitude smaller and a sixfold improvement in photocurrent signal‐to‐noise ratio. The main factors for the improved photodetector performance are the surface passivation, the oxide in the AlSb shell and the type‐II bandgap alignment. The study demonstrates the potential of type‐II core–shell nanowires for the next generation of photodetectors on silicon.     

AIGaAsSb Buffer/Barrier on GaAs substrate for InAs channel devices with high electron mobility and practical reliability

InAs/AlGaAsSb deep quantum well was successfully formed on GaAs substrate and examined for two electron devices, Hall elements (HEs), and field-effect transistors (FETs). With a thin buffer layer of 600 nm AIGaAsSb on GaAs substrate, we observed high electron mobility more than 23000 cm²/Vs and extrinsic effective electron velocity of 2.2 x 10⁷ cm/s for a 15 nm thick InAs channel at room temperature. AIGaAsSb lattice matched to InAs was discussed from the view points of insulating property, carrier confinement, and oxidization rate. Reliability data good enough for practical use were also obtained for HEs. We demonstrated AIGaAsSb as a promising buffer/barrier layers for InAs channel devices on GaAs substrate, and we discussed the possible advantages of AIGaAsSb also for InGaAs FETs.     

Thermal effects in AlGaN/GaN/Si high electron mobility transistors

Group III-nitride compounds are of increasing interest for designing high power and high temperature transistors. A considerable progress in the growth and process technology of these devices has been achieved. However, there are still limitations concerning particularly the lack of native substrates. Comparison of the AlGaN/GaN high electron mobility transistors investigated favours the SiC substrate. Recently, encouraging results have been reported for AlGaN/GaN/Si. The crucial problem found in AlGaN/GaN transistors operating at high biases is the self-heating induced by high power dissipation in the active zone. The present work reports on a study of the self-heating in AlGaN/GaN HEMTs grown on Si(1 1 1). The electron-band parameters of the heterostructures have been calculated self-consistently by taking into account the piezoelectric and spontaneous polarizations. As an experiment support, direct-current characteristics of AlGaN/GaN/Si HEMTs have been used to derive the drain voltage-dependent temperature rise in the conductive channel. As has been found, the self-heating is relatively weak. An improvement in the electron transport is achieved by optimizing the epilayers and adjusting the electrode sizes at output of the transistors investigated.     

半开态直流应力作用下AlGaN/GaN高电子迁移率晶体管的失效机制分析

本文研究了半开态直流应力条件下,AlGaN/GaN高电子迁移率晶体管的退化机制。应力实验后,器件的阈值电压电压正漂,栅漏串联电阻增大。利用数据拟合发现,沟道电流的退化量与阈值电压及栅漏串联电阻的变化量之间有密切的关系。分析表明,阈值电压的退化是引起饱和区沟道电流下降的主要因素,对于线性区电流,在应力开始的初始阶段,栅漏串联电阻的增大导致线性区电流的退化,随后沟道电流退化主要由阈值电压的退化引起。分析表明,在半开态应力作用下,栅泄露电流及热电子效应使得电子进入AlGaN层,被缺陷俘获,进而导致沟道电流退化。其中反向栅泄露电流中的电子被栅电极下AlGaN层内的缺陷俘获,导致阈值电压正漂;而热电子效应则使得栅漏串联区电阻增大。     

Analysis of AIGaN/GaN high electron mobility transistors failure mechanism under semi-on DC stress

Semi-on DC stress experiments were conducted on A1GaN/GaN high electron mobility transistors （HEMTs） to find the degradation mechanisms during stress. A positive shift in threshold voltage （VT） and an increase in drain series resistance （RD） were observed after semi-on DC stress on the tested HEMTs. It was found that there exists a close correlation between the degree of drain current degradation and the variation in VT and RD. Our analysis shows that the variation in Vx is the main factor leading to the degradation of saturation drain current （IDs）, while the increase in RD results in the initial degradation of Ios in linear region in the initial several hours stress time and then the degradation of VT plays more important role. Based on brief analysis, the electron trapping effect induced by gate leakage and the hot electron effect are ascribed to the degradation of drain current during semi-on DC stress. We suggest that electrons in the gate current captured by the traps in the A1GaN layer under the gate metal result in the positive shift in VT and the trapping effect in the gate-drain access region induced by the hot electron effect accounts for the increase in RD.     

Effects of post-annealing on the passivation interface characteristics of AlGaN/GaN high electron mobility transistors

We examined the effects of post-annealing in forming-gas ambient on the spin-on-dielectric (SOD)-buffered passivation as well as the conventional plasma-enhanced chemical vapor deposition (PECVD) Si₃N₄ passivation structure in association with the quantitative analysis of defects at the passivation interfaces of AlGaN/GaN high electron mobility transistors (HEMTs). Before the annealing, the interface state densities (D_it) of the PECVD Si₃N₄ are one-order higher (10¹²–10¹³ cm⁻² eV⁻¹) than those of the SOD SiO_x (10¹¹–10¹² cm⁻² eV⁻¹) as derived from C–V characterization. Clear reduction in D_it from the PECVD Si₃N₄ is extracted to a level of 10¹¹–10¹² cm⁻² eV⁻¹ with a stronger absorption from Si–N peak in Fourier transform infrared spectroscopy spectra after the post-annealing. On the other hand, negligible difference in D_it value is obtained from the SOD SiO_x. In this paper we propose that much lower measurement levels (~156 mA/mm) before the annealing and substantial recovery (~13% increase) after the annealing in maximum drain current density of the AlGaN/GaN HEMTs with Si₃N₄ passivations are due to the original higher density before the annealing and greater reduction in D_it of the PECVD Si₃N₄ after the annealing. Significant reduction after the annealing in gate–drain leakage current (from ~10⁻³ to ~10⁻⁵ A, 100-μm gate width) of the HEMTs with the Si₃N₄ passivation is also supposed to be attributed to the reduction of D_it.     

多栅指AlGaN/GaN HEMT器件自热效应研究

Self-heating in multi-finger AlGaN/GaN high-electron-mobility transistors(HEMTs) is investigated by measurements and modeling of device junction temperature under steady-state operation.Measurements are carried out using micro-Raman scattering to obtain the detailed and accurate temperature distribution of the device.The device peak temperature corresponds to the high field region at the drain side of gate edge.The channel temperature of the device is modeled using a combined electro-thermal model considering 2DEG transport characteristics and the Joule heating power distribution.The results reveal excellent correlation to the micro-Raman measurements, validating our model for the design of better cooled structures.Furthermore,the influence of layout design on the channel temperature of multi-finger AlGaN/GaN HEMTs is studied using the proposed electro-thermal model, allowing for device optimization.     

Implications of gate-edge electric field in AlGaN/GaN high electron mobility transistors during OFF-state degradation

Gate degradation in high electron mobility transistors (HEMTs) under OFF-state stress results from the high electric field near the gate edge. We investigate the evolution of this field over time in AlGaN/GaN HEMTs upon OFF-state stress using a combination of electroluminescence (EL) microscopy and spectroscopy. EL analysis suggests that the electric field at the sites of generated surface defects is lowered after the stress, with greater lowering at higher stress temperature. The ON-state EL spectrum remains unchanged after the stress, suggesting that the regions without generated defects are not affected during the degradation. A finite element model is employed to further demonstrate the effect of surface defects on the local electric field. A correlation is observed for the spatial distribution of the EL intensity before and after the generation of leakage sites, which provides a prescreening method to predict possible early failures on a device.     

Analytical modeling of InSb/AlInSb heterostructure dual gate high electron mobility transistors

This paper presents an approximate solution of a 2D Poisson’s equation within the channel region for Double-Gate AlInSb/InSb High Electron Mobility Transistors (DGHEMTs), using variable separation technique. The proposed model is used to obtain the surface potential, electric field, threshold voltage and drain current of both tied and separated gate bias conditions for Double-Gate AlInSb/InSb HEMTs. The surface potential and electric field are derived for both effective conduction paths of front and back heterointerface by a simple analytical expression and an analytical solution is verified with sentarus TCAD device simulator.     

蓝宝石衬底上Ka波段AlN/GaN高电子迁移率晶体管

We report the DC and RF characteristics of AlN/GaN high electron mobility transistors(HEMTs) with the gate length of 100 nm on sapphire substrates. The device exhibits a maximum drain current density of 1.29 A/mm and a peak transconductance of 440 m S/mm. A current gain cutoff frequency and a maximum oscillation frequency of 119 GHz and 155 GHz have been obtained, respectively. Furthermore, the large signal load pull characteristics of the AlN/GaN HEMTs were measured at 29 GHz. An output power density of 429 m W/mm has been demonstrated at a drain bias of 10 V. To the authors’ best knowledge, this is the earliest demonstration of power density at the Ka band for Al N/Ga N HEMTs in the domestic, and also a high frequency of load-pull measurements for Al N/Ga N HEMTs.     

Off-state breakdown and leakage current transport analysis of AlGaN/GaN high electron mobility transistors

Off-state breakdown characteristics of AlGaN/GaN high-electron-mobility transistors have been studied based on drain current injection method. It is found that at low drain current injection level, the observed premature breakdown is caused by excess gate-to-drain leakage current. Nevertheless, at high drain injection current level, buffer-leakage-dominated breakdown proceeds gate-leakage-dominated breakdown as the gate bias increases from pinch-off voltage to deep-depletion voltage. In both breakdown regions, the breakdown voltages show negative temperature coefficients. The buffer-leakage-induced breakdown should be defect-related, which is confirmed by temperature-dependent buffer leakage measurements.     

A model for the critical voltage for electrical degradation of GaN high electron mobility transistors

It has recently been postulated that GaN high electron mobility transistors under high voltage stress degrade as a result of defect formation induced by excessive mechanical stress that is introduced through the inverse piezoelectric effect. This mechanism is characterized by a critical voltage beyond which irreversible degradation takes place. In order to improve the electrical reliability of GaN HEMTs, it is important to understand and model this degradation process. In this paper, we formulate a first-order model for mechanical stress and elastic energy induced by the inverse piezoelectric effect in GaN HEMTs which allows the computation of the critical voltage for degradation in these devices.     

Compact analytical model for single gate AlInSb/InSb high electron mobility transistors

We have developed a 2D analytical model for the single gate Al In Sb/In Sb HEMT device by solving the Poisson equation using the parabolic approximation method.The developed model analyses the device performance by calculating the parameters such as surface potential,electric field distribution and drain current.The high mobility of the Al In Sb/In Sb quantum makes this HEMT ideal for high frequency,high power applications.The working of the single gate Al In Sb/In Sb HEMT device is studied by considering the variation of gate source voltage,drain source voltage,and channel length under the gate region and temperature.The carrier transport efficiency is improved by uniform electric field along the channel and the peak values near the source and drain regions.The results from the analytical model are compared with that of numerical simulations(TCAD) and a good agreement between them is achieved.     

导致 AlGaN/GaN HEMT电学性能失效的内外因素

本文研究了不同偏置条件对AlGaN/GaN HEMT电学性能的影响。电场被认为是导致AlGaN/GaN HEMT器件电学性能退化的外因,陷阱则是内因。AlGaN/GaN HEMT器件的退化有两部分组成：可恢复退化与不可恢复退化。AlGaN/GaN HEMT器件中原本存在的陷阱与新产生的陷阱导致可恢复退化。     

Simulation and analysis of metamorphic high electron mobility transistors

In this paper, the metamorphic high electron mobility transistors (mHEMTs) are investigated numerically and compared with pseudo-morphic high electron mobility transistors (pHEMTs). The two-dimensional device simulator, MEDICI, is used to solve the Poisson's equation and the electron/hole current continuity equations. The influences of δ-doping concentration and position, gate width, spacer thickness, etc. on the performances of HEMTs are explored. It shows clearly that mHEMTs have higher transconductances, drain currents and DC voltage swings than pHEMTs.     

Unpassivated GaN/AlGaN/GaN power high electron mobility transistors with dispersion controlled by epitaxial layer design

In this paper, a novel GaN/AlGaN/GaN high electron mobility transistor (HEMT) is discussed. The device uses a thick GaN-cap layer (∼250 nm) to reduce the effect of surface potential fluctuations on device performance. Devices without Si₃N₄ passivation showed no dispersion with 200-ns-pulse-width gate-lag measurements. Saturated output-power density of 3.4 W/mm and peak power-added efficiency (PAE) of 32% at 10 GHz (V_DS=+15 V) were achieved from unpassivated devices on sapphire substrates. Large gate-leakage current and low breakdown voltage prevented higher drain-bias operation and are currently under investigation.