SOI高温压力传感器专用集成电路设计

针对压力传感系统高温条件下无法稳定工作、性能下降等问题,设计了一种基于SOI CMOS高温工艺的压力传感器专用集成电路(ASIC),主要由零温度系数恒流源、仪表运算放大器(由恒定跨导运放组成)和零温度系数电压基准组成,具有为压力传感器供电、放大输出信号及调节零点的功能,重点介绍了零温度系数恒流源、仪表运放及组成仪表运放的运算放大器等相关电路。仿真结果表明,-55~225℃温度范围内,恒流源温度系数为109ppm/℃,运算放大器输入MOS管跨导几乎与温度无关,仪表运放输入输出电压成正比且共模抑制比高达125 d B。测试结果显示该压力传感器专用集成电路可在225℃下正常工作。     

The application of the current-comparator technique ininstrumentation and measurement equipment for the calibration ofnon-conventional instrument transformers with non-standard rated outputs

An overview of the development of instrumentation and measurement techniques at the National Research Council of Canada, based on current comparator technology, for calibration of nonconventional instrument transformers with nonstandard rated outputs, is presented. The instruments include: (1) a wide-dynamic-range transimpedance amplifier for operation of input currents from 1 A to 1000 A with means for modifying the in-phase and quadrature components of the output voltage (rated 10 V) within a ±10% range; (2) a high-voltage high-current transconductance amplifier with output current ranges of 10 A, 100 A, and 1000 A; and (3) a voltage ratio standard also with means for modifying the in-phase and quadrature components of the output voltage (rated 100 V) within a ±10% range. The current comparator technique is used to obtain accuracies of better than 20 parts per million in both magnitude and phase of the associated outputs of these instruments     

On the input common‐mode voltage range of CMOS bulk‐driven input stages

In this paper the response of a bulk‐driven MOS Metal‐Oxide‐Semiconductor input stage over the input common‐mode voltage range is discussed and experimentally evaluated. In particular, the behavior of the effective input transconductance and the input current is studied for different gate bias voltages of the input transistors. A comparison between simulated and measured results, in standard 0.35‐µm CMOS Complementary Metal‐Oxide‐Semiconductor technology, demonstrates that the model of the MOS transistors is not sufficiently accurate for devices operating under forward bias conditions of their source‐bulk pn junction. Therefore, the fabrication and the experimental evaluation of any solution based on this approach are highly recommended. A technique to automatically control the gate bias voltage of a bulk‐driven differential pair is proposed to optimize the design tradeoff between the effective input transconductance and the input current. The proposed input stage was integrated as a standalone block and was also included in a 1.5‐V second‐order operational transconductance amplifier (OTA)‐C lowpass filter. Experimental results validate the effectiveness of the approach. Copyright © 2010 John Wiley & Sons, Ltd.     

0.5‐V bulk‐driven differential amplifier

A new 0.5‐V fully differential amplifier is proposed in this article. The structure incorporates a differential bulk‐driven voltage follower with conventional gate‐driven amplification stages. The bulk‐driven voltage follower presents differential gain equal to unity while suppressing the input common‐mode voltage. The amplifier operates at a supply voltage of less than 0.5 V, performing input transconductance almost equal to a gate transconductance and relatively high voltage gain without the need for gain boosting. The circuit was designed and simulated using a standard 0.18‐µm CMOS n‐well process. The low‐frequency gain of the amplifier was 56 dB, the unity gain bandwidth was approximately 3.2 MHz, the spot noise was 100 nV/√Hz at 100 kHz and the current consumption was 90 μΑ. Copyright © 2012 John Wiley & Sons, Ltd.     

High third-order-intercept series-FET driver power amplifier [Application Notes]

An amplifier is called linear when the output power increases linearly with the input power. As input power increases, the amplifier transfer function becomes nonlinear, and a stage is reached where the output power does not increase with the input power. This happens because of transistor current and voltage clipping and the variations of transistor transconductance and junction capacitances with input RF power. One of the measures of nonlinearity of amplifiers is intermodulation distortion (IMD). When more than one carrier frequency is present in a nonlinear amplifier, multiple sidebands will be generated as intermodulation products due to mixing in the nonlinear device [1]-[8].     

大容性负载双极性高压功率放大器设计

设计了一种适合压电陶瓷驱动器等大容性负载动态应用的双极性高压功率放大器,它基于误差放大式原理,采用高压集成运放(PA89)驱动多组并联功率放大级的电路结构,在实现双极性高电压输出的同时具有很强的电流驱动能力.该放大器驱动等效电容为2.5μF的压电陶瓷驱动器时,能实现单端到地-500～+500V高压输出,电压增益40dB...     

Class AB amplifier with enhanced slew rate and GBW

The design of a micropower class AB operational transconductance amplifier with large dynamic current to quiescent current ratio is addressed. It is based on a compact and power-efficient adaptive biasing circuit and a class AB current follower using the quasi-floating gate (QFG) technique. The amplifier has been designed and fabricated in a 0.5-μm CMOS process. Simulation and measurement results show a slew rate (SR) improvement factor versus the class A version larger than 4 for the same supply voltage and bias currents, as well as enhanced small-signal performance.     

基于有源PFC原理的升压型DC/DC空间电源设计

采用有源PFC工作原理实现了一种升压型DC/DC变换器模块。作为空间电源完成由蓄电池输出电压50￣90V范围到稳定的128V输出,所采用的核心控制芯片为L4981A。该变换器的设计采用了双闭环控制,其特点是采用电压误差放大器环节实现输出电压稳定,采用电流环误差放大器环节实现输入电流跟踪输入电压且连续。试验结果表明,该变换器的输入电流连续,输出电压精度高,负载调整率高,电压调整率高,纹波电压较低,EMI强度较低,输出功率达到1.5kW。     

A 0.8‐V supply bulk‐driven operational transconductance amplifier and Gm‐C filter in 0.18 µm CMOS process

A low voltage bulk‐driven operational transconductance amplifier (OTA) and its application to implement a tunable Gm‐C filter are presented. The linearity of the proposed OTA is achieved by nonlinear terms cancelation technique, using two paralleled differential topologies with opposite signs in the third‐order harmonic distortion term of the differential output current. The proposed OTA uses 0.8 V supply voltage and consumes 31.2 μW. The proposed OTA shows a total harmonic distortion of better than ?40 dB over the tuning range of the transconductance, by applying 800 mV_ppd sine wave input signal with 1 MHz frequency. The OTA has been used to implement a third‐order low‐pass Gm‐C filter, which can be used for wireless sensor network applications. The filter can operate as the channel select filter and variable gain amplifier, simultaneously. The gain of the filter can be tuned from ?1 to 23 dB, which results in power consumptions of 187.2 to 450.6 μW, respectively. The proposed OTA and filter have been simulated in a 0.18 µm CMOS technology. Simulations of process corners and temperature variations are also included in the paper. Copyright © 2014 John Wiley & Sons, Ltd.     

Low‐voltage bulk‐driven input stage with improved transconductance

A low‐voltage input stage constructed from bulk‐driven PMOS transistors is proposed in this paper. It is based on a partial positive feedback and offers significant improvement of both input transconductance and noise performance compared with those achieved by the corresponding already published bulk‐driven structures. The proposed input stage offers also extended input common‐mode range under low supply voltage in relevant to a gate‐driven differential pair. A differential amplifier based on the proposed input stage is also designed, which includes an auxiliary amplifier for the output common‐mode voltage stabilization and a latch‐up protection circuitry. Both input stage and amplifier circuits were implemented with 1 V supply voltage using standard 0.35µm CMOS process, and their performance evaluation gave very promising results. Copyright © 2010 John Wiley & Sons, Ltd.     

A 63‐dB gain OTA operating in subthreshold with 20‐nW power consumption

This paper presents a two‐stage bulk‐driven operational transconductance amplifier operating in weak‐inversion region. The proposed amplifier is upgraded using recycling structure, current shunt technique, positive feedback source degeneration and indirect frequency compensation feedback to enhance transconductance under a reasonable stability. Combining these approaches leads to an ultra‐low‐power high performance amplifier without increasing power dissipation compared to the conventional one. Simulation results in 0.13‐µm complementary metal–oxide–semiconductor technology show the proposed structure achieves a 63‐dB DC gain at 0.25‐V supply voltage with just 20‐nW power dissipation. Copyright © 2016 John Wiley & Sons, Ltd.     

基于OPA454的新型高压级联放大器优化设计

为获取频率可调的高线性度电压信号,提出基于OPA454的高压级联线性放大器的优化设计方案。首先,设计高压级联放大器的主电路、隔离电路和级联放大电路;然后,分析此线性放大器的负反馈特性和容性负载特性,保证输出电压信号的高线性度和带容性负载能力;最后,搭建两级级联放大电路模型,时域下测试输入电压频率分别为0.001 Hz、1.0 Hz、1.0 kHz、10 kHz时放大器的输入输出波形,在频域下对比一级电压放大电路和两级电压放大电路的频率响应曲线。结果表明:设计的新型线性放大器输出的电压波形可对输入电压线性放大40 n倍,并达到较高的线性度和低波形失真率,满足可调频率下电压准确放大的要求。     

A low-power voltage differencing buffered amplifier

A low-voltage, high-performance voltage differencing buffered amplifier (VDBA) designed using differential flipped voltage followers (DFVF) is presented in this paper. The proposed VDBA is capable of providing high transconductance and wide bandwidth (BW) with low biasing currents and buffer transfer ratio close to unity. Mathematical formulations for transconductance and buffer transfer ratio are deduced through low-frequency small signal analysis. Pre and post layout simulations for characterization of the proposed structure are carried out on Cadence Virtuoso using gpdk 0.18-μm CMOS process parameters. The transconductance of the proposed VDBA is observed to be varying from 411.8 μS to 1.374 mS for a corresponding bias current range of 10 to 75 μA, and the 3-dB bandwidth (BW) is recorded to be 1.2 GHz. The PVT analysis is carried out to show the effect of process corners. To check the robustness of the proposed VDBA, Monte Carlo analysis is performed, and results have been included in the form of histograms.     

High-gain,high-CMRR class AB operational transconductance amplifier based on the flipped voltage follower

A novel class AB operational transconductance amplifier (OTA) topology is proposed, based on a class AB flipped voltage follower. The OTA has class AB behavior, with current boosting both for the load and the compensation capacitors. It has a high gain of (g_mr₀)⁴ , obtained using a two-stage structure with cascoded stages, and is a two-stage Miller-compensated amplifier employing multipath to remove the positive zero. It has close to rail-to-rail output swing (limited by cascoding) and very low common-mode gain thanks to a replica technique (allowing the use of low-power common-mode feedback [CMFB] loops). Ninety-two decibels of gain and 176 dB of common-mode rejection ratio (CMRR) without CMFB are achieved using a 40-nm complementary metal-oxide semiconductor (CMOS) process. The OTA is used to design a low-power sample-and-hold amplifier (SHA) operating at 5 MSps, a typical application for CMOS OTAs, which has been chosen to verify the proposed circuit's performance and to show that the OTA is robust in Monte Carlo simulations under process variations and mismatches in an actual application.     

A High-Efficiency Audio Power Amplifier Using a Self-Oscillating Switching Regulator

A new high-efficiency audio power amplifier has been developed. This amplifier consists of a conventional power amplifier and a self-oscillating switching power supply which is arranged to vary the power supply output voltage according to the input signal voltage. The new amplifier achieves a higher efficiency than the conventional amplifier, by making the collector voltage of the emitter-follower-transistor follow the waveform of the output signal. Applying this idea to class A amplifiers, a one-third power dissipation can be achieved compared with the conventional class A amplifier. A power MOSFET is used as a switcher. The switching frequency is from 150 kHz to 300 kHz. The new amplifier shows sufficient favorable characteristics. Switching noise is suppressed to a low noise level, which has no influence on the AM tuner or other audio equipment. By stabilizing the single-ended push-pull (SEPP) output transistors, the amplifier can reproduce high quality tone. The present idea is also applicable to dass B power amplifiers and may be suitable for PA or car audio power amplifiers.     

基于磁放大器的ATX电源的设计

设计一种基于磁放大器的ATX电源,其特征是利用磁放大器实现对输出电压进行精确地调节,获得高稳定度的＋3.3V输出电压,可大大简化开关电源二次电路的设计。首先详细分析磁放大器稳压电路的基本原理及电路设计,然后介绍了145W多路输出式PC开关电源的主电路设计。     

Super class AB OTA without open‐loop gain degradation based on dynamic cascode biasing

A scheme to achieve simultaneously extremely high slew‐rate improvement and avoiding open‐loop gain degradation in one‐stage super class AB op‐amps is introduced. It overcomes the serious shortcoming of super class AB operational transconductance amplifiers that shows very high‐output current enhancement factors at the expense of degrading the open‐loop gain. The proposed scheme uses dynamically biased cascode transistors to avoid gain and slew‐rate degradation. Experimental results of a super class AB operational transconductance amplifier in 180‐nm complementary metal‐oxide semiconductor technology with open‐loop gain of 67 dB, a factor 2 improvement in GBW , and a current enhancement factor of 270 verify the proposed scheme. Copyright © 2017 John Wiley & Sons, Ltd.     

一种开关线性复合包络线跟踪电源的控制策略

在3G移动通信系统中,射频功放的输入信号包络线幅值是变化的,且带宽较高,采用恒定电压给射频功放供电,其损耗将很大。包络线跟踪电源可以使供电电压跟随输入信号包络线的变化而变化,使得功放的功率管压降较小,从而提高系统效率。采用开关电源和线性电源并联构成的包络线跟踪电源,其中高带宽的线性电源用于调节输出电压,低带宽的开关电源提供大部分负载功率,以提高电源效率。针对此结构,本文提出一种PWM电流控制策略,使得开关电源工作频率恒定,并对此控制方法进行改进,引入输出电压前馈支路,进一步减小线性电源电流,提高系统效率。文中最后以跟踪频率小于100kHz的正弦信号给出设计实例,并进行实验验证。     

基于FGMOS的电压求和电流传送器及其应用设计

本文提出了一种基于FGMOS晶体管的电压求和电流传送器的设计。通过对FGMOS晶体管的等效电路分析,得到其框图和等效电路,并设计出了其电路结构;为了表明提出的电压求和电流传送器的可用性,将提出的电压求和电流传送器用于实现受控振荡器和电压求和放大器;通过SPICE的仿真结果表明,基于FGMOS的电压求和电流传送器不仅具有高的线性特性,而且其电压传递增益和电流传递增益分别可达0.99和0.98。此外,还有着很好的频率响应性能,?0.5V的低电源电压,79.8?W的低功耗和在14k?~2.1M?的线性电子可调谐电阻值。基于电压求和电流传送器设计的受控振荡器具有稳定的正弦输出,而且振荡频率值可以通过偏置电流来控制,设计的电压求和放大器具有高输入电阻和可控的增益。