复合量程微加速度计中阻尼的分析与设计

为了避免微加速度计在工作过程中因为共振导致结构损坏,需要在结构中合理设计阻尼.设计了一个复合量程压阻式微加速度计,为了使结构中各个传感器具有较好的阻尼参数,通过静电键合在硅结构层下制作一玻璃层.根据Reynolds方程,可知当硅-玻璃静电键合间距d=2.25μm时,复合量程微加速度计中各个传感器可得到较好的阻尼比.     

MEMS高g加速度传感器封装热应力的研究

封装热应力是导致MEMS器件失效的主要原因之一,本文设计了一种MEMS高g加速度传感器,并仿真研究了传感器在封装过程中的热应力及影响其大小的因素。根据封装工艺,建立设计的高g加速度传感器封装的有限元模型,利用AN-SYS软件仿真传感器在不同的贴片工艺中受到的热应力及影响热应力的因素。结果显示,在封装中,与直接贴片到管壳底部相比,MEMS高g加速度传感器芯片底面键合高硼硅玻璃后再贴片到管壳底部时,封装热应力可从135MPa降低到33MPa;在贴片工艺中,基板的热膨胀系数和贴片胶的弹性模量、热膨胀系数及厚度是影响封装热应力的主要因素;在健合工艺中,基板和键合温度主要影响到热应力的大小。     

MEMS硅玻璃阳极键合工艺评价方法

为了得到微机电系统(MEMS)加速度计硅-玻璃阳极键合的键合强度,进行了剪切破坏测试,并结合材料力学相关理论,得到键合强度表征方法.通过对实验数据的分析,制定键合强度的失效判据,提出了一种评价硅玻璃键合工艺质量的有效方法,在工程实际中具有一定的参考价值.     

两电极多层阳极键合实验研究

介绍了用2个电极通过一次电极反接的方式实现多层样片之间阳极键合的操作工艺和键合机理,并以玻璃-硅-玻璃三层结构为例对其进行了实验研究。结果显示：多余的玻璃对第一次键合过程的电流特性影响不大,而第一次键合的玻璃对第二次键合电流产生显著的影响,电流出现不规则的突变。而且,在第二次键合过程中,第一次键合的玻璃在键合面上会出现由于钠元素积聚而产生的黄褐色斑点。拉伸强度实验的结果表明：第二次键合过程中在第一次键合面形成的反向电压会减弱键合的强度;通过合理选择键合参数可以得到满足MEMS封装要求的键合强度。     

MEMS耐高温压力传感器封装工艺研究

为解决特种压力传感器结构的封装难题,提出了三种能够适用于200°C高温条件下的先进封装技术.通过有限元模拟,确定了采用低温玻璃键合技术对多种压力传感器进行封装,分析得出了适合的中间键合层厚度.选定了高强度低膨胀基底合金材料,制定了低温玻璃键合的工艺流程,采用先进的丝网印刷工艺确保中间键合层厚度.实验表明经过该工艺封装的压力传感器在高温下具有可靠的性能,能满足现代工业测量需求.     

复合量程微加速度计的研究

在同一个物理过程中往往存在相差上数十倍甚至上万倍的多个加速度值需要测量,例如,分析弹体在发射和飞行过程中的受力情况,既需要测试发射过程中上万个g的加速度,也需要测试飞行过程中几个g的加速度.在这些场合用同一个加速度计很难满足整个过程的测试要求.针对类似的需求,介绍了一种由四个压阻式微加速度计组成的复合量程微加速度计,四个微加速度计量程分别为100 g、500g、1000 g和2000 g.除了主要介绍微加速度计阵列的设计、制造和测试外,还着重介绍了低量程传感器在高过载环境下的结构防护问题.线性测试结果表明该复合量程微加速度计具有较好的线性度,因而可以同时在测量四个不同的量程的加速度值.     

半导体高温压力传感器的静电键合技术

本文论述了多晶硅高温压力传感器中的硅 玻璃静电键合技术 ,包括硅 玻璃静电键合机理 ,键合强度及键合后残余应力的改善措施 .通过大批量键合封接实验 ,键合的成品率达到 95 %以上     

基于多层嵌套环驻波特性的MEMS应力隔离结构设计

MEMS加速度计等传感器检测精度受机械元件加工、电路制作、封装工艺等方面影响,其中机械热应力的影响尤为显著。为降低热应力,提出了一种基于多层嵌套环驻波特性的应力隔离结构设计,利用嵌套环的驻波振动特性,通过多层嵌套环逐级吸收传递至敏感结构的能量,从而达到隔离锚点处热应力的效果。通过有限元方法计算了不同嵌套环在热应力下变形情况,并研究了键合残余热应力与温度变化热应力对加速度计敏感结构频率、正应力和切应力的影响规律,得出在不同结构布局和尺寸参数下设计的应力隔离效率。对于正应力而言,应力隔离效率最优可以达到99.98%;对于切应力而言,应力隔离效率最优可以达到99.53%。结果表明,多层嵌套环应力隔离结构在特定布局和尺寸条件下的应力隔离效果优于现有的框架式应力隔离结构。     

复合量程加速度计抗过载技术的研究

介绍了复合量程加速度计的设计原理,对加速度计的抗高过载能力进行理论分析和实践证明。从复合量程加速度计的内部结构设计到外部封装设计两个方面考虑提高抗高过载能力。应用ANSYS软件对结构进行仿真,并应用到实际的过载试验。试验中,复合量程加速度计在经过高过载之后,能有效的测得炮弹膛内初始过载和外弹道轴向过载,而且加速度计没有被损坏。结果证明,这种抗过载设计方案具有很高的可靠性。     

硅微静电悬浮加速度计实验研究

硅微静电加速度计将静电悬浮技术与微机械加工工艺相结合,在空间微重力环境下通过降低量程可实现极高的分辨率。设计了一种玻璃—硅—玻璃三明治结构、平行六面体状检测质量、体硅加工工艺、低量程的三轴硅微静电加速度计,分析了加速度计的力平衡回路特性。采用基于DSP的数字控制器,实现了检测质量的六自由度稳定悬浮。在大气环境下测试了静电加速度计的性能。测试结果表明:加速度计x轴的带宽为88.1 Hz,量程为0.220 g n;y轴的带宽为118.2 Hz,量程为0.313 g n;z轴的带宽为10.7 Hz,量程为3.53 g n。     

Packaging of a 3-axial piezoresistive force sensor with backside contacts

In this paper design aspects and challenging packaging solution of a monolithic 3D force sensor will be presented. The previously developed design and process flow (Vázsonyi et al. 123–124:620–626, 2005; Molnár et al. 90:40–43, 2012) were improved by an additional hybrid wafer bonding step of simultaneous anodic and metal bonding processes. This electrostatic force assisted metal bonding can ensure both the mechanical and the electrical integrity of the device. The applied novel process sequence can eliminate the need of a possible flip-chip bonding and chemical–mechanical polishing steps. The applied glass substrate improves the thermal isolation and thermo-mechanical stability of the integrated system considering the thermal expansion coefficients of the chosen glass material and the silicon (Si) only slightly differ minimizing the residual thermo-mechanical stress during the operation.     

Technological aspects on the fabrication of silicon-based optical accelerometer with ARROW structures

The fabrication and characterization of an optical accelerometer based on silicon technology and using BESOI wafers is presented. Instead of the standard total internal reflection (TIR) waveguides, AntiResonant Reflecting Optical Waveguides (ARROW) have been used. On the basis of a quad beam accelerometer design, a sensing waveguide has been placed on the seismic mass. Its misalignment with the waveguides located at the frame allows measuring the acceleration. The mechanical structure has been designed so as to have a span of 2 μm, that should provide with a sensitivity of 4.6 dB/g. Reference waveguides measured by end-fire coupling have low radiation and insertion losses (0.3 and 2.5 dB, respectively). High insertion losses are observed due to imperfections in polishing when V-grooves with glass anodic bonding are used. This fact causes the reduction of its sensibility to 2.3 dB/g.     

一种电容式微机械加速度计的设计

介绍了一种新型基于滑膜阻尼的电容式微机械加速度计.该加速度计根据差分电容极板间正对面积的改变来检测加速度大小,保证了输出电压与加速度之间的线性度.对加速度计进行了结构设计和分析.给出了加速度计的制作工艺流程,研究了解决深反应离子刻蚀过程中的过刻蚀现象的方法.初步测试结果表明,该加速度计的灵敏度比较理想,谐振频率与理论计算相吻合.     

一种电容式微加速度计的结构设计和工艺仿真

微硅电容式加速度计是目前微硅加速度传感器发展的主流,本文在硅-玻璃阳极键合工艺同深槽刻蚀工艺相结合的加工技术基础之上设计了一种电容式微加速度计,该结构将两种改变平行板电容量的方式有效的结合在一起,提高了结构的灵敏度并具有较好的线性度.最后,对所设计的结构进行了工艺仿真,通过虚拟工艺仿真结果与设计进行比较,论证了结构的基本可行性.     

Effects of localized warpage and stress on chip‐on‐glass packaging: Induced light‐leakage phenomenon in mid‐sized TFT‐LCD

Abstract— Mura defects become visible in a 13.3‐in. TFT‐LCD using chip‐on‐glass (COG) packaging when the thickness of the glass substrate is decreased from 0.5 to 0.3 mm. Mura, the non‐uniform brightness in LCDs, is caused by COG packaging due to the mismatch of the coefficient of thermal expansion (CTE) and Young's modulus between the glass substrate and the IC‐driver Si chips. In this paper, a 3‐D finite‐element‐analysis (FEA) model, coupled with transient thermal analysis is first established to examine the warpage and stress behavior in the upper‐glass‐plate post‐COG‐package processing for identifying the root causes of the light‐leakage phenomenon. Prior to that, the simulated warpage results are validated by surface‐contour measurement. Data and modeling results show that a low bonding temperature together with a low modulus in novel ACF materials can effectively eliminate Mura. Besides, thinner silicon or a shorter length of Si chips as drivers offers enhanced reduction in the localized warpage, and thus can be a practical and low‐cost solution for eliminating mura defects.     

电容式微加速度计的研制

以一个电容式微加速度计为设计实例来介绍了基于IP库MEMS设计的流程,其中主要包括四个部分:原理分析,结构设计,工艺流程和版图设计,封装及电路测试。首先根据需求设计出加速度计的基本结构;然后对该结构进行工艺流程和版图的设计;并利用虚拟工艺来进行仿真和可加工性验证;得到的三维结构通过接口导出到FEM中进行数值分析;接着将数值分析的结果进行基于FEM的运动学建模;求解得到的运动规律,以宏模型的形式存入IP库中;与此同时,利用虚拟运行进行可视化行为级的仿真。     

Mechanical and electrical bonding between silicon wafer and glass wafer with etched channels containing metal tracks

In this paper a novel process to bond and, at the same time, to electrically connect a silicon wafer to a glass wafer is presented. It consists of a low temperature anodic bonding process between silicon and glass by using a glass wafer with etched channels in order to contain metal tracks. The glass-to-silicon anodic bonding process at low temperatures (not exceeding 300°C) assures a strong mechanical link (Berthold et al. in Transducers 1999, June:7–10, 1999). The electrical contacts between the metal pads on the backside of a silicon wafer and the metal pads on the glass wafer are achieved by sintering and diffusion of metals due to a kind of thermo compression bonding. This bonding method permits a high vertical control due to a well-controlled etching of the cavity depth and to the thickness precision of both metallization (pads on silicon wafers and metal tracks on glass wafer). This IC-processing compatible approach opens up the way to a new electrical connection concept keeping, at the same time, a strong mechanical bond between glass and silicon wafers for an easier fabrication of a more complex micro-system.     

Mechanical properties of glass frit bonded micro packages

Frit glass bonding is a widely used technology for encapsulation of surface micro-machined structures like inertial sensors or gyroscopes on wafer level. Since for sensors in automotive applications, a lifetime of 15–20 years has to be guaranteed for, a reliable lifetime prediction is necessary. Different material parameters have to be known for a lifetime estimation based on stress corrosion cracking, which determines the long-term strength behaviour of most bonded interfaces of microsystems. Parameters needed for lifetime prediction have to describe the material’s resistance against crack propagation (fracture toughness K _IC), the stress situation in a micro package and the long-term strength behaviour. Results for fracture toughness investigations presented in this paper were determined by the micro chevron test. The stress situation in a micro package was calculated by a thermo-mechanical Finite Element Analysis. Furthermore the residual stress in the glass layer and the linear thermal expansion coefficient were determined by a crack width measurement in an environmental scanning electron microscope.     

Bond-quality characterization of silicon-glass anodic bonding

A simple testing method is presented that allows the comparison of the bond quality for anodically bonded wafers. An array of parallel metal lines of predetermined thickness is formed on a glass wafer. The estimation of the bond quality can be performed by visual inspection after the bonding. This method enables comparison of the anodic-bonding process performance for different glasses, for intermediate layers and various bonding conditions. The optimization of silicon-glass anodic bonding with an intermediate phosphosilicate glass (PSG) layer is shown using this technique.     

静电封接中的热应力研究

通过对静电封接结构的受力分析，建立了静电封接后弹性膜片的热失配应力数学模型。并分析了改善微压传感器性能的技术途径。