Cascadable Current-Mode Biquad Filter and Quadrature Oscillator Using DO-CCCIIs and OTA

This article introduces a circuit which can function both as a quadrature oscillator and as a universal biquad filter (lowpass, highpass, bandpass). When the circuit functions as a universal biquad filter, the quality factor and pole frequency can be tuned orthogonally via the input bias currents. When it functions as a quadrature oscillator, the oscillation condition and oscillation frequency can be adjusted independently by the input bias currents. The proposed circuit can work as either a quadrature oscillator or a biquad filter without changing the circuit topology. The amplitude of the proposed oscillator can be independently controlled via the input bias currents. The proposed oscillator can be applied to provide amplitude modulated/amplitude shift keyed signals with the above-mentioned major advantages. The circuit is very simple, consisting of four dual-output second generation current controlled current conveyors (DO-CCCIIs), one operational transconductance amplifier (OTA), and two grounded capacitors. Without any external resistors and using only grounded elements, this circuit is therefore suitable for IC architecture. PSPICE simulation results are depicted here, and the given results agree well with the theoretical analysis. The power consumption is approximately 7.32 mW at ±2.5 V supply voltages.     

Digital Modeling and PID Controller Design for MIMO Analog Systems with Multiple Delays in States, Inputs and Outputs

This paper presents a discrete-time state-space methodology for the digital modeling and design of an optimal digital proportional-integral-derivative (PID) plus state-feedback controller for multiple-input, multiple-output (MIMO) continuous-time systems with multiple time delays in states, inputs and outputs. To implement the digital design, first the Chebyshev quadrature formula together with a linear interpolation method is employed to obtain an extended discrete-time state-space model from the continuous-time multiple time-delay system. Then, a partially predetermined digital PID controller and the extended discrete-time state-space model are formulated as an augmented discrete-time state-space system utilizing state-feedforward and state-feedback linear-quadratic regulator (LQR) design. As a result, the parameters of the optimal PID controller and its associated state-feedback controller can be determined by tuning the weighting matrices in the LQR performance criteria. Further, an optimal discrete-time observer is jointly constructed for the multivariable system with multiple delays in states, inputs and outputs. The proposed design methodology can be applied to general MIMO continuous-time multiple time-delay systems for performance improvement and disturbance rejection. An illustrative example is given to demonstrate the effectiveness of the developed method. This work was supported in part by U.S. Army Research Office under Grant W911NF-06-1-0507, the National Science Foundation under Grant NSF0717860, and Research Contract 1440234.     

A New Current-Mode Current-Controlled Universal Filter Based on CCCII(±)

This paper proposes a new current-mode current-controlled single-input multiple-output type universal filter using non-inverting and inverting second generation current-controlled conveyors (CCCII(±)s). The proposed circuit employs four CCCII(±)s and two grounded capacitors, and it can simultaneously realize lowpass, bandpass, highpass, bandstop and allpass filter outputs. The circuit offers an independent electronic control of the natural angular frequency (ω ₀) and quality factor (Q) by means of adjusting the bias current of the CCCII(±)s. The parameter sensitivities are all very low. Moreover, a high Q-value filter can be easily obtained by adjusting the ratio of two bias currents. PSPICE simulation results at the natural frequency of 1.27 MHz are given to demonstrate the advantages of the proposed circuit. This work was supported by National Natural Science Foundation of China under No.60676021.     

Impossibility Results for Universal Composability in?Public-Key Models and with Fixed Inputs

Universal composability and concurrent general composition consider a setting where secure protocols are run concurrently with each other and with arbitrary other possibly insecure protocols. Protocols that meet the definition of universal composability are guaranteed to remain secure even when run in this strongly adversarial setting. In the case of an honest majority, or where there is a trusted setup phase of some kind (like a common reference string or the key-registration public-key infrastructure of Barak et al.?in FOCS 2004), it has been shown that any functionality can be securely computed in a universally composable way. On the negative side, it has also been shown that in the plain model where there is no trusted setup at all, there are large classes of functionalities which cannot be securely computed in a universally composable way without an honest majority. In this paper, we extend these impossibility results for universal composability. We study a number of public-key models and show for which models the impossibility results of universal composability hold and for which they do not. We also consider a setting where the inputs to the protocols running in the network are fixed before any execution begins. The majority of our results are negative and we show that the known impossibility results for universal composability in the case of no honest majority extend to many other settings.     

New ℋ2 Filter for Uncertain Singular Systems Using Strict LMIs

In this paper, the robust ℋ₂ filtering problem for a class of linear singular systems with norm-bounded uncertainties is investigated. A class of linear regular filters, which can be realized in practice, is fully analyzed, and then necessary and sufficient conditions for ℋ₂ performance of the filtered system are provided. It is established that the solution to the filtering design problem can be cast in the format of strict linear matrix inequalities (LMIs). A numerical example is worked out to illustrate the theoretical developments.     

Robust Sub-harmonic Mixer at 340 GHz Using Intrinsic Resonances of Hammer-Head Filter and Improved Diode Model

This paper presents a sub-harmonic mixer at 340 GHz based on anti-parallel Schottky diodes (SBDs). Intrinsic resonances in low-pass hammer-head filter have been adopted to enhance the isolation for different harmonic components, while greatly minimizing the transmission loss. The application of new DC grounding structure, impedance matching structure, and suspended micro-strip mitigates the negative influences of fabrication errors from metal cavity, quartz substrate, and micro-assembly. An improved lumped element equivalent circuit model of SBDs guarantees the accuracy of simulation, which takes current-voltage (I/V) behavior, capacitance-voltage (C/V) behavior, carrier velocity saturation, DC series resistor, plasma resonance, skin effect, and four kinds of noise generation mechanisms into consideration thoroughly. The measurement indicates that with local oscillating signal of 2 mW, the lowest double sideband conversion loss is 5.5 dB at 339 GHz; the corresponding DSB noise temperature is 757 K. The 3 dB bandwidth of conversion loss is 50 GHz from 317 to 367 GHz.     

General Composition and Universal Composability in Secure Multiparty Computation

Concurrent general composition relates to a setting where a secure protocol is run in a network concurrently with other, arbitrary protocols. Clearly, security in such a setting is what is desired, or even needed, in modern computer networks where many different protocols are executed concurrently. Canetti (FOCS 2001) introduced the notion of universal composability and showed that security under this definition is sufficient for achieving concurrent general composition. However, it is not known whether or not the opposite direction also holds. Our main result is a proof that security under concurrent general composition, when interpreted in the natural way under the simulation paradigm, is equivalent to a variant of universal composability, where the only difference relates to the order of quantifiers in the definition. (In newer versions of universal composability, these variants are equivalent.) An important corollary of this theorem is that existing impossibility results for universal composability (for all its variants) are inherent for definitions that imply security under concurrent general composition, as formulated here. In particular, there are large classes of two-party functionalities for which it is impossible to obtain protocols (in the plain model) that remain secure under concurrent general composition. We stress that the impossibility results obtained are not “black-box,” and apply even to non-black-box simulation. Our main result also demonstrates that the definition of universal composability is somewhat “minimal” in that the composition guarantee provided by universal composability implies the definition itself. This indicates that the security definition of universal composability is not overly restrictive. An extended abstract of this work appeared in the 44th FOCS, 2003. Yehuda Lindell: Most of this work was carried out while the author was at the IBM T.J. Watson Research Center.     

A Current-Mode DC-DC Buck Converter with High Stability and Fast Dynamic Response

提出了一种高稳定性的电流型DC-DC转换器.首先应用一种新型的电流型转换器的模型推导了控制环路的增益表达式,在分析其环路增益的基础上,提出了一种新颖的控制环路频率补偿的方法,从而使转换器的稳定性不受负载电流和电源电压变化的影响.其次应用这种新的频率补偿方法,使用0.5μm-CMOS工艺设计了一种电流模式的降压型转换器.仿真结果表明,该稳压器具有高度的稳定特性,其稳定性与负载和电源电压无关.并且由于这种新的频率补偿为环路提供了极高的带宽,所以该转换器具有优异的动态响应.其提供的全负载瞬态响应的建立时间小于5μs,过冲电压小于30mV.     

Reversible Data Hiding Using the Companding Technique and Improved DE Method

A novel reversible data hiding scheme based on the companding technique and an improved difference expansion (DE) method is presented in this article. The companding technique is employed to embed payload into high frequency bands in the integer wavelet transform (IWT) domain. A refined method based on histogram modification is proposed as a remedy to the potential problem on overflow/underflow in pixel values after reverse IWT. To be truly reversible, additional information incurred by the histogram modification process is ingeniously embedded into the carrier image by using an improved DE method. A series of experiments is conducted to verify the feasibility and effectiveness of the proposed approach. As revealed in the experimental results, the proposed scheme outperforms existing approaches, in terms of embedding capacity and visual quality, as expected. This work was supported in part by National Natural Science Foundation of China (Nos. 90604032, 60776794, 60702013), Specialized Research Fund for the Doctoral Program of Higher Education, Program for New Century Excellent Talents in University, Specialized Research Foundation of BJTU, 973 program (No. 2006CB303104), Natural Science Foundation of Beijing (No. 4073038).     

Two Efficient Dual-Band and Wide-Band Low-Power DCO Designs Using Current Starving Gates,DCV and Reconfigurable Schmitt Triggers in 180 nm

Digitally controlled oscillators are the main cores in all-digital phase-locked loops (ADPLL), which are important for determining the range of frequency and power consumption in ADPLLs. In the conventional digitally controlled oscillator (DCO) designs, one single band of operation is assigned to the DCO. The following paper presents a new approach in the design of DCOs, which works in dual-band and wide-band modes with a control unit. In dual-band mode, the DCO works in two different ranges of frequencies simultaneously via digital control bits. The wide-band DCO (WBDCO) works in one wider range of frequencies consecutively. It seems that in the wide-band DCO, the gap width for the dual-band DCO (DBDCO) is zero. The previously mentioned designs allow the designer to have standard frequencies with the help of direct or multiplied frequencies. So, we can have a trade-off between power and performance. This means that we can have low power consumption in low-frequency applications and vice versa. The proposed designs are based on using digitally controlled capacitors, current starving gates and Schmitt triggers in critical points of the DCO loop, while preserving coarse and fine tunings. The non-delay linearity factors are clearly investigated and resolved with the use of a new combined control unit. The simulations of the proposed designs are performed in Hspice with a voltage of \(\mathrm{VDD}=1.8\) v in 180 nm CMOS technology for 64- and 128-bit input coarse codes. Our simulation and evaluation results showed that in the dual-band DCO, a 14.8 ps jitter was calculated at 134 MHz with 1.2131 mW power consumption, while in the wide band with overlap mode, a 68.7 ps jitter was measured at 184.61 MHz with 1.604 mW power consumption. Our designs are proper for reconfigurable and multi-standard ADPLL designs.     

Programmable Switched Capacitor Finite Impulse Response Filter with Circular Memory Implemented in CMOS 0.18 μm Technology

This paper presents a programmable multi-mode finite impulse response (FIR) filter implemented as switched capacitor (SC) technique in CMOS 0.18 μm technology. Intended application of the described circuit is in analog base-band filtering in GSM/WCDMA systems. The proposed filter features a regular structure that allows for elimination of some parasitic capacitances, thus significantly improving the filtering accuracy. Due to its modularity that allows for dividing the circuit into two separate sections, the circuit can be easily reconfigured to work as either infinite impulse response (IIR) or as finite impulse (FIR) filter. One of the key components that allows for this multi-mode operation is the proposed programmable and ultra low power multiphase clock circuit. The 24-taps filter for the sampling frequency of 30 MHz dissipates power of 4.5 mW from a 1.8 V supply.     

A Design Example of a Fractional-Order Kerwin–Huelsman–Newcomb Biquad Filter with Two Fractional Capacitors of Different Order

Design, realization and performance studies of continuous-time fractional order Kerwin–Huelsman–Newcomb (KHN) biquad filters have been presented. The filters are constructed using two fractional order capacitors (FC) of orders α and β (0<α, β≤1). The frequency responses of the filters, obtained experimentally have been compared with simulated results using MATLAB/SIMULINK and also with PSpice (Cadence PSD 14.2), where the fractional order capacitor is approximated by a domino ladder circuit. It has been observed that fractional order filters can give better performance in certain aspects compared to integer order filters. The effects of the exponents (α and β) on bandwidth and stability of the realized filter have been examined. Sensitivity analysis of the realized fractional order filter has also been carried out to investigate the deviation of the performance due to the parameter variation.     

Design and Analysis of 150° Bend SIW and Corrugated SIW Bandpass Filter with Multiple Transmission Zeroes Using Reactive Periodic Structures Suitable for Microwave Integrated Circuits (MICs)

Keller SYMplus CNC which is developed by Germany’s Keller company is a software which used for NC programming and simulation. This paper described and analyzed the characteristics of Keller SYMplus CNC software in NC programming and simulation from four aspects, model design, rapid manufacturing, machining simulation and post processing. Then compares Keller SYMplus CNC with commonly used NC programming and simulation software UG, MasterCAM, and CAXA from the profile milling and teaching function.     

Non-Fragile H ∞ Guaranteed Cost Control for a Non-linear Stochastic System with Both Distributed Delays and Input Delays

The problem of non-fragile H _∞ guaranteed cost control for a delay-dependent non-linear stochastic system is considered. Both distributed delays and input delays appear in the system. A delay-dependent stabilization condition is presented in terms of the Lyapunov stability theory and the linear matrix inequality (LMI) technique. Furthermore, a sufficient condition of the existence of non-fragile H _∞ guaranteed cost controller is constructed. Finally, a numerical example is given to demonstrate the effectiveness and the feasibility of the proposed approaches in this paper.     

A 60 GHz phased array with measurement and de-embedding techniques

We present a 60 GHz phased array system that combines several key technologies to realize 10 GHz bandwidth coverage. Particularly, a tightly coupled dipole array centered at 60 GHz is designed and tested for its wideband performance. The tightly coupled dipole elements offer excellent wideband behavior of 10 GHz with voltage standing wave ratio?<?3 with scanning to 45°, as well as low cost printed circuit board fabrication. Additionally, we demonstrate a measurement setup with de-embedding procedure to measure gain at the antenna feed point. A feeding structure was designed and fabricated for de-embedding gain pattern measurements. Recovered measurements are shown to be in agreement with simulation.     

H ∞ Filtering for Systems with Delays and Time-varying Nonlinear Parameters

This paper is concerned with the gain-scheduled H _∞ filtering problem for a class of parameter-varying continuous systems with time delays. The systems under consideration are represented by nonlinear fractional transformation (NFT) which is a generalization of linear fractional transformation (LFT). Attention is focused on the design of a stable filter guaranteeing a prescribed disturbance attenuation level in an H _∞ sense. Sufficient solvability conditions of this problem are obtained based on Lyapunov function approach. A gain-scheduled filter can be constructed in terms of a set of linear matrix inequalities (LMIs). A numerical example is provided to demonstrate the applicability of the proposed approach.     

A power efficient continuous time ΔΣ modulator with 15 MHz bandwidth and 70 dB dynamic range

A state variable block diagram method is given for the realization of universal biquadratic transfer functions employing second-generation current-controlled conveyors (CCCIIs). Using minimum number of passive components and properly adjusting the bias currents of CCCIIs, the proposed circuits can realize all the tunable frequency standard filter functions: high-pass, band-pass, low-pass, notch-pass, and all-pass by choosing appropriate input branches without changing the passive elements. These presented circuits are in current-mode and voltage-mode separately. The non-ideality analyses of these configurations are given. Additionally, a high-order low-pass filter derived from the proposed voltage-mode biquadratic filter is introduced. PSPICE simulation results are included to verify the theory.     

Stabilization of Discrete-Time Switched Systems with Input Time Delay and Its Applications in Networked Control Systems

In this paper, we focus on investigating the asymptotic stabilizability of switched systems with input time delay and its applications in networked control systems (NCSs). First, based on an important lemma, a linear matrix inequality (LMI)-based asymptotic stabilizability criterion is established. Stabilizing switched state feedback controllers can be designed by solving a set of LMIs, which can be easily tested with efficient LMI algorithms. Then, for NCSs with communication constraints, the NCS is modelled as a discrete-time switched system with input time delay. Thus, the asymptotic stabilizability criterion of switched system with input delay can be applicable to such NCSs. Finally, an example is given to illustrate our main results. This work is supported by the National Natural Science Foundation of China under grants (No. 60704015), a grant of Liuhui Center for Applied Mathematics of Nankai University and Tianjin University in China.     

Fault Detection for Networked Nonlinear Systems with Time Delays and Packet Dropouts

This paper addresses the problem of fault detection (FD) for networked systems with global Lipschitz nonlinearities and incomplete measurements, including time delays and packet dropouts which are described by a more general model using Markov jump system approach. We aim to design a mode-dependent fault detection filter (FDF) such that, for all external disturbances and incomplete measurements, the error between the residual and fault is made as small as possible. The addressed FD problem is then converted into an auxiliary H _∞ filtering problem of Markov jump system with time-varying delay. By applying Lyapunov–Krasovskii approach, a sufficient condition for the existence of the FDF is derived in terms of certain linear matrix inequalities (LMIs). When these LMIs are feasible, the explicit expression of the desired FDF can also be characterized. A numerical example is exploited to show the effectiveness of the results obtained.     

Comparison of Free Space Measurement Using a Vector Network Analyzer and Low-Cost-Type THz-TDS Measurement Methods Between 75 and 325 GHz

Specifications of two measurement systems, free space measurement using a vector network analyzer and low-cost-type terahertz time-domain spectroscopy using a multimode laser diode, have been compared in the frequency region of millimeter/sub-THz waves. In the comparison, accuracy, cost, measurement time, calculation time, etc. were considered. Four samples (Rexolite, RO3003, Ultralam 3850HT-design, and L1000HF) were selected for the comparison of the specifications of the two methods. The acquired data was used to compute the complex permittivity of measured materials. The extracted results by free space measurement agreed well to the ones obtained by low-cost-type terahertz time-domain spectroscopy. This result proves free space measurement that can be assessed as a new method of material characterization in the sub-THz region successfully worked. Furthermore, free space measurement was proved to be suitable for a measurement in a narrow frequency range. On the other hand, low-cost-type terahertz time-domain spectroscopy has features not only low cost but also measurement capability in wide frequency range.