共查询到20条相似文献,搜索用时 0 毫秒
1.
《Microelectronics Journal》2015,46(4):291-297
A pulsewidth control loop (PWCL) with a frequency detector for wide frequency range operation is presented. The proposed PWCL is implemented with a duty cycle controlled circuit and frequency detector to correct the wide range frequency and duty cycle of the input clock. The duty cycle controlled circuit is able to modify the gain with different frequency and duty cycle ranges. The frequency and duty cycle of the input clock are detected by the frequency detector. The frequency detector is based on a ring oscillator and the input clock duty cycle and frequency are detected within two input clock cycles. The proposed circuit has been fabricated in a 0.35 μm CMOS technology. The proposed circuit generates the output clock of 50% duty cycle with the input range from 20% to 80% and frequency range 50–800 MHz. The measured duty cycle error is less than 1% within the frequency range from 50 MHz to 800 MHz. 相似文献
2.
Very small manually wound transformers for sub-watt DC-DC converters are notorious for their relatively high cost and low reliability. In this paper, an isolated low-profile low-power 8 MHz soft-switching power converter using a coreless printed circuit board (PCB) transformer is described. Coreless PCB transformers eliminate several problems of their core-based counterparts in low-power applications. The diameter of the coreless PCB transformer is merely 0.46 cm. The converter's power output is about 0.5 W with a typical transformer efficiency of 63%. The high-frequency capability, high reliability and the low-profile structure make coreless PCB transformers a viable and attractive option for reliable mega-hertz switching converters and micro-circuits 相似文献
3.
A wide range fractional-N frequency synthesizer in 0.18μm RF CMOS technology is implemented. A switched-capacitors bank LC-tank VCO and an adaptive frequency calibration technique are used to expand the frequency range.A 16-bit third-order sigma-delta modulator with dither is used to randomize the fractional spur. The active area is 0.6 mm~2.The experimental results show the proposed frequency synthesizer consumes 4.3 raA from a single 1.8 V supply voltage except for buffers.The frequency range is 1.44-2.11 GHz and the frequency resolution is less than 0.4 kHz.The phase noise is -94 dBc/Hz @ 100 kHz and -121 dBc/Hz @ 1 MHz at the output of the prescaler with a loop bandwidth of approximately 120 kHz.The performance meets the requirements for the multi-band and multi-mode transceiver applications. 相似文献
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5.
Some electromagnetic aspects of coreless PCB transformers 总被引:2,自引:0,他引:2
In this paper, some EMI aspects of using coreless PCB transformers are addressed. Based on the antennas theory, the radiated power of a coreless PCB transformer is estimated and found to be negligible. The electromagnetic field plot of a power electronic circuit using a gate drive circuit isolated by a coreless PCB transformer has been recorded. The major radiated EMI source in the frequency range of 30 MHz to 300 MHz is found to be the copper tracks of the power circuit, where switching transients occur, rather than the coreless PCB transformer. Coreless PCB transformers essentially operate at relatively low frequency (8 MHz in this case) by near-field magnetic coupling. Experimental results have confirmed that the application of coreless PCB transformer in gate drive circuit will not impose any serious EMI problem on the power electronic circuit 相似文献
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7.
High frequency wide range CMOS analogue multiplier 总被引:1,自引:0,他引:1
A new CMOS analogue cell which can be used to implement a four-quadrant multiplier circuit is introduced. Simulation results of the circuit using the MOSIS 2 mu m process parameters are given. The circuit has an input range of +or-4 V and linearity error less than 1% for inputs up to +or-3 V. The magnitude and phase response are very flat; even at 30 MHz the change in the magnitude is less than 0.086 dB (1%) and the phase shift is less than 5 degrees .<> 相似文献
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9.
Shengyang Wang Jianhui Wu Meng Zhang Fuqing Huang Ling Tang Xincun Ji 《Analog Integrated Circuits and Signal Processing》2010,63(3):509-514
This letter presents an improved architecture of wide division ratio range programmable frequency divider with driving-capability
improved. The proposed architecture combines the traditional 2/3 cells and the revised ones to retain the high speed feature
and broaden the output duty-cycle. Only less OR and AND gates are added to select the proper output. All of the added circuits
are operating at the lower frequency. Thus it enhances the divider’s driving-capability with almost adding no power consumption.
This improvement makes it applicable to drive various clocked circuits, which need different frequencies. The presented equation
can be used to predict the output duty-cycle with the expected division ratio accurately. Test results show that the output
duty-cycle is between 33 and 66%, which corroborate the calculations. 相似文献
10.
B. M. Levin 《Journal of Communications Technology and Electronics》2014,59(2):150-157
Variants of application of the compensation method in a wide frequency range are considered. The method enables one to reduce the irradiation of a human organism and create a low-intensity field region (dark spot) in the near zone of an antenna. Structures with identical antennas, antennas equally spaced from the compensation point, and antennas with planar reflectors are proposed and analyzed. 相似文献
11.
This paper proposes a direct injection-locked frequency divider(ILFD) with a wide locking range in the Ka-band. A complementary cross-coupled architecture is used to enhance the overdriving voltage of the switch transistor so that the divider locking range is extended efficiently. New insights into the locking range and output power are proposed. A new method to analyze and optimize the injection sensitivity is presented and a layout technique to reduce the parasitics of the cross-coupled transistors is applied to decrease the frequency shift and the locking range degradation. The circuit is designed in a standard 90-nm CMOS process. The total locking range of the ILFD is 43.8% at 34.5 GHz with an incident power of –3.5 dBm. The divider IC consumes 3.6 mW of power at the supply voltage of 1.2 V. The chip area including the pads is 0.50.5 mm2. 相似文献
12.
Jian-Song Chen Kornegay K.T. Sei-Hyung Ryu 《Solid-State Circuits, IEEE Journal of》1999,34(2):192-204
In this paper, we present the design and fabrication of a high-temperature silicon carbide CMOS intelligent gate driver circuit intended for high-power switching applications. Using a temperature-insensitive comparator, several functions including overvoltage and undervoltage, as well as short- and open-load detection, are provided, all of which are operational up to 300°C. These integrated circuits are ideally suited for harsh and high-temperature environments such as automotive and aircraft jet engines 相似文献
13.
针对日益增强的小卫星平台搭载电子侦察载荷的需求,提出一种应用于宽频率范围的通信侦察信号处理方案,在一片集成度较低的FPGA中完成信号数字下变频、频谱分析、数据存储和传输等复杂功能。通过在FPGA中进行滤波器、存储器复用等办法,充分利用现有FPGA的资源,减少器件数量,实现了平台对载荷小型化、低功耗、功能全、效率高的要求。试验结果验证了该设计的实用性。 相似文献
14.
Shao Qianfen 《电子科学学刊(英文版)》1985,2(4):318-328
In this article, the operational principle of the current switching frequency multiplicator is quantitatively analysed in
some detail. The relationship between the optimum operation state and the parameters of the circuit elements in the frequency
multiplicator is given.
Furthermore, the principle of optimum design is derived and proved experimentally. In addition, the stability of the differential
inductor and the parasitic harmonic effect on the frequency stability of the output signal of frequency multiplicator is also
discussed. 相似文献
15.
An improved crosscoupled multivibrator is described which can be continuously varied in frequency over a wide range (considerably in excess of 100 to 1 with an upper frequency of 10 MHz). The circuit can operate from a 5 V supply line, and therefore it is ideal as a clock generator for logic elements because a common power supply can be used. 相似文献
16.
A clock generator with cascaded dynamic frequency counting loops for wide multiplication range applications 总被引:1,自引:0,他引:1
Pao-Lung Chen Ching-Che Chung Jyh-Neng Yang Chen-Yi Lee 《Solid-State Circuits, IEEE Journal of》2006,41(6):1275-1285
This work presents a clock generator with cascaded dynamic frequency counting (DFC) loops for wide multiplication range applications. The DFC loop, which uses variable time period to estimate and tune the frequency of the digitally controlled oscillator (DCO), enhances the resolution of frequency detection. The conventional phase-frequency detector (PFD) and programmable divider are replaced with a digital arithmetic comparator and a DCO timing counter. The value in the DCO timing counter is separated into quotient and remainder vectors. A threshold region is set in the remainder vector to reduce the influence of jitter variation in frequency detection. The loop stability can be retained by cascading two DFC loops when the multiplication factor (N) is large. The proposed clock generator achieves a multiplication range from 4 to 13 888 with output peak-to-peak jitter less than 2.8% of clock period. A test chip for the proposed clock generator is fabricated in 0.18-/spl mu/m CMOS process with core area of 0.16 mm/sup 2/. Power consumption is 15 mW @ 378 MHz with 1.8-V supply voltage. 相似文献
17.
Lianwen Deng Long Liu Daohan Zhou Chao Tang Shengxiang Huang Xiaohui Gao Lei-Lei Qiu 《International Journal of Communication Systems》2023,36(1):e5368
A tunable circularly polarized square patch antenna with parasitic elements is designed for a wide frequency tuning range and high gain characteristics. The proposed antenna is constructed by one main patch and four semi-elliptic parasitic units. By loading four varactor diodes and adjusting their capacitance values, the tunable feature is performed to reallocate the corresponding working frequency. Moreover, the diagonal corners of the antenna are cut and loaded with varactor diodes, which provide the appropriate perturbation between the two orthogonality modes of the antenna, so as to ensure the circular polarization characteristic in the entire operating tuning band. The experimental results demonstrate that the reflection coefficient and axial ratio are less than −13 dB and 3 dB, respectively. The proposed antenna features a relatively wide continuously tuning range of 24% within 1.9-2.3 GHz and a stable gain of over 7 dBi with a radiation efficiency of above 85%. 相似文献
18.
A mixed-mode input current sensorless predictive current control at constant but two different switching frequencies for a single-phase boost type switch-mode rectifier (SMR) with single switch topology is proposed. The SMR operates in continuous input current mode (CCM) or in discontinuous input current mode (DCM) depending upon the load. This load dependent operating mode selection avoids the operation of the SMR in the dual mode, where the input current harmonic distortion is maximum. The closed loop output voltage regulation is achieved without the need of an input current sensor. The control scheme is optimized to result in an economic size of the boost inductor along with the compliance of IEC 1000-3-2 harmonic limits for input current. 相似文献
19.
针对机动性能好、突防能力强的红外成像制导系统,利用极薄金属片可以快速加热升温与自然降温的特性,提出了一种适用于末制导阶段的新型红外干扰方法。建立了金属片加热升温及自然降温过程的数学模型,确定了金属片结构形式及材料特性;设计了结构简单、密封环境良好的红外点源干扰装置。试验结果表明:金属片优选2 μm厚的镍片,其加热时间为50 ms (500~1 000 ℃),自然降温时间为75 ms (1 000~500 ℃),可以满足帧频要求(10 Hz);并实现了温度规律性的周期变化。分析与试验结果证实了红外点源干扰装置能够模拟红外辐射特性的快速变化,可为末制导阶段干扰提供一种新思路。 相似文献
20.
Micromachined varactor with wide tuning range 总被引:1,自引:0,他引:1
A micromachined variable capacitor that achieves a wide tuning range is proposed. The device, which was fabricated in a polysilicon surface micromachining process, has a tuning range of 25% and a quality factor of 9.6 at 1 GHz when the capacitance is tuned to 4pF 相似文献